PD - 94735
IRL3803VS
IRL3803VL
HEXFET® Power MOSFET
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Logic-Level Gate Drive
Advanced Process Technology
Surface Mount (IRL3803VS)
Low-profile through-hole (IRL3803VL)
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
D
VDSS = 30V
RDS(on) = 5.5mΩ
G
ID = 140A
S
Description
Advanced HEXFET® Power MOSFETs from International Rectifier
utilize advanced processing techniques to achieve extremely low onresistance per silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that HEXFET power
MOSFETs are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of applications.
The D2Pak is a surface mount power package capable of accommodating
die sizes up to HEX-4. It provides the highest power capability and the lowest
possible on-resistance in any existing surface mount package. The D2Pak
is suitable for high current applications because of its low internal connection
resistance and can dissipate up to 2.0W in a typical surface mount
application.
D2Pak
IRL3803VS
TO-262
IRL3803VL
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TA = 25°C
PD @TC = 25°C
VGS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
Units
140
110
470
3.8
200
1.4
± 16
71
20
5.0
-55 to + 175
A
W
W
W/°C
V
A
mJ
V/ns
300 (1.6mm from case )
Thermal Resistance
Parameter
RθJC
RθJA
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Junction-to-Case
Junction-to-Ambient (PCB Mounted, steady state)
Typ.
Max.
Units
–––
–––
0.74
40
°C/W
1
07/21/03
IRL3803VS/IRL3803VL
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
30
–––
–––
–––
1.0
82
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
LS
Internal Source Inductance
–––
Ciss
Coss
Crss
EAS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Single Pulse Avalanche Energy
–––
–––
–––
–––
V(BR)DSS
IGSS
Typ.
–––
0.028
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
16
180
29
37
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
5.5
VGS = 10V, ID = 71A
mΩ
7.5
VGS = 4.5V, ID = 59A
–––
V
VDS = VGS, ID = 250µA
–––
S
VDS = 25V, ID = 71A
25
VDS = 30V, VGS = 0V
µA
250
VDS = 24V, VGS = 0V, TJ = 150°C
100
VGS = 16V
nA
-100
VGS = -16V
76
ID = 71A
19
nC
VDS = 24V
35
VGS = 4.5V, See Fig. 6 and 13
–––
VDD = 15V
–––
ID = 71A
–––
RG = 1.3Ω
–––
VGS = 4.5V, See Fig. 10
Between lead,
4.5 –––
6mm (0.25in.)
nH
G
from package
7.5 –––
and center of die contact
3720 –––
VGS = 0V
1480 –––
VDS = 25V
270 –––
pF
ƒ = 1.0MHz, See Fig. 5
1560
400 mJ IAS = 71A, L = 0.16mH
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 140
showing the
A
G
integral reverse
––– ––– 470
S
p-n junction diode.
––– ––– 1.2
V
TJ = 25°C, IS = 71A, VGS = 0V
––– 52
78
ns
TJ = 25°C, IF = 71A
––– 91 140
nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11)
Starting TJ = 25°C, L = 160µH
RG = 25Ω, IAS = 71A, VGS=10V (See Figure 12)
ISD ≤ 71A, di/dt ≤ 110A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Pulse width ≤ 400µs; duty cycle ≤ 2%.
This is a typical value at device destruction and
represents operation outside rated limits.
2
This is a calculated value limited to TJ = 175°C .
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
Uses IRL3803 data and test conditions.
This is applied to D2Pak, when mounted on 1" square PCB
(FR-4 or G-10 Material ). For recommended footprint and
soldering techniques refer to application note #AN-994.
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IRL3803VS/IRL3803VL
1000
1000
VGS
15V
10V
4.5V
3.7V
3.5V
3.3V
3.0V
BOTTOM 2.7V
VGS
15V
10V
4.5V
3.7V
3.5V
3.3V
3.0V
BOTTOM 2.7V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
100
2.7V
100
20µs PULSE WIDTH
TJ = 25 °C
10
0.1
1
10
2.7V
10
0.1
100
Fig 1. Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
2.5
TJ = 25 ° C
TJ = 175 ° C
100
V DS = 15V
20µs PULSE WIDTH
3.5
4.5
5.5
Fig 3. Typical Transfer Characteristics
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10
100
Fig 2. Typical Output Characteristics
1000
VGS , Gate-to-Source Voltage (V)
1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
10
2.5
20µs PULSE WIDTH
TJ = 175 ° C
6.5
ID = 120A
2.0
1.5
1.0
0.5
0.0
-60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRL3803VS/IRL3803VL
VGS = 0V,
f = 1MHz
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance (pF)
5000
Ciss
4000
3000
Coss
2000
1000
15
VGS , Gate-to-Source Voltage (V)
6000
ID = 71A
VDS = 24V
VDS = 15V
12
9
6
3
Crss
0
1
10
FOR TEST CIRCUIT
SEE FIGURE 13
0
100
0
20
VDS , Drain-to-Source Voltage (V)
1000
80
100
10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
60
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
TJ = 175 ° C
100
1000
10
TJ = 25 ° C
1
0.1
0.0
V GS = 0 V
0.4
0.8
1.2
1.6
2.0
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
40
QG , Total Gate Charge (nC)
2.4
100
100µsec
1msec
10
Tc = 25°C
Tj = 175°C
Single Pulse
1
1
10msec
10
100
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRL3803VS/IRL3803VL
160
VDS
LIMITED BY PACKAGE
ID , Drain Current (A)
VGS
120
RD
D.U.T.
RG
+
-VDD
V GS
80
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
40
VDS
90%
0
25
50
75
100
125
150
175
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.10
PDM
0.05
0.02
0.01
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRL3803VS/IRL3803VL
L
VDS
DRIVER
D.U.T
RG
+
V
- DD
IAS
20V
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
A
EAS , Single Pulse Avalanche Energy (mJ)
1000
15V
ID
29A
50A
71A
TOP
800
BOTTOM
600
400
200
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( °C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
VGS
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
IG
Charge
Fig 13a. Basic Gate Charge Waveform
6
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRL3803VS/IRL3803VL
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T*
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
RG
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VGS
*
+
-
VDD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
[ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For N-channel HEXFET® power MOSFETs
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7
IRL3803VS/IRL3803VL
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
T HIS IS AN IRF530S WIT H
LOT CODE 8024
ASS EMBLED ON WW 02, 2000
IN T HE ASS EMBLY LINE "L"
INT ERNAT IONAL
RECT IFIER
LOGO
AS SEMBLY
LOT CODE
8
PART NUMBER
F530S
DAT E CODE
YEAR 0 = 2000
WEEK 02
LINE L
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IRL3803VS/IRL3803VL
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
IGBT
1- GATE
2- COLLECTOR
3- EMITTER
TO-262 Part Marking Information
EXAMPLE: T HIS IS AN IRL3103L
LOT CODE 1789
ASS EMBLED ON WW 19, 1997
IN THE ASS EMBLY LINE "C"
INT ERNATIONAL
RECTIFIER
LOGO
AS SEMBLY
LOT CODE
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PART NUMBER
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
9
IRL3803VS/IRL3803VL
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
10.90 (.429)
10.70 (.421)
1.75 (.069)
1.25 (.049)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
Data and specifications subject to change without notice.
This product has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 07/03
10
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