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PD - 9.1308A
IRLZ34NS
PRELIMINARY
HEXFET® Power MOSFET
Logic-Level Gate Drive
Advanced Process Technology
l Surface Mount
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
Description
l
D
l
VDSS = 55V
RDS(on) = 0.035Ω
G
ID = 27A
S
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
device for use in a wide variety of applications.
The D 2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible onresistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0W in a typical surface mount application.
D 2 Pak
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
T STG
Parameter
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
27
19
110
56
0.37
±16
110
16
5.6
10
-55 to + 175
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case)
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient (PCB Mount,steady-state)**
Min.
Typ.
Max.
Units
––––
––––
––––
––––
2.7
40
°C/W
To Order
11/11/96
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IRLZ34NS
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
55
–––
–––
–––
–––
1.0
11
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
LS
Internal Source Inductance
–––
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
V(BR)DSS
IGSS
Typ.
–––
0.065
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
8.9
100
29
21
Max. Units
Conditions
–––
V
VGS = 0V, I D = 250µA
––– V/°C Reference to 25°C, I D = 1mA
0.035
VGS = 10V, ID = 16A
0.046
Ω
VGS = 5.0V, I D = 16A
0.060
VGS = 4.0V, I D = 14A
2.0
V
VDS = VGS , ID = 250µA
–––
S
VDS = 25V, I D = 16A
25
VDS = 55V, VGS = 0V
µA
250
VDS = 44V, VGS = 0V, TJ = 150°C
100
V GS = 16V
nA
-100
VGS = -16V
25
ID = 16A
5.2
nC VDS = 44V
14
V GS = 5.0V, See Fig. 6 and 13
–––
VDD = 28V
–––
I D = 16A
ns
–––
RG = 6.5Ω, VGS = 5.0V
–––
RD = 1.8Ω, See Fig. 10
Between lead,
nH
7.5 –––
and center of die contact
880 –––
VGS = 0V
220 –––
pF
VDS = 25V
94 –––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
IS
ISM
VSD
t rr
Q rr
t on
Min. Typ. Max. Units
Conditions
MOSFET symbol
––– ––– 27
showing the
A
G
integral reverse
––– ––– 110
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 16A, VGS = 0V
––– 76 110
ns
TJ = 25°C, IF = 16A
––– 190 290
nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
D
S
Specification changes
Rev. #
1
Parameters Old spec.
VGS (Max.)
±20
New spec.
±16
Comments
Decrease VGS ( Max). Specification
Notes:
Repetitive rating; pulse width limited by
ISD ≤ 16A, di/dt ≤ 270A/µs, VDD ≤ V(BR)DSS,
max. junction temperature. ( See fig. 11 )
TJ ≤ 175°C
VDD = 25V, starting TJ = 25°C, L = 610µH
Pulse width ≤ 300µs; duty cycle ≤ 2%.
RG = 25Ω, IAS = 16A. (See Figure 12)
Uses IRLZ34N data and test conditions
** When mounted on FR-4 board using minimum recommended footprint.
For recommended footprint and soldering techniques refer to application note #AN-994.
To Order
Revision Date
5/1/96
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IRLZ34NS
1000
1000
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOT TOM 2.5V
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
100
TOP
ID , D ra in -to -S o u rc e C u rre n t (A )
ID , D ra in -to -S o u rc e C u rre n t (A )
TOP
10
1
2.5 V
2 0µ s PU LSE W ID TH
T J = 25 °C
0.1
0.1
1
10
100
10
2.5 V
1
2 0µ s PU L SE W ID TH
T J = 1 75 °C
0.1
A
100
0.1
V D S , Drain-to-S ource V oltage (V)
3.0
R D S (o n ) , D ra in -to -S o u rc e O n R e si sta n ce
(N o rm a li ze d )
I D , D r ain- to-S ourc e C urre nt (A )
100
TJ = 2 5 ° C
TJ = 1 7 5° C
10
1
V DS = 2 5 V
2 0 µ s P U L SE W ID TH
3
4
5
6
7
8
9
A
100
Fig 2. Typical Output Characteristics
1000
2
10
V D S , Drain-to-S ource Voltage (V )
Fig 1. Typical Output Characteristics
0.1
1
10
I D = 2 7A
2.5
2.0
1.5
1.0
0.5
V G S = 10 V
0.0
A
-60
-40 -20
0
20
40
60
80
T J , Junction T em perature (°C )
V G S , Ga te-to-S o urce V oltage (V )
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
To Order
A
100 120 140 160 180
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IRLZ34NS
15
V GS
C is s
C rss
C i ss C oss
C , C a p a c ita n c e (p F )
1200
= 0 V,
f = 1M H z
= C gs + C gd , Cds SH OR TE D
= C gd
= C d s + C gd
V G S , G a te -to -S o u rce V o lta g e (V )
1400
1000
800
C os s
600
400
C rs s
200
0
10
V DS = 44V
V DS = 28V
12
9
6
3
FO R TEST CIR CU IT
SEE FIG UR E 13
0
A
1
I D = 16A
0
100
8
12
16
20
24
28
A
32
Q G , T otal Gate C harge (nC )
V D S , D rain-to-S ource Voltage (V )
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
OPE R ATIO N IN TH IS A RE A LIMITE D
BY R D S(o n)
I D , D ra in C u rre n t (A )
I S D , R e v e rse D ra in C u rre n t (A )
4
100
T J = 17 5°C
TJ = 2 5°C
10
100
10µ s
1 00µs
10
1m s
VG S = 0 V
1
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
A
T C = 25 °C
T J = 17 5°C
S ing le Pulse
1
2.0
1
10m s
A
10
V D S , Drain-to-Source Voltage (V)
V S D , S ource-to-Drain Voltage (V )
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
To Order
100
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IRLZ34NS
30
RD
VDS
VGS
I D , D ra in C u rre n t (A m p s)
25
D.U.T.
RG
+
-VDD
20
5.0V
15
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
10
Fig 10a. Switching Time Test Circuit
VDS
5
90%
A
0
25
50
75
100
125
150
175
TC , C ase T em perature (°C )
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Therm al Response (Z thJC )
10
D = 0.5 0
1
0.2 0
0 .1 0
0.05
0.1
PD M
0.02
0.01
t
0.01
0.00001
1
t2
S IN G LE P U LS E
(TH E R M A L R E S P O NS E )
N o te s :
1 . D u ty fac to r D = t
1
/ t2
2 . P e a k T J = P D M x Z th J C + T C
0.0001
0.001
0.01
0.1
t 1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
To Order
A
1
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IRLZ34NS
D.U.T.
RG
+
V
- DD
IAS
5.0 V
tp
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
E A S , S in g le P u ls e A va la n c h e E n e rg y (m J)
250
L
VDS
TOP
BO TTOM
200
ID
6 .6A
11A
16 A
150
100
50
0
V D D = 2 5V
25
tp
A
50
75
100
125
150
Starting TJ , Junction T emperature (°C)
VDD
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
VDS
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
12V
QG
.2µF
.3µF
5.0 V
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
IG
Charge
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
To Order
175
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IRLZ34NS
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
•
•
•
•
RG
Driver Gate Drive
Period
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D=
-
VDD
P.W.
Period
VGS=10V
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
To Order
*
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IRLZ34NS
D2Pak Package Details
10.54 (.415)
10.29 (.405)
1.40 (.055)
MA X.
-B -
4.69 (.185)
4.20 (.165)
-A2
1.78 (.070)
1.27 (.050)
1
10.16 (.400)
R EF .
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.18 (.243)
15.49 (.610)
14.73 (.580)
3
2.79 (.110)
2.29 (.090)
2.61 (.103)
2.32 (.091)
5.28 (.208)
4.78 (.188)
3X
1.40 (.055)
1.14 (.045)
3X
5.08 (.200)
0.55 (.022)
0.46 (.018)
0.93 (.037)
0.69 (.027)
0.25 (.010)
M
8.89 (.350)
R EF .
1.39 (.055)
1.14 (.045)
M IN IM U M R EC OM M EN D ED F OOT PR IN T
B A M
11.43 (.450)
LE AD ASSIGN M EN T S
1 - GAT E
2 - D RA IN
3 - SOU R C E
N OT ES:
1 D IME NS IO N S AF TE R SO LD ER D IP.
2 D IME NS IO N IN G & T OLER AN C IN G PER AN SI Y14.5M, 1982.
3 C ON T RO LLIN G D IM ENS IO N : IN CH .
4 H EA TSIN K & LEA D D IM E N SIO NS DO NO T INC LU D E BU R R S.
8.89 (.350)
17.78 (.700)
3.81 (.150)
TRR
2.08 (.082)
2X
1 . 6 0 (.0 6 3 )
1 . 5 0 (.0 5 9 )
4 .1 0 (. 1 6 1 )
3 .9 0 (. 1 5 3 )
F E ED D IR E C T IO N
1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
0 .3 6 8 (.0 1 4 5)
0 .3 4 2 (.0 1 3 5)
1 1 .6 0 (.4 5 7 )
1 1 .4 0 (.4 4 9 )
1 .8 5 (.0 7 3 )
1 .6 5 (.0 6 5 )
1 5 .4 2 (.6 0 9 )
1 5 .2 2 (.6 0 1 )
2 4 .3 0 (.9 5 7 )
2 3 .9 0 (.9 4 1 )
TRL
1 .7 5 (. 06 9 )
1 .2 5 (. 04 9 )
10 . 90 (. 42 9 )
10 . 70 (. 42 1 )
IN TE RN A TIO N A L
R E C TIFIE R
LO G O
Tape & Reel
13 .5 0 (.5 32 )
12 .8 0 (.5 04 )
2 7.4 0 (1. 07 9 )
2 3.9 0 (.9 41 )
ASSEMBLY
L OT C OD E
4
33 0 .00
(1 4 .1 73 )
M A X.
N O TES :
1 . C OM F OR M S TO EI A-4 18 .
2 . C ON TR OL L IN G D IM EN S IO N : M IL L IM ETE R .
3 . D IM E NS IO N M E AS U R ED @ H U B .
4 . IN C L U D ES FL AN GE D IS TOR T ION @ O U TE R E D GE .
Part Marking
(This is an IRF530S with assembly lot
code 9B1M )
4 .7 2 (.1 3 6 )
4 .5 2 (.1 7 8 )
1 6 .1 0 (.6 3 4 )
1 5 .9 0 (.6 2 6 )
F EE D D IR EC T IO N
2.54 (.100)
2X
A
PART NUMBER
F 53 0 S
9 24 6
9B
1M
D A TE C O DE
(YY W W )
Y Y = Y EA R
W W = W EEK
6 0.0 0 (2 .3 62 )
M IN .
2 6 .4 0 (1 .0 3 9)
2 4 .4 0 (. 96 1 )
3 0 .4 0 (1 .1 9 7)
M A X.
4
3
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/
Data and specifications subject to change without notice.
11/96
To Order