ISL6185 Features The ISL6185 USB power controller family provides fully independent overcurrent (OC) fault protection for two or more USB ports. • 2.5V to 5V Operating Range This product family consists of sixteen individual functional product variants and three package options and is operation rated for a nominal +2.5V to +5V range and specified over the full commercial and industrial temperature ranges. Each ISL6185 type incorporates in a single package two 71mΩ P-channel MOSFET power switches for power control and features internal current monitoring, accurate current limiting and current limited delay to turn-off for system supply protection along with control and communication I/O. The ISL6185 family offers product variants with specified continuous output current levels of 0.6A, 1.1A, 1.5A or 1.8A, enable active high or low inputs and latch off or automatic retry after over current turn-off making these devices well suited for many low power applications. This family of ICs is offered in an industry std. SOIC pinout and also in the 70% smaller 3x3 DFN packages providing similar or enhanced performance in the smallest possible package. Typical Application D+ U S B C O N T R O L L E R ENABLE_1 USB PORT 1 OUT_1 VIN GND ISL6185 FAULT_2 ENABLE_2 OUT_2 D+ D- • Thermally insensitive 12ms of Current Limiting Prior to Turn-Off • Output Discharges with Reverse Current Blocking when Disabled • Latch-off or Auto Restart Options • 1µA Off-State Supply Current. • Enable Polarity Options • Industry Std Pin for Pin SOIC and Smaller DFN Pkgs Available Applications • USB 1, 2, 3 Port Power Management • Low Power (18W) Electronic Circuit Limiting and Breaker Normalized rDS(ON) Temperature Characteristic Curve 1.3 VBUS FAULT_1 +5V • Continuous Current Options for 0.6A, 1.1A, 1.5A and 1.8A VBUS USB PORT_2 NORMALIZED rDS(ON) D- • 71mΩ Integrated Power P-channel MOSFET Switches 1.2 1.1 1.0 0.9 0.8 0.7 -40 -25 0 25 45 75 TEMPERATURE (°C) 85 115 USB PORT POWER October 22, 2010 FN6937.0 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2010. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL6185 Dual USB Port Power Supply Controller ISL6185 Simplified Block Diagram CHANNEL 1 LIKE CHANNEL 2 FAULT_1 GND + -V comp OUT_1 VIN POR CURRENT AND TEMP. MONITORING, GATE, DELAY & OUTPUT CONTROL LOGIC EN_1 EN_2 OUT_2 FAULT_2 Ordering Information PART NUMBER (Notes 1, 2, 3) PART MARKING EN/EN INPUT VIN = 5V MAXIMUM CONTINUOUS LATCH/AUTO IOUT (A) RETRY TEMP. RANGE (°C) PACKAGE (Pb-free) PKG. DWG. # ISL61851ACBZ 61851A CBZ EN 0.6 LATCH 0 to +70 8 Lead SOIC M8.15 ISL61851BCBZ 61851B CBZ EN 0.6 RETRY 0 to +70 8 Lead SOIC M8.15 ISL61851CCBZ 61851C CBZ EN 1.1 LATCH 0 to +70 8 Lead SOIC M8.15 ISL61851DCBZ 61851D CBZ EN 1.1 RETRY 0 to +70 8 Lead SOIC M8.15 ISL61851ECBZ 61851E CBZ EN 0.6 LATCH 0 to +70 8 Lead SOIC M8.15 ISL61851FCBZ 61851F CBZ EN 0.6 RETRY 0 to +70 8 Lead SOIC M8.15 ISL61851GCBZ 61851G CBZ EN 1.1 LATCH 0 to +70 8 Lead SOIC M8.15 ISL61851HCBZ 61851H CBZ EN 1.1 RETRY 0 to +70 8 Lead SOIC M8.15 ISL61851ICBZ 61851I CBZ EN 1.5 LATCH 0 to +70 8 Lead SOIC M8.15 ISL61851JCBZ 61851J CBZ EN 1.5 RETRY 0 to +70 8 Lead SOIC M8.15 ISL61851KCBZ 61851K CBZ EN 1.5 LATCH 0 to +70 8 Lead SOIC M8.15 ISL61851LCBZ 61851L CBZ EN 1.5 RETRY 0 to +70 8 Lead SOIC M8.15 ISL61852ACRZ 52AC EN 0.6 LATCH 0 to +70 8 Lead DFN L8.3x3J ISL61852BCRZ 52BC EN 0.6 RETRY 0 to +70 8 Lead DFN L8.3x3J ISL61852CCRZ 52CC EN 1.1 LATCH 0 to +70 8 Lead DFN L8.3x3J ISL61852DCRZ 52DC EN 1.1 RETRY 0 to +70 8 Lead DFN L8.3x3J ISL61852ECRZ 52EC EN 0.6 LATCH 0 to +70 8 Lead DFN L8.3x3J ISL61852FCRZ 52FC EN 0.6 RETRY 0 to +70 8 Lead DFN L8.3x3J 2 FN6937.0 October 22, 2010 ISL6185 Ordering Information (Continued) PART NUMBER (Notes 1, 2, 3) PART MARKING EN/EN INPUT VIN = 5V MAXIMUM CONTINUOUS LATCH/AUTO IOUT (A) RETRY TEMP. RANGE (°C) PACKAGE (Pb-free) PKG. DWG. # ISL61852GCRZ 52GC EN 1.1 LATCH 0 to +70 8 Lead DFN L8.3x3J ISL61852HCRZ 52HC EN 1.1 RETRY 0 to +70 8 Lead DFN L8.3x3J ISL61852ICRZ 52IC EN 1.5 LATCH 0 to +70 8 Lead DFN L8.3x3J ISL61852JCRZ 52JC EN 1.5 RETRY 0 to +70 8 Lead DFN L8.3x3J ISL61852KCRZ 52KC EN 1.5 LATCH 0 to +70 8 Lead DFN L8.3x3J ISL61852LCRZ 52LC EN 1.5 RETRY 0 to +70 8 Lead DFN L8.3x3J ISL61853ACRZ 53AC EN 0.6 LATCH 0 to +70 10 Lead DFN L10.3x3 ISL61853BCRZ 53BC EN 0.6 RETRY 0 to +70 10 Lead DFN L10.3x3 ISL61853CCRZ 53CC EN 1.1 LATCH 0 to +70 10 Lead DFN L10.3x3 ISL61853DCRZ 53DC EN 1.1 RETRY 0 to +70 10 Lead DFN L10.3x3 ISL61853ECRZ 53EC EN 0.6 LATCH 0 to +70 10 Lead DFN L10.3x3 ISL61853FCRZ 53FC EN 0.6 RETRY 0 to +70 10 Lead DFN L10.3x3 ISL61853GCRZ 53GC EN 1.1 LATCH 0 to +70 10 Lead DFN L10.3x3 ISL61853HCRZ 53HC EN 1.1 RETRY 0 to +70 10 Lead DFN L10.3x3 ISL61853ICRZ 53IC EN 1.5 LATCH 0 to +70 10 Lead DFN L10.3x3 ISL61853JCRZ 53JC EN 1.5 RETRY 0 to +70 10 Lead DFN L10.3x3 ISL61853KCRZ 53KC EN 1.5 LATCH 0 to +70 10 Lead DFN L10.3x3 ISL61853LCRZ 53LC EN 1.5 RETRY 0 to +70 10 Lead DFN L10.3x3 ISL61853MCRZ 53MC EN 1.8 LATCH 0 to +70 10 Lead DFN L10.3x3 ISL61853NCRZ 53NC EN 1.8 RETRY 0 to +70 10 Lead DFN L10.3x3 ISL61853OCRZ 53OC EN 1.8 LATCH 0 to +70 10 Lead DFN L10.3x3 ISL61853PCRZ 53PC EN 1.8 RETRY 0 to +70 10 Lead DFN L10.3x3 ISL61851AIBZ 61851A IBZ EN 0.6 LATCH -40 to +85 8 Lead SOIC M8.15 ISL61851BIBZ 61851B IBZ EN 0.6 RETRY -40 to +85 8 Lead SOIC M8.15 ISL61851CIBZ 61851C IBZ EN 1.1 LATCH -40 to +85 8 Lead SOIC M8.15 ISL61851DIBZ 61851D IBZ EN 1.1 RETRY -40 to +85 8 Lead SOIC M8.15 ISL61851EIBZ 61851E IBZ EN 0.6 LATCH -40 to +85 8 Lead SOIC M8.15 ISL61851FIBZ 61851F IBZ EN 0.6 RETRY -40 to +85 8 Lead SOIC M8.15 ISL61851GIBZ 61851G IBZ EN 1.1 LATCH -40 to +85 8 Lead SOIC M8.15 ISL61851HIBZ 61851H IBZ EN 1.1 RETRY -40 to +85 8 Lead SOIC M8.15 ISL61851IIBZ 61851I IBZ EN 1.5 LATCH -40 to +85 8 Lead SOIC M8.15 ISL61851JIBZ 61851J IBZ EN 1.5 RETRY -40 to +85 8 Lead SOIC M8.15 ISL61851KIBZ 61851K IBZ EN 1.5 LATCH -40 to +85 8 Lead SOIC M8.15 ISL61851LIBZ 61851L IBZ EN 1.5 RETRY -40 to +85 8 Lead SOIC M8.15 ISL61852AIRZ 52AI EN 0.6 LATCH -40 to +85 8 Lead DFN L8.3x3J ISL61852BIRZ 52BI EN 0.6 RETRY -40 to +85 8 Lead DFN L8.3x3J ISL61852CIRZ 52CI EN 1.1 LATCH -40 to +85 8 Lead DFN L8.3x3J ISL61852DIRZ 52DI EN 1.1 RETRY -40 to +85 8 Lead DFN L8.3x3J ISL61852EIRZ 52EI EN 0.6 LATCH -40 to +85 8 Lead DFN L8.3x3J ISL61852FIRZ 52FI EN 0.6 RETRY -40 to +85 8 Lead DFN L8.3x3J 3 FN6937.0 October 22, 2010 ISL6185 Ordering Information (Continued) PART NUMBER (Notes 1, 2, 3) PART MARKING EN/EN INPUT VIN = 5V MAXIMUM CONTINUOUS LATCH/AUTO IOUT (A) RETRY TEMP. RANGE (°C) PACKAGE (Pb-free) PKG. DWG. # ISL61852GIRZ 52GI EN 1.1 LATCH -40 to +85 8 Lead DFN L8.3x3J ISL61852HIRZ 52HI EN 1.1 RETRY -40 to +85 8 Lead DFN L8.3x3J ISL61852IIRZ 52II EN 1.5 LATCH -40 to +85 8 Lead DFN L8.3x3J ISL61852JIRZ 52JI EN 1.5 RETRY -40 to +85 8 Lead DFN L8.3x3J ISL61852KIRZ 52KI EN 1.5 LATCH -40 to +85 8 Lead DFN L8.3x3J ISL61852LIRZ 52LI EN 1.5 RETRY -40 to +85 8 Lead DFN L8.3x3J ISL61853AIRZ 53AI EN 0.6 LATCH -40 to +85 10 Lead DFN L10.3x3 ISL61853BIRZ 53BI EN 0.6 RETRY -40 to +85 10 Lead DFN L10.3x3 ISL61853CIRZ 53CI EN 1.1 LATCH -40 to +85 10 Lead DFN L10.3x3 ISL61853DIRZ 53DI EN 1.1 RETRY -40 to +85 10 Lead DFN L10.3x3 ISL61853EIRZ 53EI EN 0.6 LATCH -40 to +85 10 Lead DFN L10.3x3 ISL61853FIRZ 53FI EN 0.6 RETRY -40 to +85 10 Lead DFN L10.3x3 ISL61853GIRZ 53GI EN 1.1 LATCH -40 to +85 10 Lead DFN L10.3x3 ISL61853HIRZ 53HI EN 1.1 RETRY -40 to +85 10 Lead DFN L10.3x3 ISL61853IIRZ 53II EN 1.5 LATCH -40 to +85 10 Lead DFN L10.3x3 ISL61853JIRZ 53JI EN 1.5 RETRY -40 to +85 10 Lead DFN L10.3x3 ISL61853KIRZ 53KI EN 1.5 LATCH -40 to +85 10 Lead DFN L10.3x3 ISL61853LIRZ 53LI EN 1.5 RETRY -40 to +85 10 Lead DFN L10.3x3 ISL61853MIRZ 53MI EN 1.8 LATCH -40 to +85 10 Lead DFN L10.3x3 ISL61853NIRZ 53NI EN 1.8 RETRY -40 to +85 10 Lead DFN L10.3x3 ISL61853OIRZ 53OI EN 1.8 LATCH -40 to +85 10 Lead DFN L10.3x3 ISL61853PIRZ 53PI EN 1.8 RETRY -40 to +85 10 Lead DFN L10.3x3 ISL61851EVAL1Z 8 Lead SOIC Evaluation Platform ISL61852EVAL1Z 8 Lead DFN Evaluation Platform ISL61853EVAL1Z 10 Lead DFN Evaluation Platform NOTES: 1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL6185. For more information on MSL please see techbrief TB363. 4 FN6937.0 October 22, 2010 ISL6185 Pin Configurations ISL6185 (10 LD DFN) TOP VIEW ISL6185 (8 LD SOIC/DFN) TOP VIEW GND VIN 1 2 EN1/EN1 3 EN2/EN2 4 (GND) EPAD DFN Only GND 1 VIN 2 OUT1 VIN 3 6 OUT2 EN1/EN1 4 5 EN2/EN2 5 FLT2 8 FLT1 7 10 FLT1 (GND) EPAD 9 OUT1 8 NC 7 OUT2 6 FLT2 Pin Descriptions PIN NUMBER 8 Ld SOIC/DFN 10 Ld DFN SYMBOL 1 1 GND IC ground reference 2 2, 3 VIN Chip bias, Controlled Voltage Input, Undervoltage Lock Out (UVLO). VIN provides chip bias voltage. At VIN < 1.7V chip functionality is disabled, FLT is active and floating and OUT is held low. Range 0V to 5.5V 3, 4 4, 5 EN1, EN1/ EN2, EN2 Enable/Disable inputs, Active high (EN) and active low (EN) options enable the power switch. These inputs have internal 1MΩ pull off resistors. Range 0V to VIN 5, 8 6, 10 FLT2 FLT1 Overcurrent Fault Indicator. Overcurrent fault indicator. FLT floats and is disabled until VIN >VUVLO. This output is pulled low after the current limit time-out period has expired. Fault is not signaled due to over-temperature shut down. Range 0V to VIN 6, 7 7, 9 OUT2, OUT1 Controlled Supply Output. Upon an OC condition IOUT is current limited. Current limit response time is within 200µs. This output will remain in current limit for a nominal 12ms before being turned off either for the latch or auto retry versions. Range 0V to VIN - 8 NC PD (DFN only) PD EPAD 5 DESCRIPTION This pin is not electrically connected internally Thermal Dissipation Exposed PAD Range: Connect to GND FN6937.0 October 22, 2010 ISL6185 Absolute Maximum Ratings Thermal Information Supply Voltage (VIN to GND, Note 7) . . . . . . . . . . . . . .6.5V EN, FAULT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VIN OUT . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VIN 0.3V Output Current . . . . . . . . . . . . . . . . Short Circuit Protected ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7) 3kV Machine Model (Per MIL-STD-883 Method 3015.7). . . 300V Latch Up (Tested per JESD-78B; Class 2, Level A) . . . 100mA Thermal Resistance (Typical, Note 4) θJA (°C/W) θJC (°C/W) 8 Lead SOIC Package (Note 4) . . . 120 N/A 8 Lead 3x3 DFN Package (Notes 5, 6) 48 6 10 Lead 3x3 DFN Package (Notes 5, 6) 53 6 Maximum Junction Temperature . . . . . . . . . . . . . . +150°C Maximum Storage Temperature Range . . . . -65°C to +150°C Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Operating Conditions Commercial Temperature Range. . . . . . . . . . . 0°C to +70°C Industrial Temperature Range . . . . . . . . . . . -40°C to +85°C Supply Voltage Range (Typical) . . . . . . . . . . . . 2.3V to 5.5V CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 4. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 5. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 6. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside. 7. All voltages are relative to GND, unless otherwise specified. Electrical Specifications SYMBOL VIN = 5V, TA = TJ, Unless Otherwise Specified. Boldface limits apply over the operating temperature range, 0°C to +75°C or -40°C to +85°C. PARAMETER TEST CONDITIONS MIN MAX (Note 8) TYP (Note 8) UNITS POWER SWITCH rDS(ON)_50 rDS(ON)_33 rDS(ON)_25 ON-Resistance at 5.0V (Pulse Tested) ON-Resistance at 3.3V (Pulse Tested) On Resistance at 2.5V (Pulse Tested) VIN = 5V, IOUT = 0.1A, TA = TJ = +25°C - TA = TJ = +85°C - VIN = 3.3V, IOUT = 0.1A, TA = TJ = +25°C - TA = TJ = +85°C - VIN = 2.5V, IOUT = 0.1A, TA = TJ = +25°C - TA = TJ = +85°C - 71 90 114 87 mΩ 110 mΩ 105 mΩ 130 mΩ 127 mΩ 150 mΩ VOUT_DIS Disabled Output Voltage VIN = 5V, Switch Disabled, 50µA Load - 50 70 mV ROUT_PU Output Pull-Down Resistor VIN = 5V, Switch Disabled 8 9.6 12 kΩ tR VOUT Rise Time RL = 10Ω, CL=10µF, 10% to 90% - 100 - µs tF Slow VOUT Turn-off Fall Time RL = 10Ω, CL=10µF, 90% to 10% - 200 - µs tF_fast Fast VOUT Turn-off Fall Time RL = 1Ω, CL=10µF, 80% to 20% - 23 - µs CURRENT CONTROL IOUT_CONT_5 Maximum Continuous Current, VIN = 5V. IOUT_CONT_5 Guaranteed by Itrip minimum IOUT_CONT_5 specification. ISL6185xA,B,E,F - 0.6 A ISL6185xC,D,G,H - 1.1 A ISL6185xI,J,K,L - 1.5 A IOUT_CONT_5 ISL61853M,N,O,P (10 Ld DFN) - 1.8 A IOUT_CONT_3 Maximum Continuous Current, VIN = 3.3V. IOUT_CONT_3 Guaranteed by Itrip minimum IOUT_CONT_3 specification. ISL6185xA,B,E,F - 0.6 A ISL6185xC,D,G,H - 0.9 A ISL61851I,J,K,L (SOIC) - 1.3 A IOUT_CONT_3 ISL61852, ISL61853 (DFN) - 1.5 A 6 FN6937.0 October 22, 2010 ISL6185 Electrical Specifications SYMBOL VIN = 5V, TA = TJ, Unless Otherwise Specified. Boldface limits apply over the operating temperature range, 0°C to +75°C or -40°C to +85°C. (Continued) PARAMETER TEST CONDITIONS MIN MAX (Note 8) TYP (Note 8) UNITS IOUT_CONT_2 Maximum Continuous Current, VIN = 2.5V ISL6185xA,B,E,F - 0.6 - A IOUT_CONT_2 ISL61851C,D,G,H (SOIC) - 0.9 - A IOUT_CONT_2 ISL61852, ISL61853 C,D,G,H (DFN) - 1 - A IOUT_CONT_2 ISL61853I,J,K,L (10 Ld DFN) - 1 - A IOUT_CONT_2 ISL61853M,N,O,P (10 Ld DFN) - 1 - A ISL6185xA,B,E,F 0.70 1.02 1.52 A ITRIP_5 ISL6185xC,D,G,H 1.15 1.45 1.95 A ITRIP_5 ISL61853I,J,K,L 1.55 1.82 2.25 A ITRIP_5 ISL61853M.N,O,P 1.85 1.99 2.15 A ISL6185xA,B,E,F 0.65 0.86 1.20 A ITRIP_3 ISL6185xC,D,G,H 0.95 1.25 1.60 A ITRIP_3 ISL61853I,J,K,L 1.35 1.60 1.85 A ITRIP_3 ISL61853M.N,O,P 1.55 1.89 2.25 A ISL6185xA,B,E,F - 0.65 - A ITRIP_2 ISL6185xC,D,G,H - 1 - A ITRIP_2 ISL61853I,J,K,L - 1.2 - A ITRIP_5 ITRIP_3 ITRIP_2 Trip Current, VIN = 5V Trip Current, VIN = 3.3V Trip Current, VIN = 2.5V ISL61853M.N,O,P - 1.6 - A ISL6185xA,B,E,F, VIN - VOUT = 1V 0.50 0.65 0.78 A ILIM_5 ISL6185xC,D,G,H, VIN - VOUT = 1V 0.98 1.14 1.28 A ILIM_5 ISL61853I,J,K,L, VIN - VOUT = 1V 1.30 1.55 1.72 A ILIM_5 ISL61853M,N,O,P, VIN - VOUT = 1V 1.52 1.83 2.20 A ITRIP_2 ILIM_5 Current Limit, VIN = 5V ISL6185xA,B,E,F, VIN - VOUT = 1V 0.45 0.63 0.75 A ILIM_3 ISL6185xC,D,G,H, VIN - VOUT = 1V 0.90 1.10 1.26 A ILIM_3 ISL61853I,J,K,L, VIN - VOUT = 1V 1.25 1.50 1.68 A ILIM_3 ISL61853M,N,O,P, VIN - VOUT = 1V 1.48 1.78 2.05 A ISL6185xA,B,E,F, VIN - VOUT = 1V 0.47 0.61 0.74 A ILIM_2 ISL6185xC,D,G,H, VIN - VOUT = 1V 0.90 1.05 1.17 A ILIM_2 ISL61853I,J,K,L, VIN - VOUT = 1V 1.15 1.37 1.58 A ILIM_2 ISL61853M,N,O,P, VIN - VOUT = 1V 1.3 1.63 1.90 A 0.60 0.80 1.00 A ILIM_3 ILIM_2 Isc_5 Current Limit, VIN = 3.3V Current Limit, VIN = 2.5V Short Circuit Current, VIN = 5V ISL6185xA,B,E,F, VOUT = 0V Isc_5 ISL6185xC,D,G,H, VOUT = 0V 1.00 1.27 1.55 A Isc_5 ISL61853I,J,K,L, VOUT = 0V 1.15 1.61 1.85 A ISL61853M,N,O,P, VOUT = 0V 1.20 1.70 2.5 A ISL6185XA,B,E,F, VOUT = 0V 0.35 0.48 0.60 A ISL6185XC,D,G,H, VOUT = 0V 0.65 0.80 0.95 A Isc_3 ISL61853I,J,K,L, VOUT = 0V 0.70 1.06 1.25 A Isc_3 ISL61853M,N,O,P, VOUT = 0V 0.90 1.24 1.50 A ISL6185xA,B,E,F, VOUT = 0V - 0.61 ISL6185xC,D,G,H, VOUT = 0V - 1.06 - A Isc_2 ISL61853I,J,K,L, VOUT = 0V - 1.30 - A Isc_2 ISL61853M,N,O,P, VOUT = 0V - 1.39 - A Isc_5 Isc_3 Isc_3 Isc_2 Isc_2 Short Circuit Current, VIN = 3.3V Short Circuit Current, VIN = 2.5V 7 A FN6937.0 October 22, 2010 ISL6185 Electrical Specifications SYMBOL tsettIlim VIN = 5V, TA = TJ, Unless Otherwise Specified. Boldface limits apply over the operating temperature range, 0°C to +75°C or -40°C to +85°C. (Continued) PARAMETER TEST CONDITIONS MIN MAX (Note 8) TYP (Note 8) UNITS OC to Limit Settling Time VIN/RL = 2ILIM, CL = 10µF to within 10% of ILIM - 200 - µs Severe OC to Limit Settling Time VIN/RL = 4ILIM, CL = 10µF to within 10% of ILIM - 30 - µs tCL Current Limit Duration IOUT = ILIM 9.2 12 15 ms tRTY Automatic Retry Period 0.80 1 1.35 s tsettIlim_sev I/O PARAMETERS Vfault_lo Ifault Fault Output Voltage Fault IOUT = 10mA Fault Leakage - - 0.4 V - 5 - µA Venr_5 ENABLE Rising Threshold VIN = 5V 1.5 1.8 2 V Hys_Venr_5 ENABLE Rising Threshold Hysteresis VIN = 5V 80 140 175 mV Venr_3 ENABLE Rising Threshold VIN = 3.3V 1.0 1.3 1.6 V Hys_Venr_3 ENABLE Rising Threshold Hysteresis VIN = 3.3V 58 80 120 mV Venr_2 ENABLE Rising Threshold VIN = 2.5V 0.95 1.1 1.3 V Hys_Venr_2 ENABLE Rising Threshold Hysteresis VIN = 2.5V 30 70 110 mV Ren_h ENABLE Pull-Down Resistor Enable asserted high options 0.6 1 1.55 MΩ Ren_l ENABLE Pull-Up Resistor Enable asserted low options 0.6 1 1.55 MΩ tON Enable to Output Turn-on Time RL = 10Ω, CL = 10µF, Enable 50% to Output 90% - 0.1 - ms tOFF Enable to Output Turn-off Time RL = 10Ω, CL = 10µF, Enable 50% to Output 10% - 0.25 - ms 50 75 µA BIAS PARAMETERS IVDD Enabled VIN Current Switches Closed, OUTPUT = OPEN IVDD Disabled VIN Current Switches Open, OUTPUT = OPEN - 2 5 µA VUVLO Rising POR Threshold VIN Rising to functional operation 1.7 2.1 2.3 V UVHYS POR Hysteresis 200 360 580 mV 2 µA IVR Reverse Blocking Leakage Current VIN = 0V, VOUT = 5V - Temp_dis Over-Temperature Disable - 150 - °C Temp_hys Over-Temperature Hysteresis - 20 - °C NOTE: 8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 8 FN6937.0 October 22, 2010 ISL6185 Introduction Functional Description The ISL6185 is a dual channel fully independent overcurrent (OC) fault protection IC for the +2.5V to +5V environment. Each ISL6185 incorporates in a single package two 85mΩ P-channel MOSFET power switches for power control. Independent enabling inputs and fault reporting outputs compatible with 2.5V to 5V logic allows for external control and reporting. This device features integrated power switches with current monitoring, accurate current limiting, reverse bias protection and current limited timed delay to turn-off for system reliability. See Figures 11 through 26 for typical operational waveforms including both under and overcurrent situations. The ISL6185 offers current sense and limiting with VIN = 5V guaranteed continuous current product variants of 0.6A, 1.1A, 1.5A and 1.8A making these devices well suited for a myriad of USB and other low power (9W max) port power management applications and configurations. The ISL6185 also provides a thermally insensitive timed OC turn-off and fault notification, isolating and protecting the voltage bus in the event of a peripheral OC event or short circuit event independent of the adjoining switch’s electrical or the ambient thermal condition. The ISL6185 undervoltage lockout feature prevents turn-on of the outputs unless the correct ENABLE state and VIN > VUVLO are present. During initial turn-on the ISL6185 prevents fault reporting by blanking the fault signal. During operation, once an OC condition is detected the output is current limited for tCL to allow transient OC conditions to pass. If still in current limit after the current limit period has elapsed, the output is then turned off and the fault is reported by pulling the corresponding FAULT output low. On the latch off options, after turn-off both the output and the FAULT signal are latched low until reset by the enable signal being de-asserted or a POR occurs at which time the FAULT signal will clear and the switch is ready to be turned back on. On the auto restart options the ISL6185 will attempt to periodically turn-on the output as long as the enable is asserted. When disabled the ISL6185 has a low quiescent supply current and output to input reverse current flow blocking capability. The ISL6185 family is provided with enable polarity options and an industry standard 8 lead SOIC pinout along with two versions in the 70% smaller 3x3 DFN. The 8 Ld DFN package offers the same performance as the 8 Ld SOIC whereas the 10 Ld DFN offers higher current capability in the smallest possible package because of lower package electrical and thermal resistance. 9 Power On Preset (POR) The ISL6185 POR feature inhibits device functionality when VIN <VUVLO. Reverse Polarity Protection In any event where the power switch is disabled and VOUT > VIN there will be no output to input current flow nor will the output voltage appear on the input. Soft-Start Upon enable, the switch passes a constant current to the load. The voltage on the VOUT pin will ramp up according the equation: ILIM/COUT (V/s). Resistive or active load will slow the VOUT ramp up toward the top of its curve. Fault Blanking On Start-Up During initial turn-on, the ISL6185 prevents nuisance faults being reported to the system controller by blanking the fault signal until the internal FET is fully enhanced. Current Trip and Limiting Levels The ISL6185 provides integrated current sensing in the MOSFET that allows for rapid control of OC events. Once an OC condition is detected the ISL6185 goes into its current limiting (CL) control mode. The ISL6185 is variant specified to allow a continuous current (ICONT) operation of 0.6A, 1.1A, 1.5A or 1.8A. As the current increases past its continuous current rating it will reach a level that causes the device to enter its current limit mode, that is the current trip level. The current trip level is in all cases adequately above the ICONT rating as to not cause unintended false faults. The current limit is specified at VOUT = VIN - 1V to test a known representative condition and is featured at a nominal value slightly higher than the continuous current rating. The speed of this current limiting control is inversely related to the magnitude of the OC fault. Thus a hard overcurrent is more quickly pulled to its limiting value than a marginal OC condition. Over-Temperature Shutdown Although the ISL6185 has an over-temperature shutdown and lockout feature, because of the 12ms timed shutdown the thermal shutdown is likely only to be invoked in extremely high ambient temperatures. The over- temperature protection invokes and disables the switch turn-on operation once the die temperature is ~+140°C, it will turn off an already on switch at ~+150°C and releases the part to operation once the die temperature falls to ~+120°C. FN6937.0 October 22, 2010 ISL6185 Turn-off Time Delay During operation, once an OC condition is detected the output is current limited for ~12ms to allow transient OC conditions to pass. If still in current limit and after the current limit period has elapsed, the output is then turned off and the fault is reported by pulling the corresponding FAULT low. The internal 12ms timer starts upon current limiting and is independent of ambient or IC thermal conditions providing more consistent operation over the entire temp range. Latchoff Restart/Auto-Restart Start After turn-off, with the latch off options both the output and the FAULT signal are latched low until reset by the enable signal being de-asserted at which time the FAULT signal will clear and the IC is ready for enable to assert. On the auto restart options the ISL6185 will attempt to periodically turn-on the output at approximately 1s intervals as long as the enable is asserted. If the OC condition remains indefinitely so will the fault indication and the restart attempts until such time that the thermal protection feature is invoked increasing the restart period. Active Output Pull-down Another ISL6185 feature is the 10kΩ active pull-down on the outputs to <60mV above GND when the device is disabled ensuring discharge of the load. Typical Performance Curves 150 1.3 130 VIN = 2.5V 120 110 100 VIN = 3.3V 90 80 VIN = 5V 70 60 50 -40 -25 0 25 45 75 TEMPERATURE (°C) 85 0.6 0.5 0.4 3.3V ITRIP 5V ISC 5V ILIM 3.3V ILIM 3.3V ISC -40 -25 0.9 0.8 1.5 0.8 0.7 1.0 -40 -25 0 25 45 75 TEMPERATURE (°C) 85 115 1.6 5V ITRIP 1.0 0.9 1.1 FIGURE 2. NORMALIZED SWITCH RESISTANCE OUTPUT CURRENT (A) OUTPUT CURRENT (A) 1.1 1.2 0.7 115 FIGURE 1. SWITCH ON-RESISTANCE AT 0.5A 1.2 NORMALIZED rDS(ON) rDS(ON) @ 0.5A (mΩ) 140 0 25 45 75 TEMPERATURE (°C) FIGURE 3. 0.6A CONTINUOUS CURRENT CHARACTERISTICS 10 85 115 1.4 1.3 1.2 1.1 5V ITRIP 5V ISC 3.3V ITRIP 5V ILIM 1.0 3.3V ILIM 0.9 0.8 3.3V ISC 0.7 0.6 -40 -25 0 25 45 75 TEMPERATURE (°C) 85 115 FIGURE 4. 1.1A CONTINUOUS CURRENT CHARACTERISTICS FN6937.0 October 22, 2010 ISL6185 (Continued) 2.0 2.2 1.8 5V ITRIP 2.0 1.6 1.4 3.3V ITRIP 5V ISC 5V ILIM 3.3V ILIM 1.2 3.3V ISC 1.0 0.8 -40 -25 0 25 45 75 85 OUTPUT CURRENT (A) OUTPUT CURRENT (A) Typical Performance Curves 3.3V ITRIP 1.8 1.6 3.3V ILIM 3.3V ISC 1.2 -40 -25 TEMPERATURE (°C) FIGURE 5. 1.5A CONTINUOUS CURRENT CHARACTERISTICS 1.25 +3 SIGMA 0.65 TYPICAL 0.60 -3 SIGMA 0.55 0.50 -40 -25 0 25 45 75 TEMPERATURE (°C) 85 ILIMIT ± 3 SIGMA +3 SIGMA 1.55 TYPICAL -3 SIGMA 1.45 1.40 +3 SIGMA 1.15 TYPICAL 1.10 -3 SIGMA 1.05 2.00 1.60 1.35 115 -40 -25 0 25 45 75 TEMPERATURE (°C) 85 115 FIGURE 8. LIMITING CURRENT ±3 SIGMA, VIN = 5V 1.5A CONTINUOUS IOUT VERSION 1.50 85 1.1A CONTINUOUS IOUT VERSION 1.20 1.00 115 FIGURE 7. LIMITING CURRENT ±3 SIGMA, VIN = 5V 1.65 ILIMIT ± 3 SIGMA 0.6A CONTINUOUS IOUT VERSION 0.70 0 25 45 75 TEMPERATURE (°C) FIGURE 6. 1.8A CONTINUOUS CURRENT CHARACTERISTICS 1.95 ILIMIT ± 3 SIGMA ILIMIT ± 3 SIGMA 0.75 5V ISC 5V ILIM 1.4 1.0 115 5V ITRIP 1.8A CONTINUOUS IOUT VERSION +3 SIGMA 1.90 1.85 TYPICAL 1.80 -3 SIGMA 1.75 1.70 1.65 -40 -25 0 25 45 75 85 115 TEMPERATURE (°C) FIGURE 9. LIMITING CURRENT ±3 SIGMA, VIN = 5V 11 1.60 -40 -25 0 25 45 75 TEMPERATURE (°C) 85 115 FIGURE 10. LIMITING CURRENT ±3 SIGMA, VIN=5V FN6937.0 October 22, 2010 ISL6185 Typical Performance Curves (Continued) ENABLE CL=1µF ENABLE CL=10µF VOUT 1V/DIV CL=10µF CL=100µF CL=100µF VOUT 1V/DIV CL=1µF FIGURE 11. VOUT TURN-ON/RISE TIME vs CLOAD. VIN = 5V, RL = 10Ω FIGURE 12. VOUT TURN-OFF/FALL TIME vs CLOAD. VIN = 5V, RL = 10Ω 0.6A ICONT VARIANT FLT VOUT 1V/DIV CL=10µF VOUT CL=100µF IIN CL=1µF FIGURE 13. LATCH-OFF vs CLOAD 0.6A ICONT VARIANT FIGURE 14. ILIM WAVEFORM 0.6A ICONT VARIANT 2A OC 27µs 6A/ms 0.6A/ms 1A OC 57µs 0.08A/ms 0.5A OC 200µs 0.72A CURRENT LIMIT 0.53A LOAD CURRENT 0.56A LOAD CURRENT IIN 2A/DIV FIGURE 15. OC RAMP RATE ILIM WAVEFORMS 12 0.66A CURRENT LIMIT FIGURE 16. PEAK CURRENT SETTLING TIMES FN6937.0 October 22, 2010 ISL6185 Typical Performance Curves (Continued) ENABLE ENABLE 0.6A ICONT VARIANT 0.6A ICONT VARIANT VOUT FAULT FAULT IIN LIMITED TO 0.64A IIN VOUT FIGURE 18. TURN-ON INTO MOMENTARY OC FIGURE 17. TURN-ON INTO A SHORT 1.1A ICONT VARIANT FLT VOUT VOUT FLT IIN IIN FIGURE 19. ISL6185 RETRY FUNCTION FIGURE 20. ILIM WAVEFORM ENABLE ENABLE FAULT FAULT VOUT VOUT Iin IIN 1.8A ICONT VARIANT FIGURE 21. VIN = 2.5V TURN-ON INTO 2.2Ω 13 1.8A ICONT VARIANT FIGURE 22. VIN = 5V TURN-ON INTO 2.7Ω FN6937.0 October 22, 2010 ISL6185 Typical Performance Curves (Continued) CH1 and CH2 ON (3.6A TOTAL IIN) IIN ENABLE FAULT VOUT CH1 ON (1.8A) IIN LIMITED TO 1.7A ENABLE FAULT 1.8A ICONT VARIANT 1.8A ICONT VARIANT VOUT FIGURE 24. TURN-ON 2ND OUTPUT TO FULL LOAD FIGURE 23. TURN-ON INTO A SHORT 1.1A ICONT VARIANT FLT VOUT VOUT FLT IIN IIN FIGURE 25. ISL6185 RETRY FUNCTION FIGURE 26. ILIM WAVEFORM FIGURE 26. PROPAGATION DELAY AND OUTPUT TRANSITION TIMES Test Circuits + V 10k 10k FLT FLT 5V VIN OUT ISL6185 OUTPUT 10µF EN 5V VIN EN 10 OUT ISL6185 OUTPUT 10µF 10 RL sized for desired OC level RL rDS(ON) = V/(VOUT/10Ω) FIGURE 27A. rDS(ON) FIGURE 27B. CURRENT LIMITING FIGURE 27. DC TEST CIRCUIT 14 FN6937.0 October 22, 2010 ISL6185 Test Circuits (Continued) VIN EN 0.5VIN 0.5VIN 10k 0V tON FLT 5V VIN 0-VIN OUT ISL6185 OUTPUT 10µF EN OUTPUT tOFF VIN 90% 10% 10 90% OUTPUT 10% tR FIGURE 28A. TRANSIENT TEST CIRCUIT 90% 10% GND VIN -GND tF FIGURE 29. TRANSIENT WAVEFORM MEASUREMENT POINTS ISL6185xEVAL1Z Schematic and Photo R1 10k R3 AGND C1 V+ 2.2µF A AGND V+ EN1 U1 ISL6185 FLT1 OUT1 OUT2 FLT2 EN2 A A 10 C2 10µF R4 10 C3 R2 FLT1 OUT1 10µF A OUT2 A FLT2 10k NOTE: EXPOSED PAD only on DFN packages FIGURE 30A. ISL6185xEVAL SCHEMATIC FIGURE 30B. ISL61851EVAL1Z BOARD PHOTO FIGURE 30. ISL6185xEVAL1Z SCHEMATIC and ISL61851EVAL1Z PHOTOGRAPH 15 FN6937.0 October 22, 2010 ISL6185 Application Information Using the ISL6185xEVAL1Z Platform General and Biasing Information There are three (3) evaluation platforms for the ISL6185 family. There is one (1) for each package style, each with a different continuous output current level and a mix of enable polarity and output retry or latch options. See the bottom of Table 1 for standard available evaluation board options. Figure 30A, illustrates the common schematic for all of the evaluation boards, consult the individual package pinouts for those differences. The evaluation platform is biased and monitored through numerous labeled test points. See Table 1 for test point assignments and descriptions. TABLE 1. ISL61851EVAL1Z TEST POINT ASSIGNMENTS TP NAME DESCRIPTION GND Eval Board and IC Gnd V+ Eval Board and IC Bias EN1 Enable Switch 1 EN2 Enable Switch 2 FLT2 Switch 2 Fault OUT2 Switch Out 2 OUT1 Switch Out 1 FLT1 Switch 1 Fault Upon proper bias and of the evaluation platform and correct enabling of the IC the ISL6185 will have a nominal VIN/10Ω load current passing through each enabled switch which is below the continuous current rating. See Figures 11 and 12 for typical ISL6185 turn-on and off waveforms. External current loading in excess of the trip current level for the particular part being evaluated will result in the ISL6185 entering the current limiting mode. Figure 14 illustrates the current limiting mode for the ISL6185 product variants with 0.6A of continuous load current rating. The scope shot shows current limiting for ~12ms before it is turned off and the fault signal is asserted. 16 Application Considerations The application considerations for the ISL6185 family are widely accepted best industry practices. Good decoupling practices on the VIN pin must be followed with placement close to the IC with at least 2.2µF being recommended. Work to reduce the input and output inductance to the ISL6185 with good PCB layout practices. When designing with the 1.5A and 1.8A versions in an implementation where the output may be unloaded (open) while the ISL6185 is turned on, a minimum of 4.7µF of capacitive output load is recommended to prevent high dv/dt from unnecessarily activating the surge/ESD control circuit. The ISL6185 provides several continuous current rated devices specified at VIN = 5V, these are 0.6A, 1.1A, 1.5A and 1.8A options capable over the entire temperature extreme. At VIN = 3.3V the current capability is degraded and the ISL6185 is specified at 0.6A, 1.1A, 1.3A and 1.5A respectively. At VIN = 2.5V there are no min specifications but a typical value is provided for +25°C operation in the specification table. This degraded capability is due to the higher rDS(ON) of the FET switch at the lower bias voltage. The enhanced thermal characteristics and increased number of bond wires allows the 10 Ld DFN to have a higher current capability than either the 8 Ld SOIC or DFN. TABLE 2. ISL6185XEVAL1Z BOARD COMPONENT LISTING COMPONENT DESIGNATOR U1 COMPONENT FUNCTION COMPONENT DESCRIPTION ISL6185 Intersil, ISL6185 R3 - R4 Output Load Resistors 10Ω, 5%, 3W R1 - R2 FLT Output pull up resistor 10kΩ, 0805 Decoupling Capacitor 2.2µF, 0805 Load Capacitor 10µF 16V Electrolytic, Radial Lead C1 C2 - C3 FN6937.0 October 22, 2010 ISL6185 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. DATE REVISION 10/22/10 FN6937.0 CHANGE Initial release. Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a complete list of Intersil product families. *For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL6185 To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff FITs are available from our website at http://rel.intersil.com/reports/search.php 17 FN6937.0 October 22, 2010 ISL6185 Package Outline Drawing L8.3x3J 8 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE Rev 0 9/09 2X 1.950 3.00 B 0.15 8 5 3.00 (4X) 6X 0.65 A 1.64 +0.10/ - 0.15 6 PIN 1 INDEX AREA 6 PIN #1 INDEX AREA 1 4 4 8X 0.30 8X 0.400 ± 0.10 TOP VIEW 0.10 M C A B 2.38 +0.10/ - 0.15 BOTTOM VIEW SEE DETAIL "X" ( 2.38 ) ( 1.95) 0.10 C Max 1.00 C 0.08 C SIDE VIEW ( 8X 0.60) (1.64) ( 2.80 ) PIN 1 C 0 . 2 REF 5 (6x 0.65) 0 . 00 MIN. 0 . 05 MAX. ( 8 X 0.30) DETAIL "X" TYPICAL RECOMMENDED LAND PATTERN NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal ± 0.05 4. Dimension applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 5. Tiebar shown (if present) is a non-functional feature. 6. 18 The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. FN6937.0 October 22, 2010 ISL6185 Package Outline Drawing L10.3x3 10 LEAD DUAL FLAT PACKAGE (DFN) Rev 6, 09/09 3.00 6 PIN #1 INDEX AREA A B 1 6 PIN 1 INDEX AREA (4X) 3.00 2.00 8x 0.50 2 10 x 0.23 4 0.10 1.60 TOP VIEW 10x 0.35 BOTTOM VIEW 4 (4X) 0.10 M C A B 0.415 PACKAGE OUTLINE 0.200 0.23 0.35 (10 x 0.55) SEE DETAIL "X" (10x 0.23) 1.00 MAX 0.10 C BASE PLANE 2.00 0.20 C SEATING PLANE 0.08 C SIDE VIEW (8x 0.50) C 0.20 REF 5 1.60 0.05 TYPICAL RECOMMENDED LAND PATTERN DETAIL "X" NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal ± 0.05 4. Lead width applies to the metallized terminal and is measured between 0.18mm and 0.30mm from the terminal tip. 5. Tiebar shown (if present) is a non-functional feature. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 indentifier may be either a mold or mark feature. 19 FN6937.0 October 22, 2010 ISL6185 Small Outline Plastic Packages (SOIC) M8.15 (JEDEC MS-012-AA ISSUE C) N 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INDEX AREA 0.25(0.010) M H B M INCHES E SYMBOL -B- 1 2 3 L SEATING PLANE -A- A D h x 45° -C- e A1 B 0.25(0.010) M C 0.10(0.004) C A M MIN MAX MIN MAX NOTES A 0.0532 0.0688 1.35 1.75 - A1 0.0040 0.0098 0.10 0.25 - B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 - D 0.1890 0.1968 4.80 5.00 3 E 0.1497 0.1574 3.80 4.00 4 e α B S 0.050 BSC 1.27 BSC - H 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 N α NOTES: MILLIMETERS 8 0° 8 8° 0° 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 7 8° Rev. 1 6/05 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 20 FN6937.0 October 22, 2010