NSC LM2940IMPX-12

LM2940/LM2940C
1A Low Dropout Regulator
General Description
The LM2940/LM2940C positive voltage regulator features the
ability to source 1A of output current with a dropout voltage of
typically 0.5V and a maximum of 1V over the entire temperature range. Furthermore, a quiescent current reduction circuit has been included which reduces the ground current
when the differential between the input voltage and the output
voltage exceeds approximately 3V. The quiescent current
with 1A of output current and an input-output differential of 5V
is therefore only 30 mA. Higher quiescent currents only exist
when the regulator is in the dropout mode (VIN − VOUT ≤ 3V).
Designed also for vehicular applications, the LM2940/
LM2940C and all regulated circuitry are protected from reverse battery installations or 2-battery jumps. During line
transients, such as load dump when the input voltage can
momentarily exceed the specified maximum operating volt-
age, the regulator will automatically shut down to protect both
the internal circuits and the load. The LM2940/LM2940C cannot be harmed by temporary mirror-image insertion. Familiar
regulator features such as short circuit and thermal overload
protection are also provided.
Features
■
■
■
■
■
■
■
Dropout voltage typically 0.5V @IO = 1A
Output current in excess of 1A
Output voltage trimmed before assembly
Reverse battery protection
Internal short circuit current limit
Mirror image insertion protection
P+ Product Enhancement tested
Typical Application
882203
*Required if regulator is located far from power supply filter.
**COUT must be at least 22 μF to maintain stability. May be increased without bound to maintain regulation during transients. Locate as close as possible to
the regulator. This capacitor must be rated over the same operating temperature range as the regulator and the ESR is critical; see curve.
Ordering Information
Temp
Range
0°C
≤ TJ ≤
125°C
Output Voltage
Package
5.0
8.0
9.0
10
12
15
LM2940CT-5.0
–
LM2940CT-9.0
–
LM2940CT-12
LM2940CT-15
LM2940CS-5.0
–
LM2940CS-9.0
–
LM2940CS-12
LM2940CS-15
–
LM2940CSX
-9.0
–
LM2940CSX
-12
LM2940CSX
-15
LM2940CSX
-5.0
LM2940LD-5.0
LM2940LD-8.0
LM2940LD-9.0
LM2940LD-10
LM2940LD-12
−40°C
−40°C
TO-263
LLP
1k Units
LM2940LD-15
Tape and
Reel
≤ TJ ≤
125°C
TO-220
LM2940LDX
-5.0
LM2940LDX
-8.0
LM2940LDX
-9.0
LM2940LDX
-10
LM2940LDX
-12
LM2940LDX
-15
LLP
4.5k
Units
Tape and
Reel
LM2940T-5.0
LM2940T-8.0
LM2940T-9.0
LM2940T-10
LM2940T-12
–
TO-220
≤ TJ ≤
LM2940S-5.0
LM2940S-8.0
LM2940S-9.0
LM2940S-10
LM2940S-12
–
125°C
LM2940SX-5.0
LM2940SX-8.0
LM2940SX-9.0
LM2940SX-10
LM2940SX-12
–
© 2007 National Semiconductor Corporation
8822
TO-263
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LM2940/LM2940C 1A Low Dropout Regulator
January 2007
LM2940/LM2940C
Temp
Range
−40°C
≤ TA ≤
Output Voltage
5.0
8.0
9.0
10
12
Package
15
LM2940IMP-5.0 LM2940IMP-8.0 LM2940IMP-9.0 LM2940IMP-10 LM2940IMP-12 LM2940IMP-15 SOT-223
85°C
LM2940IMPX
-5.0
LM2940IMPX
-8.0
LM2940IMPX
-9.0
LM2940IMPX
-10
LM2940IMPX
-12
LM2940IMPX
-15
Marking
L53B
L54B
L0EB
L55B
L56B
L70B
SOT-223
in Tape
and Reel
The physical size of the SOT-223 is too small to contain the full device part number. The package markings indicated are what will appear on the actual device.
Mil-Aero Ordering Information
Temperature
Range
−55°C
≤ TJ ≤
125°C
Output Voltage
Package
5.0
8.0
12
15
LM2940J-5.0/883
5962-8958701EA
–
LM2940J-12/883
5962-9088401QEA
LM2940J-15/883
5962-9088501QEA
J16A
LM2940WG5.0/883
5962-8958701XA
–
LM2940WG5-12/883
LM2940WG5-15/883
WG16A
For information on military temperature range products, please go to the Mil/Aero Web Site at http://www.national.com/appinfo/milaero/index.html.
Connection Diagrams
TO-220 (T) Plastic Package
SOT-223 (MP) 3-Lead
882202
882242
Front View
See NS Package Number TO3B
Front View
See NS Package Number MP04A
16-Lead Dual-in-Line Package (J)
16-Lead Ceramic Surface-Mount Package (WG)
882243
882244
Top View
See NS Package Number J16A
Top View
See NS Package Number WG16A
TO-263 (S) Surface-Mount Package
LLP (LD) 8-Lead
882211
Top View
882246
882212
Side View
See NS Package Number TS3B
Pin 2 and pin 7 are fused to center DAP
Pin 5 and 6 need to be tied together on PCB board
Top View
See NS Package Number LDC08A
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2
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
LM2940S, J, WG, T, MP ≤ 100
ms
Operating Conditions
60V
LM2940CS, T ≤ 1 ms
Internal Power Dissipation
260°C, 30s
235°C, 30s
2 kV
Input Voltage
Temperature Range
45V
26V
−40°C ≤ TJ ≤ 125°C
LM2940T, LM2940S
(Note 2)
Maximum Junction Temperature
Storage Temperature Range
0°C ≤ TJ ≤ 125°C
LM2940CT, LM2940CS
Internally Limited
150°C
−40°C ≤ TA ≤ 85°C
LM2940IMP
−65°C ≤ TJ ≤ +150°C
Soldering Temperature (Note 3)
TO-220 (T), Wave
TO-263 (S)
(Note 1)
−55°C ≤ TJ ≤ 125°C
LM2940J, LM2940WG
−40°C ≤ TJ ≤ 125°C
LM2940LD
260°C, 10s
235°C, 30s
Electrical Characteristics
VIN = VO + 5V, IO = 1A, CO = 22 μF, unless otherwise specified. Boldface limits apply over the entire operating temperature
range of the indicated device. All other specifications apply for TA = TJ = 25°C.
Output Voltage (VO)
Parameter
Conditions
5V
Typ
LM2940
Limit
(Note 5)
8V
LM2940/883
Limit
(Note 6)
Typ
6.25V ≤ VIN ≤ 26V
Output Voltage
Line Regulation
5 mA ≤ IO ≤ 1A
4.85/4.75
4.85/4.75
5.15/5.25
5.15/5.25
20
50
40/50
LM2940, LM2940/883
35
50/80
50/100
LM2940C
35
50
100 mADC and
20 mArms,
35
VO + 2V ≤ VIN ≤ 26V,
5.00
LM2940
Limit
(Note 5)
LM2940/883
Limit
(Note 6)
Units
9.4V ≤ VIN ≤ 26V
7.76/7.60
7.76/7.60
VMIN
8.24/8.40
8.24/8.40
VMAX
20
80
50/80
mVMAX
55
80/130
80/130
mVMAX
55
80
1000/1000
mΩ
8.00
IO = 5 mA
Load Regulation
Output
Impedance
50 mA ≤ IO ≤ 1A
1000/1000
55
15/20
10
15/20
15/20
mAMAX
50/60
30
45/60
50/60
mAMAX
700/700
240
1000/1000
μVrms
fO = 120 Hz
Quiescent
VO +2V ≤ VIN ≤ 26V,
Current
IO = 5 mA
LM2940, LM2940/883
10
15/20
LM2940C
10
15
VIN = VO + 5V,
30
45/60
IO = 1A
Output Noise
10 Hz − 100 kHz,
Voltage
IO = 5 mA
Ripple Rejection
fO = 120 Hz, 1 Vrms,
150
IO = 100 mA
LM2940
72
60/54
66
54/48
LM2940C
72
60
66
54
fO = 1 kHz, 1 Vrms,
60/50
dBMIN
54/48
dBMIN
IO = 5 mA
Long Term
Stability
Dropout Voltage
20
32
mV/
1000 Hr
IO = 1A
0.5
0.8/1.0
0.7/1.0
0.5
0.8/1.0
0.7/1.0
VMAX
IO = 100 mA
110
150/200
150/200
110
150/200
150/200
mVMAX
3
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LM2940/LM2940C
SOT-223 (MP)
LLP-8 (LD)
ESD Susceptibility (Note 4)
Absolute Maximum Ratings (Note 1)
LM2940/LM2940C
Output Voltage (VO)
Parameter
5V
Conditions
Short Circuit
Current
(Note 7)
Maximum Line
RO = 100Ω
Transient
LM2940, T ≤ 100 ms
8V
Typ
LM2940
Limit
(Note 5)
LM2940/883
Limit
(Note 6)
Typ
LM2940
Limit
(Note 5)
LM2940/883
Limit
(Note 6)
1.9
1.6
1.5/1.3
1.9
1.6
1.6/1.3
75
60/60
75
60/60
LM2940/883, T ≤ 20 ms
LM2940C, T ≤ 1 ms
40/40
55
45
Reverse Polarity
RO = 100Ω
DC Input Voltage
LM2940, LM2940/883
−30
−15/−15
LM2940C
−30
−15
−75
−50/−50
Reverse Polarity
RO = 100Ω
Transient Input
LM2940, T ≤ 100 ms
Voltage
LM2940/883, T ≤ 20 ms
LM2940C, T ≤ 1 ms
−15/−15
40/40
55
45
−30
−15/−15
−30
−15
−75
−50/−50
−45/−45
−55
−15/−15
Units
AMIN
VMIN
VMIN
VMIN
−45/−45
−45/−45
Electrical Characteristics
VIN = VO + 5V, IO = 1A, CO = 22 μF, unless otherwise specified. Boldface limits apply over the entire operating temperature
range of the indicated device. All other specifications apply for TA = TJ = 25°C.
Output Voltage (VO)
Parameter
Conditions
9V
10V
LM2940
Limit
(Note 5)
Typ
10.5V ≤ VIN ≤ 26V
Output Voltage
5 mA ≤ IO ≤1A
9.00
8.73/8.55
Typ
VO + 2V ≤ VIN ≤ 26V,
Units
11.5V ≤ VIN ≤ 26V
10.00
9.27/9.45
Line Regulation
LM2940
Limit
(Note 5)
9.70/9.50
VMIN
10.30/10.50
VMAX
20
90
20
100
mVMAX
LM2940
60
90/150
65
100/165
mVMAX
LM2940C
60
90
100 mADC and
20 mArms,
60
IO = 5 mA
Load Regulation
Output Impedance
50 mA ≤ IO ≤ 1A
65
mΩ
fO = 120 Hz
Quiescent
VO +2V ≤ VIN < 26V,
Current
IO = 5 mA
LM2940
10
15/20
LM2940C
10
15
VIN = VO + 5V, IO = 1A
30
45/60
Output Noise
10 Hz − 100 kHz,
270
Voltage
IO = 5 mA
Ripple Rejection
fO = 120 Hz, 1 Vrms,
10
15/20
mAMAX
30
45/60
mAMAX
μVrms
300
IO = 100 mA
Long Term
Stability
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LM2940
64
52/46
LM2940C
64
52
34
63
36
4
51/45
dBMIN
mV/
1000 Hr
Short Circuit
10V
Typ
LM2940
Limit
(Note 5)
Typ
LM2940
Limit
(Note 5)
IO = 1A
0.5
0.8/1.0
0.5
0.8/1.0
VMAX
IO = 100 mA
110
150/200
110
150/200
mVMAX
(Note 7)
1.9
1.6
1.9
1.6
AMIN
75
60/60
VMIN
−30
−15/−15
VMIN
−75
−50/−50
VMIN
Parameter
Dropout Voltage
9V
Conditions
Units
Current
Maximum Line
RO = 100Ω
Transient
T ≤ 100 ms
LM2940
75
60/60
LM2940C
55
45
Reverse Polarity
RO = 100Ω
DC Input Voltage
LM2940
−30
−15/−15
LM2940C
−30
−15
Reverse Polarity
RO = 100Ω
Transient Input
T ≤ 100 ms
LM2940
−75
−50/−50
LM2940C
−55
−45/−45
Voltage
Electrical Characteristics
VIN = VO + 5V, IO = 1A, CO = 22 μF, unless otherwise specified. Boldface limits apply over the entire operating temperature
range of the indicated device. All other specifications apply for TA = TJ = 25°C.
Output Voltage (VO)
Parameter
12V
15V
Typ
LM2940
Limit
(Note 5)
12.00
11.64/11.40
11.64/11.40
12.36/12.60
12.36/12.60
20
120
75/120
LM2940, LM2940/883
55
120/200
120/190
LM2940C
55
120
100 mADC and
20 mArms,
80
Conditions
LM2940/833
Limit
(Note 6)
Typ
13.6V ≤ VIN ≤ 26V
Output Voltage
Line Regulation
5 mA ≤ IO ≤1A
VO + 2V ≤ VIN ≤ 26V,
LM2940
Limit
(Note 5)
LM2940/833
Limit
(Note 6)
Units
16.75V ≤ VIN ≤ 26V
15.00
20
14.55/14.25
14.55/14.25
VMIN
15.45/15.75
15.45/15.75
VMAX
150
95/150
mVMAX
150/240
mVMAX
1000/1000
mΩ
15/20
mAMAX
50/60
mAMAX
1000/1000
μVrms
IO = 5 mA
Load Regulation
Output
Impedance
50 mA ≤ IO ≤ 1A
70
1000/1000
150
100
fO = 120 Hz
Quiescent
Current
VO +2V ≤ VIN ≤ 26V,
IO = 5 mA
LM2940, LM2940/883
10
15/20
LM2940C
10
15
45/60
VIN = VO + 5V, IO = 1A
30
Output Noise
10 Hz − 100 kHz,
360
Voltage
IO = 5 mA
5
15/20
10
15
50/60
30
45/60
1000/1000
450
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LM2940/LM2940C
Output Voltage (VO)
LM2940/LM2940C
Output Voltage (VO)
Typ
LM2940
Limit
(Note 5)
LM2940
66
54/48
LM2940C
66
54
Parameter
Ripple Rejection
12V
Conditions
15V
LM2940/833
Limit
(Note 6)
Typ
LM2940
Limit
(Note 5)
64
52
LM2940/833
Limit
(Note 6)
Units
fO = 120 Hz, 1 Vrms,
IO = 100 mA
fO = 1 kHz, 1 Vrms,
52/46
IO = 5 mA
Long Term
Stability
Dropout Voltage
dBMIN
48
48/42
dBMIN
mV/
1000 Hr
60
IO = 1A
0.5
0.8/1.0
0.7/1.0
0.5
0.8/1.0
0.7/1.0
VMAX
IO = 100 mA
110
150/200
150/200
110
150/200
150/200
mVMAX
1.9
1.6
1.6/1.3
1.9
1.6
1.6/1.3
AMIN
75
60/60
40/40
VMIN
−15/−15
VMIN
−45/−45
VMIN
Short Circuit
Current
(Note 7)
Maximum Line
RO = 100Ω
Transient
LM2940, T ≤ 100 ms
LM2940/883, T ≤ 20 ms
40/40
LM2940C, T ≤ 1 ms
55
45
LM2940, LM2940/883
−30
−15/−15
LM2940C
−30
−15
−75
−50/−50
−55
−45/−45
Reverse Polarity
RO = 100Ω
DC Input
Voltage
Reverse Polarity
RO = 100Ω
Transient Input
LM2940, T ≤ 100 ms
Voltage
LM2940/883, T ≤ 20 ms
LM2940C, T ≤ 1 ms
55
45
−30
−15
−55
−45/−45
−15/−15
−45/−45
Thermal Performance
Thermal Resistance
Junction-to-Case, θ(JC)
Thermal Resistance
Junction-to-Ambient, θ(JA)
3-Lead TO-220
4
3-Lead TO-263
4
3-Lead TO-220 (Note 2)
60
3-Lead TO-263 (Note 2)
80
SOT-223(Note 2)
174
8-Lead LLP (Note 2)
35
°C/W
°C/W
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Conditions are conditions under which the device
functions but the specifications might not be guaranteed. For guaranteed specifications and test conditions see the Electrical Characteristics.
Note 2: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ, the junction-to-ambient thermal resistance, θJA, and
the ambient temperature, TA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal
shutdown. The value of θJA (for devices in still air with no heatsink) is 60°C/W for the TO-220 package, 80°C/W for the TO-263 package, and 174°C/W for the
SOT-223 package. The effective value of θJA can be reduced by using a heatsink (see Application Hints for specific information on heatsinking). The value of
θJA for the LLP package is specifically dependent on PCB trace area, trace material, and the number of layers and thermal vias. For improved thermal resistance
and power dissipation for the LLP package, refer to Application Note AN-1187. It is recommended that 6 vias be placed under the center pad to improve thermal
performance.
Note 3: Refer to JEDEC J-STD-020C for surface mount device (SMD) package reflow profiles and conditions. Unless otherwise stated, the temperature and time
are for Sn-Pb (STD) only.
Note 4: ESD rating is based on the human body model, 100 pF discharged through 1.5 kΩ.
Note 5: All limits are guaranteed at TA = TJ = 25°C only (standard typeface) or over the entire operating temperature range of the indicated device (boldface type).
All limits at TA = TJ = 25°C are 100% production tested. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control
methods.
Note 6: All limits are guaranteed at TA = TJ = 25°C only (standard typeface) or over the entire operating temperature range of the indicated device (boldface type).
All limits are 100% production tested and are used to calculate Outgoing Quality Levels.
Note 7: Output current will decrease with increasing temperature but will not drop below 1A at the maximum specified temperature.
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6
LM2940/LM2940C
Typical Performance Characteristics
Dropout Voltage
Dropout Voltage vs. Temperature
882214
882213
Output Voltage vs. Temperature
Quiescent Current vs. Temperature
882215
882216
Quiescent Current
Quiescent Current
882217
882218
7
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LM2940/LM2940C
Line Transient Response
Load Transient Response
882220
882219
Ripple Rejection
Low Voltage Behavior
882225
882221
Low Voltage Behavior
Low Voltage Behavior
882227
882226
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LM2940/LM2940C
Low Voltage Behavior
Low Voltage Behavior
882228
882229
Low Voltage Behavior
Output at Voltage Extremes
882230
882231
Output at Voltage Extremes
Output at Voltage Extremes
882232
882233
9
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LM2940/LM2940C
Output at Voltage Extremes
Output at Voltage Extremes
882234
882235
Output at Voltage Extremes
Output Capacitor ESR
882236
882206
Peak Output Current
Output Impedance
882222
882208
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10
Maximum Power Dissipation (SOT-223)
882224
882223
Maximum Power Dissipation (TO-263)
882210
11
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LM2940/LM2940C
Maximum Power Dissipation (TO-220)
LM2940/LM2940C
Equivalent Schematic Diagram
882201
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12
EXTERNAL CAPACITORS
The output capacitor is critical to maintaining regulator stability, and must meet the required conditions for both ESR
(Equivalent Series Resistance) and minimum amount of capacitance.
MINIMUM CAPACITANCE:
The minimum output capacitance required to maintain stability is 22 μF (this value may be increased without limit). Larger
values of output capacitance will give improved transient response.
ESR LIMITS:
The ESR of the output capacitor will cause loop instability if it
is too high or too low. The acceptable range of ESR plotted
versus load current is shown in the graph below. It is essential that the output capacitor meet these requirements, or
oscillations can result.
882237
IIN = IL + IG
PD = (VIN − VOUT) IL + (VIN) IG
Output Capacitor ESR
FIGURE 2. Power Dissipation Diagram
The next parameter which must be calculated is the maximum
allowable temperature rise, TR(MAX). This is calculated by using the formula:
TR(MAX) = TJ(MAX) − TA(MAX)
where: TJ(MAX) is the maximum allowable junction temperature, which is 125°C for commercial grade
parts.
TA(MAX) is the maximum ambient temperature which
will be encountered in the application.
Using the calculated values for TR(MAX) and PD, the maximum
allowable value for the junction-to-ambient thermal resistance, θ(JA), can now be found:
882206
FIGURE 1. ESR Limits
θ(JA) = TR(MAX) / PD
IMPORTANT: If the maximum allowable value for θ(JA) is
found to be ≥ 53°C/W for the TO-220 package, ≥ 80°C/W for
the TO-263 package, or ≥ 174°C/W for the SOT-223 package, no heatsink is needed since the package alone will
dissipate enough heat to satisfy these requirements.
If the calculated value for θ(JA)falls below these limits, a
heatsink is required.
It is important to note that for most capacitors, ESR is specified only at room temperature. However, the designer must
ensure that the ESR will stay inside the limits shown over the
entire operating temperature range for the design.
For aluminum electrolytic capacitors, ESR will increase by
about 30X as the temperature is reduced from 25°C to −40°
C. This type of capacitor is not well-suited for low temperature
operation.
Solid tantalum capacitors have a more stable ESR over temperature, but are more expensive than aluminum electrolytics. A cost-effective approach sometimes used is to parallel
an aluminum electrolytic with a solid Tantalum, with the total
capacitance split about 75/25% with the Aluminum being the
larger value.
If two capacitors are paralleled, the effective ESR is the parallel of the two individual values. The “flatter” ESR of the
Tantalum will keep the effective ESR from rising as quickly at
low temperatures.
HEATSINKING TO-220 PACKAGE PARTS
The TO-220 can be attached to a typical heatsink, or secured
to a copper plane on a PC board. If a copper plane is to be
used, the values of θ(JA) will be the same as shown in the next
section for the TO-263.
If a manufactured heatsink is to be selected, the value of
heatsink-to-ambient thermal resistance, θ(H−A), must first be
calculated:
θ(H−A) = θ(JA) − θ(C−H) − θ(J−C)
HEATSINKING
A heatsink may be required depending on the maximum power dissipation and maximum ambient temperature of the application. Under all possible operating conditions, the junction
Where: θ(J−C) is defined as the thermal resistance from the
junction to the surface of the case. A value of
3°C/W can be assumed for θ(J−C) for this calculation.
13
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LM2940/LM2940C
temperature must be within the range specified under Absolute Maximum Ratings.
To determine if a heatsink is required, the power dissipated
by the regulator, PD, must be calculated.
The figure below shows the voltages and currents which are
present in the circuit, as well as the formula for calculating the
power dissipated in the regulator:
Application Information
LM2940/LM2940C
θ(C−H)
is defined as the thermal resistance between
the case and the surface of the heatsink. The
value of θ(C−H) will vary from about 1.5°C/W to
about 2.5°C/W (depending on method of attachment, insulator, etc.). If the exact value is
unknown, 2°C/W should be assumed for θ(C
−H).
When a value for θ(H−A) is found using the equation shown, a
heatsink must be selected that has a value that is less than
or equal to this number.
θ(H−A) is specified numerically by the heatsink manufacturer
in the catalog, or shown in a curve that plots temperature rise
vs power dissipation for the heatsink.
HEATSINKING TO-263 PACKAGE PARTS
The TO-263 (“S”) package uses a copper plane on the PCB
and the PCB itself as a heatsink. To optimize the heat sinking
ability of the plane and PCB, solder the tab of the package to
the plane.
Figure 3 shows for the TO-263 the measured values of θ(JA)
for different copper area sizes using a typical PCB with 1
ounce copper and no solder mask over the copper area used
for heatsinking.
882239
FIGURE 4. Maximum Power Dissipation vs. TA for the
TO-263 Package
HEATSINKING SOT-223 PACKAGE PARTS
The SOT-223 (“MP”) packages use a copper plane on the
PCB and the PCB itself as a heatsink. To optimize the heat
sinking ability of the plane and PCB, solder the tab of the
package to the plane.
Figure 5 and Figure 6 show the information for the SOT-223
package. Figure 6 assumes a θ(JA) of 74°C/W for 1 square
inch of 1 ounce copper and 51°C/W for 1 square inch of 2
ounce copper, with a maximum ambient temperature (TA) of
85°C and a maximum junction temperature (TJ) of 125°C.
For techniques for improving the thermal resistance and power dissipation for the SOT-223 package, please refer to Application Note AN-1028.
882238
FIGURE 3. θ(JA) vs. Copper (1 ounce) Area for the TO-263
Package
As shown in the figure, increasing the copper area beyond 1
square inch produces very little improvement. It should also
be observed that the minimum value of θ(JA) for the TO-263
package mounted to a PCB is 32°C/W.
As a design aid, Figure 4 shows the maximum allowable power dissipation compared to ambient temperature for the
TO-263 device. This assumes a θ(JA) of 35°C/W for 1 square
inch of 1 ounce copper and a maximum junction temperature
(TJ) of 125°C.
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882240
FIGURE 5. θ(JA) vs. Copper (2 ounce) Area for the SOT-223
Package
14
882241
FIGURE 6. Maximum Power Dissipation vs. TA for the
SOT-223 Package
15
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LM2940/LM2940C
HEATSINKING LLP PACKAGE PARTS
The value of θJA for the LLP package is specifically dependent
on PCB trace area, trace material, and the number of layers
and thermal vias. It is recommended that a minimum of 6
thermal vias be placed under the center pad to improve thermal performance.
For techniques for improving the thermal resistance and power dissipation for the LLP package, please refer to Application
Note AN-1187.
LM2940/LM2940C
Physical Dimensions inches (millimeters) unless otherwise noted
3-Lead SOT-223 Package
NS Package Number MP04A
16 Lead Dual-in-Line Package (J)
See NS Package Number J16A
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16
LM2940/LM2940C
16 Lead Surface Mount Package (WG)
See NS Package Number WG16A
3-Lead TO-220 Plastic Package (T)
NS Package Number TO3B
17
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LM2940/LM2940C
3-Lead TO-263 Surface Mount Package (MP)
NS Package Number TS3B
8-Lead LLP
Order Number LM2940LD-5.0, LM2940LD-8.0,
LM2940LD-9.0, LM2940LD-10,
LM2940LD-12 or LM2940LD-15
NS Package Number LDC08A
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18
LM2940/LM2940C
Notes
19
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LM2940/LM2940C 1A Low Dropout Regulator
Notes
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