NSC LM4938MH

LM4938
Stereo 2W Audio Power Amplifiers
with DC Volume Control and Selectable Gain
General Description
Key Specifications
The LM4938 is a monolithic integrated circuit that provides
DC volume control, and stereo bridged audio power amplifiers capable of producing 2W into 4Ω (Note 1) with less than
1.0% THD or 2.2W into 3Ω (Note 2) with less than 1.0%
THD.
Boomer ® audio integrated circuits were designed specifically
to provide high quality audio while requiring a minimum
amount of external components. The LM4938 incorporates a
DC volume control, stereo bridged audio power amplifiers
and a selectable gain or bass boost, making it optimally
suited for multimedia monitors, portable radios, desktop, and
portable computer applications.
The LM4938 features an externally controlled, low-power
consumption shutdown mode, and both a power amplifier
and headphone mute for maximum system flexibility and
performance.
n PO at 1% THD+N
n
into 3Ω
n
into 4Ω
n
into 8Ω
n Single-ended mode - THD+N at 92mW into
32Ω
n Shutdown current
Note 1: When properly mounted to the circuit board, LM4938MH will deliver
2W into 4Ω. See Application Information section Exposed-DAP package
PCB Mounting Considerations for more information.
Note 2: An LM4938MH that has been properly mounted to the circuit board
and forced-air cooled will deliver 2.2W into 3Ω.
2.2W (typ)
2.0W (typ)
1.3W (typ)
1.0%(typ)
0.5µA (typ)
Features
n Improved click and pop circuitry virtually eliminates
noise during turn on/off transitions
n DC Volume Control Interface
n System Beep Detect
n Stereo switchable bridged/single-ended power amplifiers
n Selectable internal/external gain and bass boost
n Thermal shutdown protection circuitry
n Unity gain stable
Applications
n
n
n
n
Flat Panel Displays
Portable and Desktop Computers
Multimedia Monitors
Portable Radios, PDAs, and Portable TVs
Block Diagram
20095601
FIGURE 1. LM4938 Block Diagram
Boomer ® is a registered trademark of NationalSemiconductor Corporation.
© 2005 National Semiconductor Corporation
DS200956
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LM4938 Stereo 2W Audio Power Amplifiers with DC Volume Control and Selectable Gain
February 2005
LM4938
Connection Diagram
TSSOP Package
20095602
Top View
Order Number LM4938MH
See NS Package Number MXA28A for Exposed-DAP TSSOP
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2
See AN-450 “Surface Mounting and their Effects on
Product Reliability” for other methods of soldering surface
mount devices.
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
θJC (typ) - MXA28A
2˚C/W
6.0V
θJA (typ) - MXA28A (exposed DAP) (Note 3)
41˚C/W
-65˚C to +150˚C
θJA (typ) - MXA28A (exposed DAP) (Note 4)
54˚C/W
−0.3V to VDD +0.3V
θJA (typ) - MXA28A (exposed DAP) (Note 5)
59˚C/W
Power Dissipation (Note 11)
Internally limited
θJA (typ) - MXA28A (exposed DAP) (Note 6)
93˚C/W
ESD Susceptibility (Note 12)
2000V
ESD Susceptibility (Note 13)
200V
Storage Temperature
Input Voltage
Junction Temperature
Operating Ratings
150˚C
Soldering Information
Small Outline Package
Vapor Phase (60 sec.)
215˚C
Infrared (15 sec.)
220˚C
Temperature Range
TMIN ≤ TA ≤TMAX
−20˚C ≤TA ≤ 85˚C
Supply Voltage
2.7V≤ VDD ≤ 5.5V
Electrical Characteristics for Entire IC (Notes 7, 10)
The following specifications apply for VDD = 5V unless otherwise noted. Limits apply for TA = 25˚C.
LM4938
Symbol
VDD
Parameter
Conditions
Typical
(Note 14)
Limit
(Note 15)
Supply Voltage
Units
(Limits)
2.7
V (min)
5.5
V (max)
mA (max)
IDD
Quiescent Power Supply Current
VIN = 0V, IO = 0A
11
30
ISD
Shutdown Current
Vshutdown = VDD
0.5
2.0
VIH
Headphone Sense High Input Voltage
4
V (min)
VIL
Headphone Sense Low Input Voltage
0.8
V (max)
µA (max)
Electrical Characteristics for Volume Attenuators (Notes 7, 10)
The following specifications apply for VDD = 5V. Limits apply for TA = 25˚C.
LM4938
Symbol
Parameter
Conditions
Gain accuracy with VDCVol = 5V,
No Load
CRANGE
AM
Attenuator Range
Mute Attenuation
Typical
(Note 14)
Limit
(Note 15)
± 0.5
± 0.75
Gain accuracy with VDCVol < 0.5V,
No Load
±2
Attenuation with VDCVol = 0V
(BM & SE)
89
Vmute = 5V, Bridged Mode (BM)
89
Units
(Limits)
dB (max)
dB (max)
75
Vmute = 5V, Single-Ended Mode (SE)
dB (min)
78
dB (min)
78
dB (min)
Electrical Characteristics for Bridged Mode Operation (Notes 7, 10)
The following specifications apply for VDD = 5V, unless otherwise noted. Limits apply for TA = 25˚C.
LM4938
Symbol
VOS
Parameter
Output Offset Voltage
Conditions
VIN = 0V, No Load
3
Typical
(Note 14)
Limit
(Note 15)
5
± 50
Units
(Limits)
mV (max)
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LM4938
Absolute Maximum Ratings (Note 10)
LM4938
Electrical Characteristics for Bridged Mode Operation
(Notes 7, 10) (Continued)
The following specifications apply for VDD = 5V, unless otherwise noted. Limits apply for TA = 25˚C.
LM4938
Symbol
PO
THD+N
PSRR
Parameter
Output Power
Total Harmonic Distortion + Noise
Power Supply Rejection Ratio
Conditions
Typical
(Note 14)
Limit
(Note 15)
Units
(Limits)
THD + N = 1.0%; f = 1kHz
RL = 3Ω (Note 8)
2.2
W
THD + N = 1.0%; f = 1kHz
RL = 4Ω (Note 9)
2
W
THD = 1% (max); f = 1kHz
RL = 8Ω
1.3
THD+N = 10%; f = 1 kHz; RL = 8Ω
1.5
W
PO = 0.4W, f = 1kHz,
RL = 8Ω, AVD = 2
0.05
%
CB = 1.0 µF, f = 120 Hz,
VRIPPLE = 200 mVrms; RL = 8Ω,
Floating
78
dB
CB = 1.0 µF, f = 120 Hz,
VRIPPLE = 200 mVrms; RL = 8Ω,
Terminated
60
dB
1.0
W (min)
SNR
Signal to Noise Ratio
VDD = 5V, POUT = 1.2W, RL = 8Ω,
A-Wtd Filter, 1kHz
100
dB
Xtalk
Channel Separation
f = 1kHz, CB = 1.0µF, 1W
76
dB
Electrical Characteristics for Single-Ended Mode Operation
(Notes 7, 10)
The following specifications apply for VDD = 5V. Limits apply for TA = 25˚C.
LM4938
Symbol
Parameter
Conditions
PO
Output Power
THD = 1.0%; f = 1kHz; RL = 32Ω
THD+N
Total Harmonic Distortion + Noise
VOUT = 1VRMS, f = 1kHz,
RL = 10kΩ, AVD = 1
PSRR
Power Supply Rejection Ratio
Limit
(Note 15)
Units
(Limits)
92
mW
0.065
%
CB = 1.0 µF, f = 120 Hz,
VRIPPLE = 200 mVrms, Floating
63
dB
CB = 1.0 µF, f = 120 Hz,
VRIPPLE = 200 mVrms, Terminated
59
dB
100
dB
73
dB
SNR
Signal to Noise Ratio
POUT = 75mW, R
A-Wtd Filter
Xtalk
Channel Separation
f = 1kHz, CB = 1.0 µF
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Typical
(Note 14)
4
L
= 32Ω,
LM4938
Electrical Characteristics for Single-Ended Mode Operation
(Notes 7,
10) (Continued)
Note 3: The θJA given is for an MXA28A package whose exposed-DAP is soldered to an exposed 2in 2 piece of 1 ounce printed circuit board copper.
Note 4: The θJA given is for an MXA28A package whose exposed-DAP is soldered to a 2in2 piece of 1 ounce printed circuit board copper on a bottom side layer
through 21 8mil vias.
Note 5: The θJA given is for an MXA28A package whose exposed-DAP is soldered to an exposed 1in 2 piece of 1 ounce printed circuit board copper.
Note 6: The θJA given is for an MXA28A package whose exposed-DAP is not soldered to any copper.
Note 7: All voltages are measured with respect to the ground pins, unless otherwise specified. All specifications are tested using the typical application as shown
in Figure 1.
Note 8: When driving 3Ω loads from a 5V supply the LM4938MH must be mounted to the circuit board and forced-air cooled.
Note 9: When driving 4Ω loads from a 5V supply the LM4938MH must be mounted to the circuit board.
Note 10: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.
Note 11: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θ JA, and the ambient temperature TA. The maximum
allowable power dissipation is PDMAX = (TJMAX − TA )/θJA. For the LM4938, TJMAX = 150˚C, and the typical junction-to-ambient thermal resistance for each package
can be found in the Absolute Maximum Ratings section above.
Note 12: Human body model, 100pF discharged through a 1.5kΩ resistor.
Note 13: Machine Model, 200pF – 220pF discharged through all pins.
Note 14: Typicals are measured at 25˚C and represent the parametric norm.
Note 15: Limits are guaranteed to National’s AOQL ( Average Outgoing Quality Level). Datasheet min/max specification limits are guaranteed by design, test, or
statistical analysis.
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LM4938
Typical Application
20095603
FIGURE 2. Typical Application Circuit
Truth Table for Logic Inputs
(Note 16)
Gain
Sel
Mode
Headphone
Sense
Mute
Shutdown Output Stage Set To
DC Volume
Output Stage
Configuration
0
0
0
0
0
0
0
1
0
0
Internal Gain
Fixed
BTL
Internal Gain
Fixed
0
1
0
0
SE
0
Internal Gain
Adjustable
BTL
0
1
1
0
0
Internal Gain
Adjustable
SE
1
0
1
0
0
0
0
External Gain
Fixed
BTL
1
0
0
External Gain
Fixed
1
1
SE
0
0
0
External Gain
Adjustable
BTL
1
1
1
0
0
External Gain
Adjustable
SE
X
X
X
1
0
Muted
X
Muted
X
X
X
X
1
Shutdown
X
X
Note 16: If system beep is detected on the Beep In pin, the system beep will be passed through the bridged amplifier regardless of the logic of the Mute and HP
sense pins.
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LM4938
Typical Performance Characteristics
THD+N vs Output Power
VDD = 3V, RL = 8Ω
THD+N vs Output Power
VDD = 3V, RL = 4Ω
200956A2
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THD+N vs Output Power
VDD = 5V, RL = 3Ω
THD+N vs Output Power
VDD = 3V, RL = 32Ω, SE
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200956A5
THD+N vs Output Power
VDD = 5V, RL = 8Ω, BTL
THD+N vs Output Power
VDD = 5V, RL = 4Ω
200956A6
200956A7
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LM4938
Typical Performance Characteristics
(Continued)
THD+N vs Output Power
VDD = 5V, RL = 32Ω, SE
THD+N vs Frequency
VDD = 5V, RL = 8Ω, PO = 1W, BTL
200956A8
20095695
THD+N vs Frequency
VDD = 3V, RL = 8Ω, PO = 160mW
THD+N vs Frequency
VDD = 3V, RL = 4Ω, PO = 170mW
20095696
20095697
THD+N vs Frequency
VDD = 5V, RL = 3Ω, PO = 600mW
THD+N vs Frequency
VDD = 3V, RL = 32Ω, PO = 20mW, SE
20095698
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20095699
8
LM4938
Typical Performance Characteristics
(Continued)
THD+N vs Frequency
VDD = 5V, RL = 4Ω, PO = 600mW
THD+N vs Frequency
VDD = 5V, RL = 32Ω, PO = 70mW, SE
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200956A1
Frequency Response
VDD = 3V, RL = 8Ω, PO = 570mW
Frequency Response
VDD = 3V, RL = 4Ω, PO = 1.8W
20095636
20095637
Frequency Response
VDD = 5V, RL = 3Ω, PO = 1.8W
Frequency Response
VDD = 3V, RL = 32Ω, PO = 30mW, SE
20095638
20095643
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LM4938
Typical Performance Characteristics
(Continued)
Frequency Response
VDD = 5V, RL = 4Ω, PO = 1.5W
Frequency Response
VDD = 5V, RL = 8Ω, PO = 1W
20095644
20095645
PSRR vs Frequency
VDD = 3V, RL = 8Ω, Terminated
Frequency Response
VDD = 5V, RL = 32Ω, PO = 30mW, SE
20095647
20095646
PSRR vs Frequency
VDD = 3V, RL = 32Ω, Terminated
PSRR vs Frequency
VDD = 3V, RL = 8Ω, Unterminated
20095648
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20095650
10
LM4938
Typical Performance Characteristics
(Continued)
PSRR vs Frequency
VDD = 3V, RL = 32Ω, Unterminated
PSRR vs Frequency
VDD = 5V, RL = 8Ω, Terminated
20095655
200956B0
PSRR vs Frequency
VDD = 5V, RL = 32Ω, Terminated, SE
PSRR vs Frequency
VDD = 5V, RL = 8Ω, Unterminated
20095667
20095668
Crosstalk vs Frequency
VDD = 3V, RL = 8Ω, PO = 570mW
PSRR vs Frequency
VDD = 5V, RL = 32Ω, Unterminated, SE
20095669
20095605
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LM4938
Typical Performance Characteristics
(Continued)
Crosstalk vs Frequency
VDD = 3V, RL = 32Ω, PO = 30mW, SE
Crosstalk vs Frequency
VDD = 5V, RL = 8Ω, PO = 1W
20095610
20095612
Crosstalk vs Frequency
VDD = 5V, RL = 32Ω, PO = 30mW, SE
Volume Control Characteristics
200956A9
20095613
Power Derating Curve (Note 17)
Dropout Voltage
20095664
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20095653
12
LM4938
Typical Performance Characteristics
(Continued)
External Gain/
Bass Boost Characteristics
Power Dissipation vs Output Power
20095661
20095665
Power Dissipation vs
Output Power
Power Dissipation vs
Output Power
20095651
20095652
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LM4938
Typical Performance Characteristics
(Continued)
Output Power
vs Supply Voltage
20095654
Note 17: These curves show the thermal dissipation ability of the LM4938MH at different ambient temperatures given these conditions:
500LFPM + 2in2: The part is soldered to a 2in2, 1 oz. copper plane with 500 linear feet per minute of forced-air flow across it.
2in2on bottom: The part is soldered to a 2in2, 1oz. copper plane that is on the bottom side of the PC board through 21 8 mil vias.
2in2: The part is soldered to a 2in2, 1oz. copper plane.
1in2: The part is soldered to a 1in2, 1oz. copper plane.
Not Attached: The part is not soldered down and is not forced-air cooled.
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EXPOSED-DAP PACKAGE PCB MOUNTING
CONSIDERATIONS
Poor power supply regulation adversely affects maximum
output power. A poorly regulated supply’s output voltage
decreases with increasing load current. Reduced supply
voltage causes decreased headroom, output signal clipping,
and reduced output power. Even with tightly regulated supplies, trace resistance creates the same effects as poor
supply regulation. Therefore, making the power supply
traces as wide as possible helps maintain full output voltage
swing.
The LM4938’s exposed-DAP (die attach paddle) package
(MH) provides a low thermal resistance between the die and
the PCB to which the part is mounted and soldered. This
allows rapid heat transfer from the die to the surrounding
PCB copper traces, ground plane and, finally, surrounding
air. The result is a low voltage audio power amplifier that
produces 2.0W at ≤ 1% THD with a 4Ω load. This high power
is achieved through careful consideration of necessary thermal design. Failing to optimize thermal design may compromise the LM4938’s high power performance and activate
unwanted, though necessary, thermal shutdown protection.
The MH package must have its exposed DAP soldered to a
grounded copper pad on the PCB. The DAP’s PCB copper
pad is connected to a large grounded plane of continuous
unbroken copper. This plane forms a thermal mass heat sink
and radiation area. Place the heat sink area on either outside
plane in the case of a two-sided PCB, or on an inner layer of
a board with more than two layers. Connect the DAP copper
pad to the inner layer or backside copper heat sink area with
32(4x8) (MH) vias. The via diameter should be
0.012in–0.013in with a 1.27mm pitch. Ensure efficient thermal conductivity by plating-through and solder-filling the
vias.
Best thermal performance is achieved with the largest practical copper heat sink area. If the heatsink and amplifier
share the same PCB layer, a nominal 2.5in2 (min) area is
necessary for 5V operation with a 4Ω load. Heatsink areas
not placed on the same PCB layer as the LM4938 MH
package should be 5in2 (min) for the same supply voltage
and load resistance. The last two area recommendations
apply for 25˚C ambient temperature. Increase the area to
compensate for ambient temperatures above 25˚C. In systems using cooling fans, the LM4938MH can take advantage
of forced air cooling. With an air flow rate of 450 linear-feet
per minute and a 2.5in2 exposed copper or 5.0in2 inner layer
copper plane heatsink, the LM4938MH can continuously
drive a 3Ω load to full power. In all circumstances and
conditions, the junction temperature must be held below
150˚C to prevent activating the LM4938’s thermal shutdown
protection. The LM4938’s power de-rating curve in the Typical Performance Characteristics shows the maximum
power dissipation versus temperature. Example PCB layouts
for the exposed-DAP TSSOP are shown in the Demonstration Board Layout section. Further detailed and specific
information concerning PCB layout, fabrication, and mounting a package is available in National Semiconductor’s
AN1187.
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 2, the LM4938 output stage consists of
two pairs of operational amplifiers, forming a two-channel
(channel A and channel B) stereo amplifier. (Though the
following discusses channel A, it applies equally to channel
B.)
Figure 2 shows that the first amplifier’s negative (-) output
serves as the second amplifier’s input. This results in both
amplifiers producing signals identical in magnitude, but 180˚
out of phase. Taking advantage of this phase difference, a
load is placed between −OUTA and +OUTA and driven differentially (commonly referred to as “bridge mode”). This
results in a differential gain of
AVD = 2 * (Rf/R i)
(1)
Bridge mode amplifiers are different from single-ended amplifiers that drive loads connected between a single amplifier’s output and ground. For a given supply voltage, bridge
mode has a distinct advantage over the single-ended configuration: its differential output doubles the voltage
swing across the load. This produces four times the output
power when compared to a single-ended amplifier under the
same conditions. This increase in attainable output power
assumes that the amplifier is not current limited or that the
output signal is not clipped. To ensure minimum output signal clipping when choosing an amplifier’s closed-loop gain,
refer to the Audio Power Amplifier Design section.
Another advantage of the differential bridge output is no net
DC voltage across the load. This is accomplished by biasing
channel A’s and channel B’s outputs at half-supply. This
eliminates the coupling capacitor that single supply, singleended amplifiers require. Eliminating an output coupling capacitor in a single-ended configuration forces a single-supply
amplifier’s half-supply bias voltage across the load. This
increases internal IC power dissipation and may permanently damage loads such as speakers.
POWER DISSIPATION
Power dissipation is a major concern when
successful single-ended or bridged amplifier.
states the maximum power dissipation point
ended amplifier operating at a given supply
driving a specified output load.
PCB LAYOUT AND SUPPLY REGULATION
CONSIDERATIONS FOR DRIVING 3Ω AND 4Ω LOADS
Power dissipated by a load is a function of the voltage swing
across the load and the load’s impedance. As load impedance decreases, load dissipation becomes increasingly dependent on the interconnect (PCB trace and wire) resistance
between the amplifier output pins and the load’s connections. Residual trace resistance causes a voltage drop,
which results in power dissipated in the trace and not in the
load as desired. For example, 0.1Ω trace resistance reduces
the output power dissipated by a 4Ω load from 2.1W to 2.0W.
This problem of decreased load dissipation is exacerbated
as load impedance decreases. Therefore, to maintain the
PDMAX = (VDD)2/(2π2RL)
designing a
Equation (2)
for a singlevoltage and
Single-Ended
(2)
However, a direct consequence of the increased power delivered to the load by a bridge amplifier is higher internal
power dissipation for the same conditions.
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LM4938
highest load dissipation and widest output voltage swing,
PCB traces that connect the output pins to a load must be as
wide as possible.
Application Information
LM4938
Application Information
impedance.) Refer to the Typical Performance Characteristics curves for power dissipation information at lower output power levels.
(Continued)
The LM4938 has two operational amplifiers per channel. The
maximum internal power dissipation per channel operating in
the bridge mode is four times that of a single-ended amplifier. From Equation (3), assuming a 5V power supply and a
4Ω load, the maximum single channel power dissipation is
1.27W or 2.54W for stereo operation.
PDMAX = 4 * (VDD)2/(2π2RL)
Bridge Mode
POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is
critical for low noise performance and high power supply
rejection. Applications that employ a 5V regulator typically
use a 10 µF in parallel with a 0.1 µF filter capacitor to
stabilize the regulator’s output, reduce noise on the supply
line, and improve the supply’s transient response. However,
their presence does not eliminate the need for a local 1.0µF
tantalum bypass capacitance connected between the
LM4938’s supply pins and ground. Do not substitute a ceramic capacitor for the tantalum. Doing so may cause oscillation. Keep the length of leads and traces that connect
capacitors between the LM4938’s power supply pin and
ground as short as possible. Connecting a 1µF capacitor,
CB, between the BYPASS pin and ground improves the
internal bias voltage’s stability and the amplifier’s PSRR. The
PSRR improvements increase as the BYPASS pin capacitor
value increases. Too large a capacitor, however, increases
turn-on time and can compromise the amplifier’s click and
pop performance. The selection of bypass capacitor values,
especially CB, depends on desired PSRR requirements,
click and pop performance (as explained in the following
section, Selecting Proper External Components), system
cost, and size constraints.
(3)
The LM4938’s power dissipation is twice that given by Equation (2) or Equation (3) when operating in the single-ended
mode or bridge mode, respectively. Twice the maximum
power dissipation point given by Equation (3) must not exceed the power dissipation given by Equation (4):
PDMAX' = (TJMAX − TA)/θJA
(4)
The LM4938’s TJMAX = 150˚C. In the MH package soldered
to a DAP pad that expands to a copper area of 2in2 on a
PCB, the LM4938MH’s θJA is 41˚C/W. At any given ambient
temperature TA, use Equation (4) to find the maximum internal power dissipation supported by the IC packaging. Rearranging Equation (4) and substituting PDMAX for PDMAX' results in Equation (5). This equation gives the maximum
ambient temperature that still allows maximum stereo power
dissipation without violating the LM4938’s maximum junction
temperature.
TA = TJMAX – 2*PDMAX θJA
SELECTING PROPER EXTERNAL COMPONENTS
Optimizing the LM4938’s performance requires properly selecting external components. Though the LM4938 operates
well when using external components with wide tolerances,
best performance is achieved by optimizing component values.
The LM4938 is unity-gain stable, giving a designer maximum
design flexibility. The gain should be set to no more than a
given application requires. This allows the amplifier to
achieve minimum THD+N and maximum signal-to-noise ratio. These parameters are compromised as the closed-loop
gain increases. However, low gain circuits demand input
signals with greater voltage swings to achieve maximum
output power. Fortunately, many signal sources such as
audio CODECs have outputs of 1VRMS (2.83VP-P). Please
refer to the Audio Power Amplifier Design section for more
information on selecting the proper gain.
(5)
For a typical application with a 5V power supply and an 4Ω
load, the maximum ambient temperature that allows maximum stereo power dissipation without exceeding the maximum junction temperature is approximately 45˚C for the MH
package.
TJMAX = PDMAX θJA + TA
(6)
Equation (6) gives the maximum junction temperature
TJMAX. If the result violates the LM4938’s 150˚C TJMAX,
reduce the maximum junction temperature by reducing the
power supply voltage or increasing the load resistance. Further allowance should be made for increased ambient temperatures.
The above examples assume that a device is a surface
mount part operating around the maximum power dissipation
point. Since internal power dissipation is a function of output
power, higher ambient temperatures are allowed as output
power or duty cycle decreases.
If the result of Equation (2) is greater than that of Equation
(3), then decrease the supply voltage, increase the load
impedance, or reduce the ambient temperature. If these
measures are insufficient, a heat sink can be added to
reduce θJA. The heat sink can be created using additional
copper area around the package, with connections to the
ground pin(s), supply pin and amplifier output pins. External,
solder attached SMT heatsinks such as the Thermalloy
7106D can also improve power dissipation. When adding a
heat sink, the θJA is the sum of θJC, θCS, and θSA. (θJC is the
junction-to-case thermal impedance, θCS is the case-to-sink
thermal impedance, and θSA is the sink-to-ambient thermal
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INPUT CAPACITOR VALUE SELECTION
Amplifying the lowest audio frequencies requires a high
value input coupling capacitor (0.33µF in Figure 2), but high
value capacitors can be expensive and may compromise
space efficiency in portable designs. In many cases, however, the speakers used in portable systems, whether internal or external, have little ability to reproduce signals below
150 Hz. Applications using speakers with this limited frequency response reap little improvement by using a large
input capacitor.
Besides effecting system cost and size, the input coupling
capacitor has an affect on the LM4938’s click and pop performance. When the supply voltage is first applied, a transient (pop) is created as the charge on the input capacitor
changes from zero to a quiescent state. The magnitude of
the pop is directly proportional to the input capacitor’s size.
Higher value capacitors need more time to reach a quiescent
DC voltage (usually VDD/2) when charged with a fixed current. The amplifier’s output charges the input capacitor
16
amplifiers can drive loads of > 1kΩ (such as powered speakers) with a rail-to-rail signal. Since the output signal present
on the RIGHT DOCK and LEFT DOCK pins is biased to
VDD/2, coupling capacitors should be connected in series
with the load when using these outputs. Typical values for
the output coupling capacitors are 0.33µF to 1.0µF. If polarized coupling capacitors are used, connect their "+" terminals to the respective output pin, see Figure 2.
Since the DOCK outputs precede the internal volume control, the signal amplitude will be equal to the input signal’s
magnitude and cannot be adjusted. However, the input amplifier’s closed-loop gain can be adjusted using external
resistors. These 20k resistors (RFR, RFL) are shown in Figure 2 and they set each input amplifier’s gain to -1. Use
Equation 7 to determine the input and feedback resistor
values for a desired gain.
(8)
- AVR = RFR/RIR and - AVL = RFL/RIL
(Continued)
through the feedback resistor, Rf. Thus, pops can be minimized by selecting an input capacitor value that is no higher
than necessary to meet the desired −6dB frequency.
As shown in Figure 2, the input resistor (RIR, RIL = 20k) ( and
the input capacitor (CIR, CIL = 0.33µF) produce a −6dB high
pass filter cutoff frequency that is found using Equation (7).
(7)
As an example when using a speaker with a low frequency
limit of 150Hz, the input coupling capacitor, using Equation
(7), is 0.053µF. The 0.33µF input coupling capacitor shown
in Figure 2 allows the LM4938 to drive a high efficiency, full
range speaker whose response extends below 30Hz.
Adjusting the input amplifier’s gain sets the minimum gain for
that channel. Although the single ended output of the Bridge
Output Amplifiers can be used to drive line level outputs, it is
recommended that the R & L Dock Outputs simpler signal
path be used for better performance.
OPTIMIZING CLICK AND POP REDUCTION
PERFORMANCE
The LM4938 contains circuitry that minimizes turn-on and
shutdown transients or “clicks and pops”. For this discussion, turn-on refers to either applying the power supply voltage or when the shutdown mode is deactivated. While the
power supply is ramping to its final value, the LM4938’s
internal amplifiers are configured as unity gain buffers. An
internal current source changes the voltage of the BYPASS
pin in a controlled, linear manner. Ideally, the input and
outputs track the voltage applied to the BYPASS pin. The
gain of the internal amplifiers remains unity until the voltage
on the BYPASS pin reaches 1/2 VDD . As soon as the voltage
on the BYPASS pin is stable, the device becomes fully
operational. Although the BYPASS pin current cannot be
modified, changing the size of CB alters the device’s turn-on
time and the magnitude of “clicks and pops”. Increasing the
value of CB reduces the magnitude of turn-on pops. However, this presents a tradeoff: as the size of CB increases, the
turn-on time increases. There is a linear relationship between the size of CB and the turn-on time.
BEEP DETECT FUNCTION
Computers and notebooks produce a system “beep“ signal
that drives a small speaker. The speaker’s auditory output
signifies that the system requires user attention or input. To
accommodate this system alert signal, the LM4938’s beep
input pin is a mono input that accepts the beep signal.
Internal level detection circuitry at this input monitors the
beep signal’s magnitude. When a signal level greater than
VDD/2 is detected on the BEEP IN pin, the bridge output
amplifiers are enabled. The beep signal is amplified and
applied to the load connected to the output amplifiers. A valid
beep signal will be applied to the load even when MUTE is
active. Use the input resistors connected between the BEEP
IN pin and the stereo input pins to accommodate different
beep signal amplitudes. These resistors (RBEEP) are shown
as 200kΩ devices in Figure 2. Use higher value resistors to
reduce the gain applied to the beep signal. The resistors
must be used to pass the beep signal to the stereo inputs.
The BEEP IN pin is used only to detect the beep signal’s
magnitude: it does not pass the signal to the output amplifiers. The LM4938’s shutdown mode must be deactivated
before a system alert signal is applied to BEEP IN pin.
If the “Beep” feature is not needed, remove the two Beep
Resistors (200k) and Beep input capacitor (.33µf). Then, tie
the Beep input pin (#11) to ground. Note that the Beep
Circuit is designed to operate with only a square wave input
from a control source.
DOCKING STATION INTERFACE
Applications such as notebook computers can take advantage of a docking station to connect to external devices such
as monitors or audio/visual equipment that sends or receives
line level signals. The LM4938 has two outputs, Right Dock
and Left Dock, which connect to outputs of the internal input
amplifiers that drive the volume control inputs. These input
17
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LM4938
Application Information
LM4938
Application Information
(Continued)
MICRO-POWER SHUTDOWN
The voltage applied to the SHUTDOWN pin controls the
LM4938’s shutdown function. Activate micro-power shutdown by applying VDD to the SHUTDOWN pin. When active,
the LM4938’s micro-power shutdown feature turns off the
amplifier’s bias circuitry, reducing the supply current. The
logic threshold is typically VDD/2. The low 0.5 µA typical
shutdown current is achieved by applying a voltage that is as
near as VDD as possible to the SHUTDOWN pin. A voltage
that is less than VDD may increase the shutdown current.
There are a few ways to control the micro-power shutdown.
These include using a single-pole, single-throw switch, a
microprocessor, or a microcontroller. When using a switch,
connect an external 10kΩ pull-up resistor between the
SHUTDOWN pin and VDD. Connect the switch between the
SHUTDOWN pin and ground. Select normal amplifier operation by closing the switch. Opening the switch connects the
SHUTDOWN pin to VDD through the pull-up resistor, activating micro-power shutdown. The switch and resistor guarantee that the SHUTDOWN pin will not float. This prevents
unwanted state changes. In a system with a microprocessor
or a microcontroller, use a digital output to apply the control
voltage to the SHUTDOWN pin. Driving the SHUTDOWN pin
with active circuitry eliminates the need for a pull up resistor.
20095604
FIGURE 3. Headphone Sensing Circuit
MODE FUNCTION
The LM4938’s MODE function has 2 states controlled by the
voltage applied to the MODE pin. Mode 0, selected by
applying 0V to the MODE pin, forces the LM4938 to effectively function as a "line-out," unity-gain amplifier. Mode 1,
which uses the internal DC controlled volume control is
selected by applying VDD to the MODE pin. This mode sets
the amplifier’s gain according to the DC voltage applied to
the DC VOL CONTROL pin. Unanticipated gain behavior can
be prevented by connecting the MODE pin to VDD or ground.
Note: Do not let the mode pin float.
HP SENSE FUNCTION ( Head Phone In )
Applying a voltage between 4V and VDD to the LM4938’s
HP-IN headphone control pin turns off the amps that drive
the Left out "+" and Right out "+" pins. This action mutes a
bridged-connected load. Quiescent current consumption is
reduced when the IC is in this single-ended mode.
Figure 3 shows the implementation of the LM4938’s headphone control function. With no headphones connected to
the headphone jack, the R1-R2 voltage divider sets the
voltage applied to the HP SENSE pin at approximately
50mV. This 50mV puts the LM4938 into bridged mode operation. The output coupling capacitor blocks the amplifier’s
half supply DC voltage, protecting the headphones.
The HP-IN threshold is set at 4V. While the LM4938 operates
in bridged mode, the DC potential across the load is essentially 0V. Therefore, even in an ideal situation, the output
swing cannot cause a false single-ended trigger. Connecting
headphones to the headphone jack disconnects the headphone jack contact pin from R2 and allows R1 to pull the HP
Sense pin up to VDD through R4. This enables the headphone function, turns off both of the "+" output amplifiers,
and mutes the bridged speaker. The remaining single-ended
amplifiers then drive the headphones, whose impedance is
in parallel with resistors R2 and R3. These resistors have
negligible effect on the LM4938’s output drive capability
since the typical impedance of headphones is 32Ω.
Figure 3 also shows the suggested headphone jack electrical connections. The jack is designed to mate with a threewire plug. The plug’s tip and ring should each carry one of
the two stereo output signals, whereas the sleeve should
carry the ground return. A headphone jack with one control
pin contact is sufficient to drive the HP-IN pin when connecting headphones.
A microprocessor or a switch can replace the headphone
jack contact pin. When a microprocessor or switch applies a
voltage greater than 4V to the HP-IN pin, a bridge-connected
speaker is muted and the single ended output amplifiers 1A
and 2A will drive a pair of headphones.
MUTE FUNCTION
The LM4938 mutes the amplifier and DOCK outputs when
VDD is applied to the MUTE pin. Even while muted, the
LM4938 will amplify a system alert (beep) signal whose
magnitude satisfies the BEEP DETECT circuitry. Applying
0V to the MUTE pin returns the LM4938 to normal, unmuted
operation. Prevent unanticipated mute behavior by connecting the MUTE pin to VDD or ground. Do not let the mute pain
float.
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18
The result is increased bridge-amplifier gain at low frequencies. The combination of RLFE and CLFE form a -6dB corner
frequency at
(Continued)
GAIN SELECT FUNCTION (Bass Boost)
The LM4938 features selectable gain, using either internal or
external feedback resistors. Either set of feedback resistors
set the gain of the output amplifiers. The voltage applied to
the GAIN SELECT pin controls which gain is selected. Applying VDD to the GAIN SELECT pin selects the external gain
mode. Applying 0V to the GAIN SELECT pin selects the
internally set unity gain.
fC = 1/(2πRLFEC
LFE)
(9)
The bridged-amplifier low frequency differential gain is:
AVD = 2(RF + RLFE) / R
In some cases a designer may want to improve the low
frequency response of the bridged amplifier or incorporate a
bass boost feature. This bass boost can be useful in systems
where speakers are housed in small enclosures. A resistor,
RLFE, and a capacitor, CLFE, in parallel, can be placed in
series with the feedback resistor of the bridged amplifier as
seen in Figure 4.
i
(10)
Using the component values shown in Figure 1 (RF = 20kΩ,
RLFE = 20kΩ, and CLFE = 0.068µF), a first-order, -6dB pole is
created at 120Hz. Assuming R i = 20kΩ, the low frequency
differential gain is 4. The input (Ci) and output (CO) capacitor
values must be selected for a low frequency response that
covers the range of frequencies affected by the desired
bass-boost operation.
DC VOLUME CONTROL
The LM4938 has an internal stereo volume control whose
setting is a function of the DC voltage applied to the DC VOL
CONTROL pin.
The LM4938 volume control consists of 31 steps that are
individually selected by a variable DC voltage level on the
volume control pin. The range of the steps, controlled by the
DC voltage, are from 0dB - 89dB. Each gain step corresponds to a specific input voltage range, as shown in table 2.
To minimize the effect of noise on the volume control pin,
which can affect the selected gain level, hysteresis has been
implemented. The amount of hysteresis corresponds to half
of the step width, as shown in Volume Control Characterization Graph (DS200133-40).
For highest accuracy, the voltage shown in the ’recommended voltage’ column of the table is used to select a
desired gain. This recommended voltage is exactly halfway
between the two nearest transitions to the next highest or
next lowest gain levels.
20095611
The gain levels are 1dB/step from 0dB to -6dB, 2dB/step
from -6dB to -36dB, 3dB/step from -36dB to -47dB, 4dB/step
from -47db to -51dB, 5dB/step from -51dB to -66dB, and
12dB to the last step at -89dB.
FIGURE 4. Low Frequency Enhancement
At low, frequencies CLFE is a virtual open circuit and at high
frequencies, its nearly zero ohm impedance shorts RLFE.
19
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LM4938
Application Information
LM4938
Application Information
(Continued)
VOLUME CONTROL TABLE ( Table 2 )
Gain
(dB)
Voltage Range (% of Vdd)
Low
Voltage Range (Vdd = 3)
Recommended
Low
High
Recommended
Low
High
Recommended
0
77.5% 100.00%
100.000%
3.875
5.000
5.000
2.325
3.000
3.000
-1
75.0% 78.5%
76.875%
3.750
3.938
3.844
2.250
2.363
2.306
-2
72.5% 76.25%
74.375%
3.625
3.813
3.719
2.175
2.288
2.231
-3
70.0% 73.75%
71.875%
3.500
3.688
3.594
2.100
2.213
2.156
-4
67.5% 71.25%
69.375%
3.375
3.563
3.469
2.025
2.138
2.081
-5
65.0% 68.75%
66.875%
3.250
3.438
3.344
1.950
2.063
2.006
-6
62.5% 66.25%
64.375%
3.125
3.313
3.219
1.875
1.988
1.931
-8
60.0% 63.75%
61.875%
3.000
3.188
3.094
1.800
1.913
1.856
-10
57.5% 61.25%
59.375%
2.875
3.063
2.969
1.725
1.838
1.781
-12
55.0% 58.75%
56.875%
2.750
2.938
2.844
1.650
1.763
1.706
-14
52.5% 56.25%
54.375%
2.625
2.813
2.719
1.575
1.688
1.631
-16
50.0% 53.75%
51.875%
2.500
2.688
2.594
1.500
1.613
1.556
-18
47.5% 51.25%
49.375%
2.375
2.563
2.469
1.425
1.538
1.481
-20
45.0% 48.75%
46.875%
2.250
2.438
2.344
1.350
1.463
1.406
-22
42.5% 46.25%
44.375%
2.125
2.313
2.219
1.275
1.388
1.331
-24
40.0% 43.75%
41.875%
2.000
2.188
2.094
1.200
1.313
1.256
-26
37.5% 41.25%
39.375%
1.875
2.063
1.969
1.125
1.238
1.181
-28
35.0% 38.75%
36.875%
1.750
1.938
1.844
1.050
1.163
1.106
-30
32.5% 36.25%
34.375%
1.625
1.813
1.719
0.975
1.088
1.031
-32
30.0% 33.75%
31.875%
1.500
1.688
1.594
0.900
1.013
0.956
-34
27.5% 31.25%
29.375%
1.375
1.563
1.469
0.825
0.937
0.881
-36
25.0% 28.75%
26.875%
1.250
1.438
1.344
0.750
0.862
0.806
-39
22.5% 26.25%
24.375%
1.125
1.313
1.219
0.675
0.787
0.731
-42
20.0% 23.75%
21.875%
1.000
1.188
1.094
0.600
0.712
0.656
-45
17.5% 21.25%
19.375%
0.875
1.063
0.969
0.525
0.637
0.581
-47
15.0% 18.75%
16.875%
0.750
0.937
0.844
0.450
0.562
0.506
-51
12.5% 16.25%
14.375%
0.625
0.812
0.719
0.375
0.487
0.431
-56.5
10.0% 13.75%
11.875%
0.500
0.687
0.594
0.300
0.412
0.356
-62.5
7.5%
11.25%
9.375%
0.375
0.562
0.469
0.225
0.337
0.281
-68.5
5.0%
8.75%
6.875%
0.250
0.437
0.344
0.150
0.262
0.206
-89
0.0%
6.25%
0.000%
0.000
0.312
0.000
0.000
0.187
0.000
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High
Voltage Range (Vdd = 5)
20
(Continued)
The last step in this design example is setting the amplifier’s
−6dB frequency bandwidth. To achieve the desired ± 0.25dB
pass band magnitude variation limit, the low frequency response must extend to at least one-fifth the lower bandwidth
limit and the high frequency response must extend to at least
five times the upper bandwidth limit. The gain variation for
both response limits is 0.17dB, well within the ± 0.25dB
desired limit. The results are an
AUDIO POWER AMPLIFIER DESIGN
Audio Amplifier Design: Driving 1W into an 8Ω Load
The following are the desired operational parameters:
Power Output:
1 WRMS
Load Impedance:
8Ω
Input Level:
1 VRMS
Input Impedance:
Bandwidth:
20 kΩ
100 Hz−20 kHz ± 0.25 dB
fL = 100Hz/5 = 20Hz
(14)
fH = 20kHz x 5 = 100kHz
(15)
and an
The design begins by specifying the minimum supply voltage
necessary to obtain the specified output power. One way to
find the minimum supply voltage is to use the Output Power
vs Supply Voltage curve in the Typical Performance Characteristics section. Another way, using Equation (10), is to
calculate the peak output voltage necessary to achieve the
desired output power for a given load impedance. To account for the amplifier’s dropout voltage, two additional voltages, based on the Dropout Voltage vs Supply Voltage in the
Typical Performance Characteristics curves, must be
added to the result obtained by Equation (10). The result is
Equation (11).
As mentioned in the Selecting Proper External Components section, Ri (Right & Left) and Ci (Right & Left) create
a highpass filter that sets the amplifier’s lower bandpass
frequency limit. Find the input coupling capacitor’s value
using Equation (14).
Ci ≥ 1/(2πRifL)
(16)
1/(2π*20kΩ*20Hz) = 0.397µF
(17)
The result is
(11)
VDD ≥ (VOUTPEAK+ (VODTOP + VODBOT))
Use a 0.39µF capacitor, the closest standard value.
(12)
The product of the desired high frequency cutoff (100kHz in
this example) and the differential gain AVD, determines the
upper passband response limit. With AVD = 3 and fH =
100kHz, the closed-loop gain bandwidth product (GBWP) is
300kHz. This is less than the LM4938’s 3.5MHz GBWP. With
this margin, the amplifier can be used in designs that require
more differential gain while avoiding performance,restricting
bandwidth limitations.
The Output Power vs Supply Voltage graph for an 8Ω load
indicates a minimum supply voltage of 4.6V. This is easily
met by the commonly used 5V supply voltage. The additional
voltage creates the benefit of headroom, allowing the
LM4938 to produce peak output power in excess of 1W
without clipping or other audible distortion. The choice of
supply voltage must also not create a situation that violates
of maximum power dissipation as explained above in the
Power Dissipation section.
After satisfying the LM4938’s power dissipation requirements, the minimum differential gain needed to achieve 1W
dissipation in an 8Ω load is found using Equation (12).
Recommended Printed Circuit
Board Layout
The following figures show the recommended PC board
layouts for the LM4938MH. This circuit is designed for use
with an external 5V supply and 4Ω speakers.
This circuit board is easy to use. Apply 5V and ground to the
board’s VDD and GND pads, respectively. Connect 4Ω
speakers between the board’s −OUTA and +OUTA and
OUTB and +OUTB pads.
(13)
Thus, a minimum overall gain of 2.83 allows the LM4938’s to
reach full output swing and maintain low noise and THD+N
performance.
21
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LM4938
Application Information
LM4938
Recommended Printed Circuit Board Layout
(Continued)
20095682
FIGURE 5. Top Layer Silkscreen
20095683
FIGURE 6. Top Layer TSSOP
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22
LM4938
Recommended Printed Circuit Board Layout
(Continued)
20095685
FIGURE 7. Inner Layer (2)
20095686
FIGURE 8. Inner Layer (3)
23
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LM4938
Recommended Printed Circuit Board Layout
(Continued)
20095684
FIGURE 9. Bottom Layer TSSOP
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24
LM4938
Analog Audio LM4938 TSSOP Eval Board
Assembly Part Number: 980011373-100
Revision: A
Bill of Material
Item
Part Number
Part Description
Qty
1
551011373-001
LM4938 Eval Board PCB
etch 001
1
10
482911373-001
LM4938 TSSOP
1
20
151911368-001
Cer Cap 0.068µF 50V
10% 1206
2
25
152911368-001
Tant Cap 0.1µF 10V 10% 3
Size = A 3216
CS, CS, CV
26
152911368-002
Tant Cap 0.33µF 10V
10% Size = A 3216
3
CIN
27
152911368-003
Tant Cap 1µF 16V 10%
Size = A 3216
3
CB, CO1, CO2
28
152911368-004
Tant Cap 10µF 10V 10%
Size = C 6032
1
CS1
29
152911368-005
Tant Cap 220µF 16V 10% 2
Size = D 7343
CoutL, R
30
472911368-001
Res 1.5K Ohm 1/8W
1% 1206
2
RL
31
472911368-002
Res 20K Ohm 1/8W
1% 1206
10
RIN(4), RF(2),
RDOCK(2),
RBS(2)
32
472911368-003
Res 100K Ohm 1/8W
1% 1206
2
RPU, RS
33
472911368-004
Res 200K Ohm 1/16W
1% 0603
2
RBEEP
40
131911368-001
Stereo Headphone Jack
W/ Switch
1
Mouser #
161-3500
41
131911368-002
Slide Switch
4
mute, mode, Gain, Mouser #
SD
10SP003
42
131911368-003
Potentiometer
1
Volume Control
Mouser #
317-2090-100K
43
131911368-004
RCA Jack
3
Right-In, Beep-In,
Left-In
Mouser #
16PJ097
44
131911368-005
Banana Jack, Black
3
Mouser #
ME164-6219
45
131911368-006
Banana Jack, Red
3
Mouser #
ME164-6218
25
Ref Designator
Remark
CBS
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LM4938 Stereo 2W Audio Power Amplifiers with DC Volume Control and Selectable Gain
Physical Dimensions
inches (millimeters) unless otherwise noted
Exposed-DAP TSSOP Package
Order Number LM4938MH
NS Package Number MXA28A for Exposed-DAP TSSOP
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR
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which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and whose failure to perform when
properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result
in a significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
system, or to affect its safety or effectiveness.
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no ‘‘Banned Substances’’ as defined in CSP-9-111S2.
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