ETC LM353

Index of /ds/LM/
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Parent Directory
LM101A.pdf
22-Dec-99 00:11
65K
LM101A_LH2101A.pdf
24-Nov-98 00:00
65K
LM108A.pdf
22-Dec-99 00:11
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LM111.pdf
22-Dec-99 00:11
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LM124.pdf
22-Dec-99 00:11
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LM139.pdf
22-Dec-99 00:11
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LM139A.pdf
22-Dec-99 00:11
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LM1458.pdf
22-Dec-99 00:11
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LM1458A.pdf
22-Dec-99 00:11
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LM1458AI.pdf
22-Dec-99 00:11
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LM1458AIM.pdf
03-Dec-99 15:48
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LM1458AIN.pdf
03-Dec-99 15:48
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LM1458AIS.pdf
03-Dec-99 15:48
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LM1458AM.pdf
03-Dec-99 15:48
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LM1458AN.pdf
03-Dec-99 15:48
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LM1458AS.pdf
03-Dec-99 15:48
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LM1458I.pdf
22-Dec-99 00:11
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LM1458IM.pdf
03-Dec-99 15:48
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LM1458IN.pdf
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LM1458IS.pdf
03-Dec-99 15:48
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LM1458M.pdf
03-Dec-99 15:48
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LM1458N.pdf
03-Dec-99 15:48
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LM1458S.pdf
03-Dec-99 15:48
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Description
LM148.pdf
22-Dec-99 00:11
98K
LM1851.pdf
22-Dec-99 00:11
88K
LM1882.pdf
25-Aug-97 17:20
228K
LM224.pdf
22-Dec-99 00:11
1M
LM224A.pdf
22-Dec-99 00:11
1M
LM236-2.5.pdf
22-Dec-99 00:11
134K
LM239.pdf
22-Dec-99 00:11
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LM239A.pdf
22-Dec-99 00:11
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LM239AM.pdf
03-Dec-99 15:48
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LM239AN.pdf
03-Dec-99 15:48
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LM239M.pdf
03-Dec-99 15:48
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LM239N.pdf
03-Dec-99 15:48
144K
LM248.pdf
08-Feb-00 00:00
1M
LM248M.pdf
22-Dec-99 00:11
1M
LM248N.pdf
22-Dec-99 00:11
1M
LM258.pdf
08-Feb-00 00:00
1M
LM258A.pdf
08-Feb-00 00:00
1M
LM258AM.pdf
22-Dec-99 00:11
1M
LM258AN.pdf
22-Dec-99 00:11
1M
LM258AS.pdf
22-Dec-99 00:11
1M
LM258M.pdf
22-Dec-99 00:11
1M
LM258N.pdf
22-Dec-99 00:11
1M
LM258S.pdf
22-Dec-99 00:11
1M
LM2901.pdf
22-Dec-99 00:11
144K
LM2901M.pdf
03-Dec-99 15:48
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LM2901N.pdf
03-Dec-99 15:48
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LM2902.pdf
22-Dec-99 00:11
1M
LM2903.pdf
08-Feb-00 00:00
119K
LM2903M.pdf
03-Dec-99 15:48
169K
LM2903N.pdf
03-Dec-99 15:48
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LM2903S.pdf
03-Dec-99 15:48
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LM2904.pdf
08-Feb-00 00:00
1M
LM2904M.pdf
22-Dec-99 00:11
1M
LM2904N.pdf
22-Dec-99 00:11
1M
LM2904S.pdf
22-Dec-99 00:11
1M
LM293.pdf
08-Feb-00 00:00
119K
LM293A.pdf
08-Feb-00 00:00
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LM293AM.pdf
03-Dec-99 15:48
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LM293AN.pdf
03-Dec-99 15:48
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LM293AS.pdf
03-Dec-99 15:48
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LM293M.pdf
03-Dec-99 15:48
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LM293N.pdf
03-Dec-99 15:48
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LM293S.pdf
03-Dec-99 15:48
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LM311.pdf
22-Dec-99 00:11
427K
LM311M.pdf
03-Dec-99 15:48
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LM311N.pdf
03-Dec-99 15:48
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LM317L.pdf
22-Dec-99 00:11
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LM324.pdf
17-Feb-00 00:00
68K
LM324A.pdf
22-Dec-99 00:11
1M
LM3301.pdf
22-Dec-99 00:11
144K
LM3301M.pdf
03-Dec-99 15:48
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LM3301N.pdf
03-Dec-99 15:48
144K
LM336-2.5.pdf
22-Dec-99 00:11
134K
LM336-2.5B.pdf
22-Dec-99 00:11
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LM337.pdf
22-Dec-99 00:11
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LM339.pdf
17-Feb-00 00:00
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LM339A.pdf
22-Dec-99 00:11
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LM339AM.pdf
03-Dec-99 15:48
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LM339AN.pdf
03-Dec-99 15:48
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LM339M.pdf
03-Dec-99 15:48
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LM339N.pdf
03-Dec-99 15:48
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LM348.pdf
08-Feb-00 00:00
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LM348M.pdf
22-Dec-99 00:11
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LM348N.pdf
22-Dec-99 00:11
1M
LM353.pdf
22-Dec-99 00:11
49K
LM358.pdf
08-Feb-00 00:00
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LM358A.pdf
08-Feb-00 00:00
1M
LM358AM.pdf
22-Dec-99 00:11
1M
LM358AN.pdf
22-Dec-99 00:11
1M
LM358AS.pdf
22-Dec-99 00:11
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LM358M.pdf
22-Dec-99 00:11
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LM358N.pdf
22-Dec-99 00:11
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LM358S.pdf
22-Dec-99 00:11
1M
LM393.pdf
08-Feb-00 00:00
119K
LM393A.pdf
08-Feb-00 00:00
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LM393AM.pdf
03-Dec-99 15:48
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LM393AN.pdf
03-Dec-99 15:48
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LM393AS.pdf
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LM393M.pdf
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LM393N.pdf
03-Dec-99 15:48
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LM393S.pdf
03-Dec-99 15:48
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LM442.pdf
22-Dec-99 00:11
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LM442AN.pdf
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LM442AS.pdf
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LM442N.pdf
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LM442S.pdf
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LM555.pdf
08-Feb-00 00:00
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LM555I.pdf
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LM555IM.pdf
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LM555IN.pdf
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LM555M.pdf
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LM555N.pdf
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LM556.pdf
22-Dec-99 00:11
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LM710.pdf
22-Dec-99 00:11
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LM710I.pdf
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LM710IM.pdf
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LM710IN.pdf
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LM710M.pdf
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LM710N.pdf
22-Dec-99 00:11
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LM711.pdf
22-Dec-99 00:11
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LM711I.pdf
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LM711IM.pdf
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LM711IN.pdf
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LM711M.pdf
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LM711N.pdf
22-Dec-99 00:11
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LM741.pdf
08-Feb-00 00:00
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LM741E.pdf
08-Feb-00 00:00
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LM741EI.pdf
08-Feb-00 00:00
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LM741EIM.pdf
22-Dec-99 00:12
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LM741EIN.pdf
22-Dec-99 00:12
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LM741EM.pdf
22-Dec-99 00:12
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LM741EN.pdf
22-Dec-99 00:12
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LM741I.pdf
08-Feb-00 00:00
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LM741IM.pdf
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LM741IN.pdf
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LM741M.pdf
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LM741N.pdf
22-Dec-99 00:12
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LM7805.pdf
22-Dec-99 00:12
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LM7805A.pdf
16-Apr-99 00:00
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LM7806.pdf
22-Dec-99 00:12
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LM7806A.pdf
16-Apr-99 00:00
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LM7808.pdf
22-Dec-99 00:12
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LM7808A.pdf
16-Apr-99 00:00
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LM7809.pdf
22-Dec-99 00:12
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LM7809A.pdf
16-Apr-99 00:00
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LM7810.pdf
22-Dec-99 00:12
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LM7810A.pdf
16-Apr-99 00:00
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LM7811.pdf
22-Dec-99 00:12
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LM7811A.pdf
16-Apr-99 00:00
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LM7812.pdf
22-Dec-99 00:12
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LM7812A.pdf
16-Apr-99 00:00
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LM7815.pdf
22-Dec-99 00:12
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LM7815A.pdf
16-Apr-99 00:00
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LM7818.pdf
22-Dec-99 00:12
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LM7818A.pdf
16-Apr-99 00:00
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LM7824.pdf
22-Dec-99 00:12
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LM7824A.pdf
16-Apr-99 00:00
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LM78L05.pdf
22-Dec-99 00:12
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LM78L06.pdf
22-Dec-99 00:12
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LM78L08.pdf
22-Dec-99 00:12
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LM78L09.pdf
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LM78L10.pdf
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LM78L12.pdf
22-Dec-99 00:12
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LM78L15.pdf
22-Dec-99 00:12
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LM78L18.pdf
22-Dec-99 00:12
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LM78L24.pdf
22-Dec-99 00:12
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LM78LXX.pdf
22-Dec-99 00:12
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LM78M05.pdf
08-Feb-00 00:00
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LM78M06.pdf
16-Apr-99 00:00
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LM78M08.pdf
08-Feb-00 00:00
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LM78M10.pdf
08-Feb-00 00:00
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LM78M12.pdf
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LM78M15.pdf
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LM78M18.pdf
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LM78M20.pdf
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LM78M24.pdf
08-Feb-00 00:00
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LM78MXX.pdf
08-Feb-00 00:00
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LM78XX.pdf
22-Dec-99 00:12
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LM7905.pdf
22-Dec-99 00:12
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LM7905A.pdf
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LM7906.pdf
22-Dec-99 00:12
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LM7906A.pdf
22-Dec-99 00:12
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LM7908.pdf
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LM7908A.pdf
22-Dec-99 00:12
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LM7909.pdf
16-Apr-99 00:00
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LM7912.pdf
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LM7912A.pdf
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LM7915.pdf
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LM7915A.pdf
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LM7918.pdf
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LM7918A.pdf
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LM7924.pdf
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LM7924A.pdf
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LM79L05A.pdf
08-Feb-00 00:00
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LM79L12A.pdf
08-Feb-00 00:00
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LM79L15A.pdf
08-Feb-00 00:00
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LM79L18A.pdf
08-Feb-00 00:00
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LM79L24A.pdf
08-Feb-00 00:00
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LM79LXXA.pdf
08-Feb-00 00:00
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LM79M05.pdf
16-Apr-99 00:00
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LM79M06.pdf
16-Apr-99 00:00
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LM79M08.pdf
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LM79M12.pdf
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LM79M15.pdf
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LM79M18.pdf
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LM79M24.pdf
16-Apr-99 00:00
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LM79MXX.pdf
08-Feb-00 00:00
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LM79XX.pdf
22-Dec-99 00:12
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LM79XXA.pdf
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LM79XX_A.pdf
22-Dec-99 00:12
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www.fairchildsemi.com
LM101A/LH2101A
General Purpose Operational Amplifier
Features
Description
•
•
•
•
•
The LM101A/LH2101A is a general purpose high performance operational amplifier fabricated monolithically on a
silicon chip by an advanced epitaxial process. The LH2101A
consists of two LM101A ICs in one 16-lead DIP. The units
may be fully compensated with the addition of a 30 pF
capacitor stabilizing the circuit for all feedback configurations including capacitive loads.
Input offset voltage 0.7 mV
Input bias current 30 nA
Input offset current 1.5 nA
Full frequency compensation 30pF
Supply voltage ±5.0V to ±20V
The device may be operated as a comparator with a differential input as high as 30V. Used as a comparator the output
can be clamped at any desired level to make it compatible
with logic circuits.
The LM101A and LH2101A operate over the full military
temperature range from -55°C to +125°C.
Rev 1.0.1
LM101A/LH2101A
PRODUCT SPECIFICATION
Pin Assignments
8-Lead Metal Can
(Top View)
8-Lead DIP
(Top View)
Comp
8
Comp/VOS Trim
-Input
7
1
+VS
6
2
8
Comp
-Input 2
7
+VS
+Input 3
6
Output
-VS 4
5
VOS Trim
Output
5
3
+Input
Comp/VOS Trim 1
VOS Trim
4
-VS
65-101A-01
16-Lead DIP
(Top View)
+VS (A) 1
16 Output (A)
15 NC
Comp (A) 2
Comp/VOS Trim (A) 3
A
-Input (A) 4
13 +Input (B)
+Input (A) 5
-VS 6
14 VOS Trim (A)
12 -Input (B)
B
11 Comp/VOS Trim (B)
10 Comp (B)
VOS Trim (B) 7
Ouput (B) 8
9 +VS (B)
65-101A-02
Absolute Maximum Ratings
Parameter
Min.
Max.
Units
Supply Voltage
±22
V
Differential Input Voltage
30
V
±15
V
1
Input Voltage
Output Short-Circuit Duration2
Indefinite
Storage Temperature Range
-65
+150
°C
Operating Temperature Range
-55
+125
°C
+300
°C
Lead Soldering Temperature (60 sec)
Notes:
1. For supply voltages less than ±15V, the absolute maximum input voltage is equal to the supply voltage.
2. Observe package thermal characteristics.
2
PRODUCT SPECIFICATION
LM101A/LH2101A
Thermal Characteristics
Parameter
8-Lead
Ceramic
DIP
8-Lead
TO-99
Metal Can
16-Lead
Ceramic
DIP
Maximum Junction Temperature
+175°C
+175°C
+175°C
Maximum PD TA <50°C
833 mW
658 mW
1042 mW
Thermal Resistance, qJC
45°C/W
50°C/W
60°C/W
Thermal Resistance, qJA
150°C/W
190°C/W
120°C/W
For TA > 50°C Derate at
8.33 mW/°C
5.26 mW/°C
8.33 mW/°C
Electrical Characteristics
C = 30pF; ±5.0V £ VS £ ±20V; -55°C £ TA £ +125°C unless otherwise specified
LM101A/LH2101 A
Parameters
Test Conditions
Mln.
Typ.
Max.
Units
Input Offset Voltage
TA = +25°C, RS £ 50 kW
0.7
2.0
mV
Input Offset Current
TA = +25°C
1.5
10
nA
Input Bias Current
TA = +25°C
30
75
nA
Input Resistance
TA = +25°C
Supply Current
TA = +25°C VS = ±20V
1.5
Large Signal Voltage Gain
TA = +25°C, VS = ±15V
VOUT = ±10V, RL ³ 2 KW
Input Offset Voltage
RS £ 50 KW
Average Input Offset Voltage Drift
RS £ 50 KW
4.0
1.8
50
160
3.0
Input Offset Current
Average Input Offset Current Drift
MW
3.0
V/mV
3.0
mV
15
mV/°C
20
nA
nA/°C
+25°C £ TA +125°C
0.01
0.1
-55°C £ TA +25°C
0.02
0.2
Input Bias Current
100
Supply Current
TA = +125°C, VS = ±20V
Large Signal Voltage Gain
VS = ±15V
VOUT = ±10V, RL ³ 2 KW
25
Output Voltage Swing
VS = ±15V,
RL = 10 KW
±12
±14
RL = 2 KW
±10
±13
1.2
mA
2.5
nA
mA
V/mV
V
Input Voltage Range
VS = ±20V
±15
Common Mode Rejection Ratio
RS £ 50 KW
80
96
dB
Power Supply Rejection Ratio
RS £ 50 KW
80
96
dB
V
3
LM101A/LH2101A
PRODUCT SPECIFICATION
Typical Performance Characteristics
120
2.5
T A = -55 C
T A = +25 C
1.0
T A = +125 C
0.5
0
±5
±10
±15
T A = -55 C
T A = +25 C
100
T A = +125 C
90
80
±5
±20
±10
±VS (V)
65-101A-04
1.5
AV (dB)
110
65-101A-03
ISY (mA)
2.0
±15
±20
±VS (V)
Figure 1. Supply Current vs. Supply Voltage
Figure 2. Voltage Gain vs. Supply Voltage
400
15
Vs =
200
T A = -55 C
65-101A-05
100
T A = -55 C
±5
±10
±15
10
TA = +125 C
5
0
±20
TA = +25 C
65-101A-06
IB (nA)
±VOUT (V)
T A = -55 C
300
0
0
5
±VS (V)
15
20
25
30
Figure 4. Current Limiting Output Voltage
vs. Output Current
400
600
VS =
500
15V
Pd (mW)
300
IB
200
Metal Can
400
300
DIP
0
-75
IOS
-50
-25
0
+25 +50 +75 +100 +125
TA (¡C)
Figure 5. Input Bias, Offset Current vs. Temperature
65-101A-08
200
100
65-101A-07
IB, IOS (nA)
10
IOUT (mA)
Figure 3. Input Bias Current vs. Supply Voltage
4
15V
100
0
+25
+45
+65
+85
+105
+125
TA (¡C)
Figure 6. Maximum Power Dissipation vs. Temperature
PRODUCT SPECIFICATION
LM101A/LH2101A
Typical Performance Characteristics (continued)
16
120
12
±VOUT (V)
60
C1 = 3 pF
40
20
65-101A-09
C1 = 30 pF
0
1
10
100
1K
10K 100K
1M
10M
10
8
C1 = 3 pF
6
4
2
0
1K
C1 = 30 pF
10K
100K
Figure 7. Open Loop Gain vs. Frequency
10
8
6
4
2
0
-2
-4
-6
-8
-10
1M
10M
F (Hz)
F (Hz)
Figure 8. Output Voltage Swing vs. Frequency
VS = 15V
TA = +25 C
Input
Output
65-101A-11
-20
VOUT (V)
AVOL (dB)
80
65-101A-10
100
V S = 15V
T A = +25 C
14
VS = 15V
T A = +25 C
0
10 20 30 40 50 60 70 80
Time (µS)
Figure 9. Follower Large Signal Pulse Response Output Voltage vs. Time
5
LM101A/LH2101A
PRODUCT SPECIFICATION
Typical Applications
R2
R1
Input
2
R EQ*
6
LM101A
3
8
1
Output
5
C1
30 pF
R5
5.1M
2
Inputs
-VS
R4
10M
3
LM101A
6
Output
8
R3
50K
D1
LM103
36
*May be zero or equal to parallel combination of R1 and R2
for minimum offset.
65-101A-13
65-101A-12
Figure 10. Inverting Amplifier with Balancing Circuit
Q1
2N3456
Output
Figure 11. Voltage Comparator for Driving
DTL or TTL ICs
+VS
R2
150K
2
-VS
Input
LM101A
3
8
1
Output
Q2
6
R1
91K Sample
C2*
0.01m F
Figure 12. Low Drift Sample and Hold
6
Inputs
3
LM101A
6
R1
60W
Q1
2N2222
8
D1
FD777
C1
30 pF
*Polycarbonate dielectric capacitor
2
65-101A-14
D2
FD777
65-101A-15
Figure 13. Voltage Comparator for Driving RTL Logic
or High Current Driver
PRODUCT SPECIFICATION
LM101A/LH2101A
Notes:
7
LM101A/LH2101A
Notes:
8
PRODUCT SPECIFICATION
PRODUCT SPECIFICATION
LM101A/LH2101A
Mechanical Dimensions
8-Lead TO-99 Metal Can
øD
Symbol
Min.
øD1
F
L1
Q
A
øb
øb1
øD
øD1
øD2
e
e1
A
L2
L
Inches
øb
BASE and
SEATING
PLANE
øb1
REFERENCE
PLANE
F
k
k1
L
L1
L2
Q
a
Max.
.165
.185
.016
.019
.016
.021
.335
.375
.305
.335
.110
.160
.200 BSC
.100 BSC
—
.040
.027
.034
.027
.045
.500
.750
—
.050
.250
—
.010
.045
45¡ BSC
Millimeters
Min.
Notes
Max.
4.19
4.70
.41
.48
.41
.53
8.51
9.52
7.75
8.51
2.79
4.06
5.08 BSC
2.54 BSC
—
1.02
.69
.86
.69
1.14
12.70
19.05
—
1.27
6.35
—
.25
1.14
45¡ BSC
1, 5
1, 5
2
1
1
1
e
Notes:
e1
øD2
1. (All leads) øb applies between L1 & L2. øb1 applies between
L2 & .500 (12.70mm) from the reference plane. Diameter is
uncontrolled in L1 & beyond .500 (12.70mm) from the
reference plane.
2. Measured from the maximum diameter of the product.
3. Leads having a maximum diameter .019 (.48mm) measured in
gauging plane, .054 (1.37mm) +.001 (.03mm) –.000 (.00mm)
below the reference plane of the product shall be within
.007 (.18mm) of their true position relative to a maximum width
tab.
4. The product may be measured by direct methods or by gauge.
a
5. All leads – increase maximum limit by .003 (.08mm) when lead
finish is applied.
k
k1
9
LM101A/LH2101A
PRODUCT SPECIFICATION
Mechanical Dimensions (continued)
8-Lead Ceramic DIP
Inches
Symbol
Min.
A
b1
b2
c1
D
E
e
eA
L
Q
s1
a
Millimeters
Max.
Min.
—
.200
.014
.023
.045
.065
.008
.015
—
.405
.220
.310
.100 BSC
.300 BSC
.125
.200
.015
.060
.005
—
90¡
105¡
Notes:
Notes
Max.
—
5.08
.36
.58
1.14
1.65
.20
.38
—
10.29
5.59
7.87
2.54 BSC
7.62 BSC
3.18
5.08
.38
1.52
.13
—
90¡
105¡
1. Index area: a notch or a pin one identification mark shall be located
adjacent to pin one. The manufacturer's identification shall not be
used as pin one identification mark.
8
2, 8
2. The minimum limit for dimension "b2" may be .023 (.58mm) for leads
number 1, 4, 5 and 8 only.
8
4
4
5, 9
7
3. Dimension "Q" shall be measured from the seating plane to the base
plane.
3
6
4. This dimension allows for off-center lid, meniscus and glass overrun.
5. The basic pin spacing is .100 (2.54mm) between centerlines. Each
pin centerline shall be located within ±.010 (.25mm) of its exact
longitudinal position relative to pins 1 and 8.
6. Applies to all four corners (leads number 1, 4, 5, and 8).
7. "eA" shall be measured at the center of the lead bends or at the
centerline of the leads when "a" is 90¡.
8. All leads – Increase maximum limit by .003 (.08mm) measured at the
center of the flat, when lead finish applied.
9. Six spaces.
D
4
1
Note 1
E
5
8
s1
eA
e
A
Q
a
L
b2
b1
10
c1
PRODUCT SPECIFICATION
LM101A/LH2101A
Mechanical Dimensions (continued)
16-Lead Ceramic DIP
Inches
Symbol
Min.
A
b1
b2
c1
D
E
e
eA
L
Q
s1
a
Notes:
Millimeters
Max.
Min.
—
.200
.014
.023
.050
.065
.008
.015
.745
.840
.220
.310
.100 BSC
.300 BSC
.115
.160
.015
.060
.005
—
90¡
105¡
Notes
Max.
—
5.08
.36
.58
1.27
1.65
.20
.38
18.92
21.33
5.59
7.87
2.54 BSC
7.62 BSC
2.92
4.06
.38
1.52
.13
—
90¡
105¡
1. Index area: a notch or a pin one identification mark shall be located
adjacent to pin one. The manufacturer's identification shall not be
used as pin one identification mark.
8
2
2. The minimum limit for dimension "b2" may be .023 (.58mm) for leads
number 1, 8, 9 and 16 only.
8
4
3. Dimension "Q" shall be measured from the seating plane to the base
plane.
4
5, 9
7
4. This dimension allows for off-center lid, meniscus and glass overrun.
3
6
5. The basic pin spacing is .100 (2.54mm) between centerlines. Each
pin centerline shall be located within ±.010 (.25mm) of its exact
longitudinal position relative to pins 1 and 16.
6. Applies to all four corners (leads number 1, 8, 9, and 16).
7. "eA" shall be measured at the center of the lead bends or at the
centerline of the leads when "a" is 90¡.
8. All leads – Increase maximum limit by .003 (.08mm) measured at the
center of the flat, when lead finish applied.
9. Fourteen spaces.
D
8
1
9
16
NOTE 1
E
s1
eA
e
A
Q
L
a
c1
b1
11
PRODUCT SPECIFICATION
LM101A/LH2101A
Ordering Information
Package
Operating
Temperature
Range
LM101AD
8-Lead Ceramic DIP
-55°C to +125°C
LM101AD/883B
8-Lead Ceramic DIP
-55°C to +125°C
LM101AT
8-Lead Metal Can
-55°C to +125°C
LM101AT/883B
8-Lead Metal Can
-55°C to +125°C
LH2101AD
16-Lead Ceramic DIP
-55°C to +1 25°C
LH2101AD/883B
16-Lead Ceramic DIP
-55°C to +125°C
Part Number
Notes:
1. /883B suffix denotes Mil-Std-883. Level B processing.
2. Contact a Fairchild Semiconductor sales office or representative for ordering information on special package/ temperature
range combinations.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
5/20/98 0.0m 001
Stock#DS3000101A
Ó 1998 Fairchild Semiconductor Corporation
www.fairchildsemi.com
LM108A/LH2108A
Precision Operational Amplifiers
Features
Description
•
•
•
•
•
•
•
•
•
The LM108A operational amplifiers features low input bias
current combined with the advantages of bipolar transistor
construction; input offset voltages and currents are kept
low over a wide range of temperature and supply voltage.
Fairchild Semiconductor’s superbeta bipolar manufacturing
process includes extra treatment at epitaxial growth to ensure
low input voltage noise.
Low input bias current — 2 nA
Low input offset current — 200 pA
Low input offset voltage — 500mV
Low input offset drift — 5 mV/°C
Wide supply range — ±3V to ±20V
Low supply current — 0.6 mA
High PSRR — 96 dB
High CMRR — 96 dB
MIL-STD-883B available
The LH2108 consists of two LM108 ICs in one 16-lead DIP.
The “A” versions meet tighter electrical specifications than
the plain versions. All types are available with 883B military
screening.
Rev 1.0.0
LM108A/LH2108A
PRODUCT SPECIFICATION
Pin Assignments
8-Lead Metal Can
(Top View)
8-Lead DIP
(Top View)
Comp
8
Comp
-Input
+Input
+VS
7
1
6
2
Comp 1
8
Comp
-Input 2
7
+VS
+Input 3
6
Output
-VS 4
5
NS
Output
5
3
NC
4
-VS
65-108A-01
16-Lead DIP
(Top View)
+VS (A) 1
16 Output (A)
15 NC
Comp (A) 2
Comp/VOS Trim (A) 3
14 VOS Trim
-Input (A) 4
13 +Input (B)
+Input (A) 5
12 -Input (B)
-VS 6
11 Comp/VOS Trim (B)
NC 7
10 Comp (B)
Output (B) 8
9 +VS (B)
65-108A-02
Absolute Maximum Ratings
Parameter
Min.
Supply Voltage
Differential Input
Input
Current1
Voltage2
Output Short-Circuit Duration2
Max.
Units
±20
V
±10
mA
±15
V
Continuous
Operating Temperature Range
-55
+125
°C
Storage Temperature Range
-65
+150
°C
+300
°C
Lead Soldering Temperature (60 seconds)
Notes:
1. The inputs are shunted with back-to-back diodes for overvoltage protection. Therefore, if a differential input voltage in excess
of 1V is applied between the inputs, excessive current will flow, unless some limiting resistance is provided.
2. For supply voltages less than ±15V, the absolute maximum input voltage is equal to the supply voltage.
2
PRODUCT SPECIFICATION
LM108A/LH2108A
Thermal Characteristics
8-Lead
Metal Can
8-Lead
Ceramic DIP
16-Lead
Ceramic DIP
Maximum Junction Temperature
+175°C
+175°C
+175°C
Max. PDTA < 50°C
658 mW
833 mW
1042 mW
Thermal Resistance, qJC
50°C/W
45°C/W
60°C/W
Thermal Resistance, qJA
190°C/W
150°C/W
120°C/W
For TA > 50°C Derate at
5.26 mW/°C
8.33 mW/°C
8.38 mW/°C
Parameter
Electrical Characteristics
±5V, £ VS £ ±20V and TA £ +25°C unless otherwise noted
LM108A/LH2108A
Parameters
Test Conditlons
Min.
Typ.
Max.
Input Offset Voltage
0.3
Input Offset Current
Input Bias Current
Input Resistance1
Large Signal Voltage
Gain
VS = ±15V,
VOUT ±10V,
RL ³ 10KW
Supply Current
Each Amplifier
LM108/LH2108
Min.
Typ.
Max.
Units
0.5
0.7
2.0
mV
0.05
0.2
0.05
0.2
nA
0.8
2.0
0.8
2.0
nA
30
70
30
70
MW
80
300
50
300
V/mV
0.3
0.6
0.3
0.6
mA
±5V, £ VS £ ±20V; -55°C £ TA £ +25°C unless otherwise noted
Input Offset Voltage
0.4
1.0
1.0
3.0
mV
Avg. Input Offset
Voltage Drift2
1.0
5.0
3.0
15
mV/°C
Input Offset Current
0.1
0.4
0.1
0.4
nA
Avg. lnput Offset
Current Drift2
0.5
2.5
0.5
2.5
pA/°C
Input Bias Current
1.0
3.0
1.0
3.0
nA
Large Signal Voltage
Gain
VS = ±15V,
VOUT = ±10V,
RL ³ 10 KW
40
200
25
200
V/mV
Output Voltage Swing
RL ³ 10 KW,
VS = ±20V
±16
±18
±16
±18
V
Input Voltage Range
VS = ±15V
Common Mode
Rejection Ratio
VCM = ±13.5V,
VS = ±15V
96
110
85
100
dB
Power Supply Rejection
Ratio
VS = ±15V
96
110
80
96
dB
Supply Current
Each Amplifier
±13.5
±13.5
0.6
V
0.6
mA
Notes:
1. Guaranteed by input bias current specification.
2. Sample tested.
3
LM108A/LH2108A
PRODUCT SPECIFICATION
Typical Applications
cleaning procedure is required to achieve the LM108A’s
rated performance. It is suggested that board leakage be
minimized by encircling the input pins with a guard ring
maintained at a potential close to that of the inputs. The
guard ring should be driven by a low impedance source such
as an amplifier’s output or ground.
The LM108 series has very low input offset and bias
currents; the user is cautioned that printed circuit board
leakages can produce significant errors especially at high
board temperatures. Careful attention to board layout and
R5
+VS
R3
50K
R1
-VIN
R1
200K
R4
2
R2
100
3
R2
2
LM108
6
VOUT
R3
+VIN
-VS
Range = ±VS
3
( R2 (
Gain = 1 +
VOUT
8
1 C *
F
R1
+VIN
6
LM108
(
( R4R5
+ R2
CF >
*Bandwidth and slew rate
are proportional to 1/CF
65-2653
Figure 1. Offset Adjustment for Non-Inverting Amplifiers
Figure 2. Standard Compensation Circuit
R2
-VIN
2
R1
3
-VIN
+VIN
R5
20K
R2
VOUT
+VS
R3
R1
2
6
LM108
+VIN
R3
-VS
6
LM108
3
VOUT
8**
CS
100 pF
R6
25K
R4
10
L
CL = Load Capacitance
65-2652
R1
( R1R1+CR2 (
R2 = R3 + R4
R5
Range = ±VS
Gain =
R2
(
R4
((
R1
R1 + R3
(
*Improves rejection of power supply noise by a factor of 10.
**Bandwidth and slew rate are proportional to 1/CS.
R1
65-2655
65-2654
Figure 3. Offset Adjustment for Differential Amplifiers
Figure 4. Alternate Frequency Compensation
C2
5 pF
R3
R2
R4
VIN
+VS
R5
50K
R1
200K
3
LM108
6
VOUT
2
Range = ±VS
( R2 (
R1
Figure 5. Offset Adjustment for Inverting Amplifiers
C1
500 pF
6
LM108
8
1
65-2650
4
VIN
10K
3
R2
100
-VS
R1
10K
2
VOUT
R3
3K
C3
10 pF
65-2651
Figure 6. Feedforward Compensation
PRODUCT SPECIFICATION
LM108A/LH2108A
Mechanical Dimensions
8-Lead TO-99 Metal Can
øD
Symbol
Min.
øD1
F
L1
Q
A
øb
øb1
øD
øD1
øD2
e
e1
A
L2
L
Inches
øb
BASE and
SEATING
PLANE
øb1
REFERENCE
PLANE
F
k
k1
L
L1
L2
Q
a
Max.
.165
.185
.016
.019
.016
.021
.335
.375
.305
.335
.110
.160
.200 BSC
.100 BSC
—
.040
.027
.034
.027
.045
.500
.750
—
.050
.250
—
.010
.045
45¡ BSC
Millimeters
Min.
Notes
Max.
4.19
4.70
.41
.48
.41
.53
8.51
9.52
7.75
8.51
2.79
4.06
5.08 BSC
2.54 BSC
—
1.02
.69
.86
.69
1.14
12.70
19.05
—
1.27
6.35
—
.25
1.14
45¡ BSC
1, 5
1, 5
2
1
1
1
e
Notes:
e1
øD2
1. (All leads) øb applies between L1 & L2. øb1 applies between
L2 & .500 (12.70mm) from the reference plane. Diameter is
uncontrolled in L1 & beyond .500 (12.70mm) from the
reference plane.
2. Measured from the maximum diameter of the product.
3. Leads having a maximum diameter .019 (.48mm) measured in
gauging plane, .054 (1.37mm) +.001 (.03mm) –.000 (.00mm)
below the reference plane of the product shall be within
.007 (.18mm) of their true position relative to a maximum width
tab.
4. The product may be measured by direct methods or by gauge.
a
5. All leads – increase maximum limit by .003 (.08mm) when lead
finish is applied.
k
k1
5
LM108A/LH2108A
PRODUCT SPECIFICATION
Mechanical Dimensions (continued)
8-Lead Ceramic DIP
Inches
Symbol
Min.
A
b1
b2
c1
D
E
e
eA
L
Q
s1
a
Millimeters
Max.
Min.
—
.200
.014
.023
.045
.065
.008
.015
—
.405
.220
.310
.100 BSC
.300 BSC
.125
.200
.015
.060
.005
—
90¡
105¡
Notes:
Notes
Max.
—
5.08
.36
.58
1.14
1.65
.20
.38
—
10.29
5.59
7.87
2.54 BSC
7.62 BSC
3.18
5.08
.38
1.52
.13
—
90¡
105¡
1. Index area: a notch or a pin one identification mark shall be located
adjacent to pin one. The manufacturer's identification shall not be
used as pin one identification mark.
8
2, 8
2. The minimum limit for dimension "b2" may be .023 (.58mm) for leads
number 1, 4, 5 and 8 only.
8
4
4
5, 9
7
3. Dimension "Q" shall be measured from the seating plane to the base
plane.
3
6
4. This dimension allows for off-center lid, meniscus and glass overrun.
5. The basic pin spacing is .100 (2.54mm) between centerlines. Each
pin centerline shall be located within ±.010 (.25mm) of its exact
longitudinal position relative to pins 1 and 8.
6. Applies to all four corners (leads number 1, 4, 5, and 8).
7. "eA" shall be measured at the center of the lead bends or at the
centerline of the leads when "a" is 90¡.
8. All leads – Increase maximum limit by .003 (.08mm) measured at the
center of the flat, when lead finish applied.
9. Six spaces.
D
4
1
Note 1
E
5
8
s1
eA
e
A
Q
a
L
b2
b1
6
c1
PRODUCT SPECIFICATION
LM108A/LH2108A
Mechanical Dimensions (continued)
16-Lead Ceramic DIP
Inches
Symbol
Min.
A
b1
b2
c1
D
E
e
eA
L
Q
s1
a
Notes:
Millimeters
Max.
Min.
—
.200
.014
.023
.050
.065
.008
.015
.745
.840
.220
.310
.100 BSC
.300 BSC
.115
.160
.015
.060
.005
—
90¡
105¡
Notes
Max.
—
5.08
.36
.58
1.27
1.65
.20
.38
18.92
21.33
5.59
7.87
2.54 BSC
7.62 BSC
2.92
4.06
.38
1.52
.13
—
90¡
105¡
1. Index area: a notch or a pin one identification mark shall be located
adjacent to pin one. The manufacturer's identification shall not be
used as pin one identification mark.
8
2
2. The minimum limit for dimension "b2" may be .023 (.58mm) for leads
number 1, 8, 9 and 16 only.
8
4
3. Dimension "Q" shall be measured from the seating plane to the base
plane.
4
5, 9
7
4. This dimension allows for off-center lid, meniscus and glass overrun.
3
6
5. The basic pin spacing is .100 (2.54mm) between centerlines. Each
pin centerline shall be located within ±.010 (.25mm) of its exact
longitudinal position relative to pins 1 and 16.
6. Applies to all four corners (leads number 1, 8, 9, and 16).
7. "eA" shall be measured at the center of the lead bends or at the
centerline of the leads when "a" is 90¡.
8. All leads – Increase maximum limit by .003 (.08mm) measured at the
center of the flat, when lead finish applied.
9. Fourteen spaces.
D
8
1
9
16
NOTE 1
E
s1
eA
e
A
Q
L
a
c1
b1
7
PRODUCT SPECIFICATION
LM108A/LH2108A
Ordering Information
Part Number
Package
Operation Temperature Range
LM108D
8-Lead Ceramic DIP
-55°C to +125°C
LM108D/883B
8-Lead Ceramic DIP
-55°C to +125°C
LM108AD
8-Lead Ceramic DIP
-55°C to +125°C
LM108AD/883B
8-Lead Ceramic DIP
-55°C to +125°C
8-Lead Metal Can TO-99
-55°C to +125°C
LM108T
LM108T/883B
8-Lead Metal Can TO-99
-55°C to +125°C
LM108AT
8-Lead Metal Can TO-99
-55°C to +125°C
LM108AT/883B
8-Lead Metal Can TO-99
-55°C to +125°C
LH2108D
16-Lead Ceramic DIP
-55°C to +125°C
LH2108D/883B
16-Lead Ceramic DIP
-55°C to +125°C
LH2108AD
16-Lead Ceramic DIP
-55°C to +125°C
LH2108AD/883B
16-Lead Ceramic DIP
-55°C to +125°C
Note:
1. /883B suffix denotes Mil-Std-883, Level B processing
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
5/20/98 0.0m 001
Stock#DS3000108A
Ó 1998 Fairchild Semiconductor Corporation
www.fairchildsemi.com
LM111/LH2111
Voltage Comparators
Features
Description
•
•
•
•
These low input current voltage comparators are designed to
operate over a wide range of supply voltages, including
+15V and single +5V supplies. Their outputs are compatible
with DTL, RTL, TTL and MOS devices, and can be connected in “wire-OR” configuration. The LH2111 consists of
two LM111 ICs packaged in a 16-lead DIP. The LH2111 is
available with MIL-STD 883B screening.
Low input offset current — 4 nA
Low input bias current — 60 nA
Operates from a single +5V supply
Response Time — 200 ns
Rev 1.0.1
LM111/LH2111
PRODUCT SPECIFICATION
Pin Assignments
8-Lead DIP
(Top View)
8-Lead Metal Can
(Top View)
+VS
8
Ground
+Input
–Input
1
A
2
3
Ground
1
8
+VS
+Input
2
7
Output
–Input
3
6
Balance/Strobe
–VS
4
5
Balance
Output
7
6
5
Balance/Strobe
Balance
4
–VS
65-111-01
16-Lead Ceramic DIP
(Top View)
+VS (A)
1
16
NC
Ground (A)
2
15
Output (A)
+Input (A)
3
14
Balance/Strobe (A)
–Input (A)
4
13
Balance (A)
–VS (A)
5
12
–Input (B)
Balance (B)
6
11
+Input (B)
Balance/Strobe (B)
7
10
Ground (B)
Output (B)
8
9
+VS (B)
A
B
65-111-02
Absolute Maximum Ratings
Parameter
Min.
Max.
Unit
Supply Voltage
-18
+18
V
Output to –VS
50
V
Ground to –VS
30
V
Differential Input Voltage
30
V
+15
V
500
mW
10
seconds
Input
Voltage1
Power
-15
Dissipation2
Output Short Circuit Duration
Storage Temperature Range
-65
+150
°C
Operating Temperature Range
-55
+125
•C
+VS–5
V
+300
°C
Voltage at Strobe Pin
Lead Soldering Temperature (60 seconds)
Notes:
1. For supply voltages other than ±15V, the maximum input is equal to the supply voltage.
2. Observe package thermal characteristics.
2
PRODUCT SPECIFICATION
LM111/LH2111
Thermal Characteristics
Parameter
8-Lead Metal Can
8-Lead Ceramic DIP 16-Lead Ceramic DIP
Maximum Junction Temperature
+175°C
+175°C
+175°C
Maximum PD TA <50°C
658 mW
833 mW
1042 mW
Thermal Resistance, qJC
50°C/W
45°C/W
60°C/W
Thermal Resistance, qJA
190°C/W
150°C/W
120°C/W
For TA > 50°C Derate at
5.26 mW/°C
8.33 mW/°C
8.38 mW/°C
Electrical Characteristics
VS = ±15V1 and -55°C £ TA £ +125°C unless otherwise noted.
Parameters
Input Offset
Voltage2
Input Offset
Current2
Input Bias Current
Test Conditions
Min.
Typ.
Max.
Units
TA = +25°C, RS 50 kW
0.7
3.0
mV
TA = +25°C
4.0
10
nA
TA = +25°C
60
100
nA
Large Signal Voltage Gain
TA = +25°C
200
V/mV
Response Time
Output Voltage Low (VOL)
TA = +25°C, 100 mV step, 5 mV overdrive
VIN £ 5 mV, IL = 50 mA, TA = +25°C
200
3.0
ns
mA
Output Leakage current
VIN 25 mV, VOUT = 35V,
TA = +25°C, ISTROBE = 3 mA
0.2
10
nA
Input Offset Voltage2
RS £ 50 KW
40
1.5
4.0
mV
Input Offset Current2
5.0
20
nA
Input Bias Current
100
150
nA
13.0
V
Input Voltage Range
Pin 7 pull up may go to +5V
-14.5
Output Voltage Low (VOL)
+VS = 4.5V, -VS = 0V, VIN £ -6 mV,
IOUT = 8.0 mA
0.23
0.4
V
Output Leakage Current
VIN ³ 5 mV, VOUT = 35V
100
500
nA
Positive Supply Current
TA = +25°C, each amplifier
5.1
6.0
mA
Negative Supply Current
TA = +25°C, each amplifier
4.1
5.0
mA
Notes:
1. VOS, IOS and IB specifications apply for VS = +5V to VS = ±15V.
2. VOS and IOS are maximum values required to drive the output to within 1V of either supply with a 1 mA load.
3. Do not short circuit the strobe pin to ground—drive it with a 3 to 5 mA current Instead.
4. If the strobe and balance pins are unused, short them together for maximum AC stability.
3
LM111/LH2111
PRODUCT SPECIFICATION
Typical Performance Characteristics
30
400
V S = 15V
20
IOS (nA)
200
100
Raised (Short
Pins 5, 6 &8)*
10
Normal
65-111-03
Normal
0
-55
-35
-15
+5
+25
+45
+65
65-111-04
IB (nA)
VS = 15V
Raised (Short Pins
5, 6, and 8)*
300
0
-55
+85 +105 +125
-35
-15
+5
+25
+45
+65
TA ( ¡C)
TA ( ¡C)
* Pin numbers are for 8-lead packages
* Pin numbers are for 8-lead packages
Figure 1. Input Bias Current vs. Temperature
Figure 2. Input Offset Current vs. Temperature
100
180
T
A = +25 C
160
140
VS = 15V
T A = +25 C
120
IB (nA)
Maximum
Typical
1
100
80
60
100K
1M
65-111-06
0.1
10K
40
65-111-05
V OS = V OS+ R S I OS
20
0
10M
-16
-12
-8
-4
RIN ( ½ )
60
-0.5
50
Referred to ±VS
VOUT (V)
-1.5
+0.2
10
+5
+25
+12
+16
+45 +65
+85 +105 +125
TA (¡C)
Figure 5. Common Mode LImits vs. Temperature
V S = 30V
T A = +25 C
30
20
-V S
Normal Output
R L = 1K
V ++= 50V
40
+0.4
65-111-07
VCM (V)
-1.0
-15
+8
Figure 4. Input Bias Current
vs. Differential Input Voltage
+VS
-35
+4
VDIFF (V)
Figure 3. Equivalent Input Offset Voltage
vs. Input Resistance
-55
0
0
-1
Emitter
Follower Output
R L = 600
Ÿ W
-0.5
65-111-08
VOS (mV)
10
4
+85 +105 +125
0
+0.5
+1
VDIFF (mV)
Figure 6. Output Voltage vs. Differential Input Voltage
PRODUCT SPECIFICATION
LM111/LH2111
Typical Performance Characteristics (continued)
6
6
20 mV
5 mV
2
+5V
2 mV
VIN
0
V OUT
LM111
65-111-09
50
0
0.2
LM111
2 mV
1
100
0
0.4
0.6
0
TA = +25¡C
-50
-100
0
0.8
0.2
Figure 7. Input Overdrive vs. Response Times
0.6
0.8
Figure 8. Input Overdrive vs. Response Times
20
+V S
15
VOUT (V)
10
0
V IN
20 mV
5 mV
2 mV
5
0
-5
V OUT
2K
1
LM111
-V S
0
-50
VS = 15V
T A = +25 C
-100
4
3
2
VIN (mV)
65-111-11
0
0
V OUT
2K
-10
VS = 15V
TA = +25 C
50
V IN
0
-5
-V S
0
100
+V S
5
LM111
-10
20 mV
5 mV
2 mV
10
0
65-111-12
20
15
VOUT (V)
0.4
Time (µs) Ÿ
Ÿ
Time (µs) Ÿ
VIN (mV)
V OUT
5 mV
2
500 WŸ
500 WŸ
VIN
20 mV
3
65-111-10
3
VOUT (V)
4
4
VIN (mV)
VOUT (V)
TA = ±25 C
1
VIN (mV)
+5V
5
5
1
0
4
3
2
Time (µs)
Time (µs)
Figure 9. Input Overdrive vs. Response Times
Figure 10. Input Overdrive vs. Response Times
0.8
0.7
140
0.7
T A = +125 C
PD
120
0.6
0.4
0.3
80
0.4
60
0.3
0.2
40
0.2
0.1
65-111-13
T A = +25 C
0
0
10
20
30
40
50
IOUT (mA)
Figure 11. OpenSaturation Voltage vs. Output Current
0.5
T A = +25 C
PD (W)
100
T A = -55 C
0.5
ISC (mA)
VSAT (V)
0.6
ISC
0.1
20
0
0
0
5
10
IOUT (V)
15
65-111-14
Figure 12. Short Circuit Current,
Power Dissipation vs. Output Voltage
5
LM111/LH2111
PRODUCT SPECIFICATION
Typical Performance Characteristics (continued)
10
VS = 15V
6
TA = +25 C
ISY (mA)
+VS
(Output Low)
4
±VS
(Output High)
4
±VS
(Output High)
2
1
0
2
65-111-15
ISY (mA)
3
+VS
(Output Low)
6
0
±5
±10
0
-55
±15
-35
-15
65-111-16
5
8
+5
±VS (V)
+25
+85
+105 +125
Figure 14. Supply Current vs. Temperature
100
V S = 15V
ILEAK (nA)
+65
TA (¡C)
Figure 13. Supply Current vs. Supply Voltage
10
VOUT = 50V
1
VIN= 15V
65-111-17
.1
.01
25
45
65
85
105
TA (¡C)
Figure 15. Leakage Current vs. Temperature
6
+45
125
PRODUCT SPECIFICATION
LM111/LH2111
Notes:
7
LM111/LH2111
Notes:
8
PRODUCT SPECIFICATION
PRODUCT SPECIFICATION
LM111/LH2111
Mechanical Dimensions
8-Lead Ceramic DIP
Inches
Symbol
Min.
A
b1
b2
c1
D
E
e
eA
L
Q
s1
a
Millimeters
Max.
Min.
—
.200
.014
.023
.045
.065
.008
.015
—
.405
.220
.310
.100 BSC
.300 BSC
.125
.200
.015
.060
.005
—
90¡
105¡
Notes:
Notes
Max.
—
5.08
.36
.58
1.14
1.65
.20
.38
—
10.29
5.59
7.87
2.54 BSC
7.62 BSC
3.18
5.08
.38
1.52
.13
—
90¡
105¡
1. Index area: a notch or a pin one identification mark shall be located
adjacent to pin one. The manufacturer's identification shall not be
used as pin one identification mark.
8
2, 8
2. The minimum limit for dimension "b2" may be .023 (.58mm) for leads
number 1, 4, 5 and 8 only.
8
4
4
5, 9
7
3. Dimension "Q" shall be measured from the seating plane to the base
plane.
3
6
4. This dimension allows for off-center lid, meniscus and glass overrun.
5. The basic pin spacing is .100 (2.54mm) between centerlines. Each
pin centerline shall be located within ±.010 (.25mm) of its exact
longitudinal position relative to pins 1 and 8.
6. Applies to all four corners (leads number 1, 4, 5, and 8).
7. "eA" shall be measured at the center of the lead bends or at the
centerline of the leads when "a" is 90¡.
8. All leads – Increase maximum limit by .003 (.08mm) measured at the
center of the flat, when lead finish applied.
9. Six spaces.
D
4
1
Note 1
E
5
8
s1
eA
e
A
Q
a
c1
L
b2
b1
9
LM111/LH2111
PRODUCT SPECIFICATION
Mechanical Dimensions (continued)
16-Lead Ceramic DIP
Inches
Symbol
Min.
A
b1
b2
c1
D
E
e
eA
L
Q
s1
a
Notes:
Millimeters
Max.
Min.
—
.200
.014
.023
.050
.065
.008
.015
.745
.840
.220
.310
.100 BSC
.300 BSC
.115
.160
.015
.060
.005
—
90¡
105¡
Notes
Max.
—
5.08
.36
.58
1.27
1.65
.20
.38
18.92
21.33
5.59
7.87
2.54 BSC
7.62 BSC
2.92
4.06
.38
1.52
.13
—
90¡
105¡
1. Index area: a notch or a pin one identification mark shall be located
adjacent to pin one. The manufacturer's identification shall not be
used as pin one identification mark.
8
2
2. The minimum limit for dimension "b2" may be .023 (.58mm) for leads
number 1, 8, 9 and 16 only.
8
4
3. Dimension "Q" shall be measured from the seating plane to the base
plane.
4
5, 9
7
4. This dimension allows for off-center lid, meniscus and glass overrun.
3
6
5. The basic pin spacing is .100 (2.54mm) between centerlines. Each
pin centerline shall be located within ±.010 (.25mm) of its exact
longitudinal position relative to pins 1 and 16.
6. Applies to all four corners (leads number 1, 8, 9, and 16).
7. "eA" shall be measured at the center of the lead bends or at the
centerline of the leads when "a" is 90¡.
8. All leads – Increase maximum limit by .003 (.08mm) measured at the
center of the flat, when lead finish applied.
9. Fourteen spaces.
D
8
1
9
16
NOTE 1
E
s1
eA
e
A
Q
L
b1
10
a
c1
PRODUCT SPECIFICATION
LM111/LH2111
Mechanical Dimensions (continued)
8-Lead Metal Can (TO-99)
øD
Symbol
Min.
øD1
F
L1
Q
A
øb
øb1
øD
øD1
øD2
e
e1
A
L2
L
Inches
øb
BASE and
SEATING
PLANE
øb1
REFERENCE
PLANE
F
k
k1
L
L1
L2
Q
a
Max.
.165
.185
.016
.019
.016
.021
.335
.375
.305
.335
.110
.160
.200 BSC
.100 BSC
—
.040
.027
.034
.027
.045
.500
.750
—
.050
.250
—
.010
.045
45¡ BSC
Millimeters
Min.
Notes
Max.
4.19
4.70
.41
.48
.41
.53
8.51
9.52
7.75
8.51
2.79
4.06
5.08 BSC
2.54 BSC
—
1.02
.69
.86
.69
1.14
12.70
19.05
—
1.27
6.35
—
.25
1.14
45¡ BSC
1, 5
1, 5
2
1
1
1
e
Notes:
e1
øD2
1. (All leads) øb applies between L1 & L2. øb1 applies between
L2 & .500 (12.70mm) from the reference plane. Diameter is
uncontrolled in L1 & beyond .500 (12.70mm) from the
reference plane.
2. Measured from the maximum diameter of the product.
3. Leads having a maximum diameter .019 (.48mm) measured in
gauging plane, .054 (1.37mm) +.001 (.03mm) –.000 (.00mm)
below the reference plane of the product shall be within
.007 (.18mm) of their true position relative to a maximum width
tab.
4. The product may be measured by direct methods or by gauge.
a
5. All leads – increase maximum limit by .003 (.08mm) when lead
finish is applied.
k
k1
11
PRODUCT SPECIFICATION
LM111/LH2111
Ordering Information
Part Number
Package
Operating Temperature Range
LM111T/883B
8-Lead Metal Can (TO-99)
-55°C to +125°C
LM111D/883B
8-Lead Ceramic DIP
-55°C to +125°C
LH2111D
16-Lead Ceramic DIP
-55°C to +125°C
LH2111D/883B
16-Lead Ceramic DIP
-55°C to +125°C
Note:
1. /883 B suflix denotes MIL-STD-883, Level B processing
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
5/20/98 0.0m 001
Stock#DS3000111
Ó 1998 Fairchild Semiconductor Corporation
www.fairchildsemi.com
LM124/LM324
Single-Supply Quad Operational Amplifier
Features
Description
•
•
•
•
•
•
Each of the devices in this series consists of four independent high-gain operational amplifiers that are designed for
single-supply operation. Operation from split power supplies
is also possible and the low power supply drain is independent of the magnitude of the power supply voltage.
Large DC voltage gain—100 dB
Compatible with all forms of logic
Temperature compensated
Unity Gain Bandwidth—1 MHz
Large output voltage swing—0V to (+VS -1.5V)
Input common mode voltage range includes ground
Used with a dual supply, the circuit will operate over a wide
range of supply voltages. However, a large amount of crossover distortion may occur with loads to ground. An external
current-sinking resistor to -VS will reduce crossover distortion. There is no crossover distortion problem in
single-supply operation if the load is direct-coupled to
ground.
Rev 1.0.0
LM124/LM324
PRODUCT SPECIFICATION
Pin Assignments
Output (A) 1
-Input (A) 2
14 Output (D)
A
+
D
+
+Input (A) 3
12 +Input (D)
+VS (A) 4
11 Ground
+Input (B) 5
-Input (B) 6
13 -Input (D)
10 +Input (C)
+
B
-
Output (B) 7
C
+
-
9
-Input (C)
8
Output (C)
Absolute Maximum Ratings
Parameter
Conditions
Min.
Supply Voltage
Differential Input Voltage
Input Voltage
-0.3
Output Short Circuit to Ground1
One Amplifier
+VS £ 15V and TA = +25°C
Input Current2
VIN < -0.3V
Max.
Units
+32 or ±16
V
32
V
+32
V
Continuous
50
mA
Operating Temperature Range
LM124
-55
+125
°C
LM324
0
+70
°C
Notes:
1. Short circuits from the output to +VS can cause excessive heating and eventual destruction. The maximum output current is
approximately 40 mA independent of the magnitude of +VS. At values of supply voltage in excess d +VS, continuous short
circuits can exceed the power dissipation ratings and cause eventual destruction. Destructive dissipation can result from
simultaneous shorts on all amplifiers.
2. This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base
junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this
diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output
voltages of the op amps to go to the +VS voltage level (or to ground for a large overdrive) for the time duration that an input
is driven negative. This is not destructive and normal output states will re-establish when the input voltage again returns to a
value greater than 0.3V.
Thermal Characteristics
Parameter
2
SOIC
Plastic DIP
Ceramic DIP
Maximum Junction Temperature
+125°C
+125°C
+175°C
Max. PD TA < 50°C
300 mW
468 mW
1042 mW
Thermal Resistance, qJC
—
—
60°C/W
Thermal Resistance, qJA
200°C/W
160°C/W
120°C/W
For TA > 50°C Derate at
5.0 mW/°C
6.25 mW/°C
8.38 mW/°C
PRODUCT SPECIFICATION
LM124/LM324
Electrical Characteristics
+VS = +5.0V (see Note 1) and TA= +25°C, unless otherwise noted.
LM124
Parameters
Test Conditions
Min.
1
Input Offset Voltage
2
Input Bias Current
Input Offset Current
LM324
Typ.
Max.
±2.0
±5.0
45
±3.0
Min.
Typ.
Max.
Units
±2.0
±7.0
mV
150
45
250
nA
±30
±5.0
±50
nA
+VS-1.5
V
Input Voltage Range3
+VS = +30V
Supply Current
(Over Temperature)
RL = ¥, +VS = 30V
1.5
3.0
1.5
3.0
mA
RL = ¥ on all op amps
0.7
1.2
0.7
1.2
mA
0
Large Signal Voltage
Gain
+VS = 15V
(for large VOUT swing)
RL ³ 2 KW
50
Output
VOH
Voltage Swing V
OH
+VS = +30V, RL = 2KW
26
RL ³ 10 KW
27
VOL
+VS = +5.0V, RL =
10KW
+VS-1.5
100
0
25
100
V/mV
26
28
5.0
27
20
V
28
5.0
V
20
mV
Common Mode
Rejection Ratio
70
85
65
70
dB
Power Supply
Rejection Ratio
65
100
65
100
dB
-120
dB
Channel Separation4
F = 1 KHz to 20 KHz
(lnput referred)
Output
Current
Source
VIN+ = 1V, VIN- = 0V,
+VS = 15V
20
40
20
40
mA
Sink
VIN– = 1V, VIN+ = 0V,
+VS = 15V
10
20
10
20
mA
VIN+ = 1V, VIN– = 0V,
+VOUT = 200 mV
12
50
12
50
mA
-120
Notes:
1. VOUT = 1.4V, RS = 0W with +VS from 5V to 30V; and over the full common mode range (0V to +VS-1.5V).
2. The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent
of the state of the output so no loading change exists on the input lines.
3. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The
upper end of the common mode voltage range is +VS-1.5V, but either or both inputs can go to +32V without damage.
4. Due to proximity of external components, ensure that coupling is not originating via stray capacitance between these externall
parts. This typically can be detected as this type of capacitance increases at higher frequencies.
3
LM124/LM324
PRODUCT SPECIFICATION
Electrical Characteristics
+VS = +5.0V, LM124 = -55° £ TA £ 125°C, LM324 = 0°C £ TA £ 70°C unless other wise noted.
Test
Conditions
Parameters
1
Short Circuit Current
LM124
Min.
Typ .
Max .
TA = +25°C
40
60
RS = 0W
7.0
2
Input Offset Voltage Drift
Input Offset Current Drift
40
Range4
Unit
40
60
mA
±9.0
±150
10
300
pA/°C
500
0
15
V/mV
VOH
+VS = +30V,
RL = 2 KW
26
26
V
VOH
RL ³ 10 KW
27
VOL
+VS = +5.0V,
RL = 10 KW
Source
VIN+ = +1.0V,
VIN– = 0V,
+VS = +15V
10
20
10
20
mA
Sink
VIN– = +1.0V,
VlN+ = 0V,
+VS = +15V
5.0
8.0
5.0
8.0
mA
5.0
27
20
+VS
+VS-2.0
nA
25
28
0
nA
+VS = +30V
Differential Input Voltage4
+VS-2.0
40
mV
mV/°C
+Vs - +15V
(For Large
VOUT Swing)
RL ³ 2.0 KW
Large Signal
Voltage Gain
Output Current
Max .
7.0
10
Current3
Output Voltage
Swing
Typ.
±100
Input Offset Current
Input Voltage
Min.
±7.0
Input Offset Voltage
Input Bias
LM324
28
5.0
V
V
20
+VS
mV
V
Notes:
1. Short circuits from the output to +VS can cause excessive heating and eventual destruction. The maximum output current is
approximately 40 mA independent of the magnitude of +VS. At values of supply voltage in excess of +VS, continuous short
circuits can exceed the power dissipation ratings and cause eventual destruction. Destructive dissipation can result from
simultaneous shorts on an amplifiers.
2. VOUT =1.4V, RS = 0W with +VS from 5V to 30V and over the full common mode range (0V to +VS -1.5V).
3. The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent
of the state of the output so no loading change exists on the input lines.
4. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The
upper end of the common mode voltage range is +VS -1.5V, but either or both inputs can go to +32V without damage.
4
PRODUCT SPECIFICATION
LM124/LM324
Typical Performance Characteristics
500
20
VO
+15V
400
Input
350
Output
250
1
2
3
4
5
6
7
VOUT
V IN
+7V
10
0
1K
8
Time ( m S)
10K
100K
Figure 2. Output Voltage Swing vs. Frequency
8
10
+VS = +5V
+VS = +15V
+VS = +30V
7
+VS
+I SOURCE
0.01
0.1
I OUT
0.1
Independent of +VS
TA = +25 C
2
1
0.001
+VS
+VS /2
VOUT
1
10
65-0407
4
1
VOUT
VOUT (V)
+VS /2
65-0406
VOUT (V)
6
3
1M
F (Hz)
Figure 1. Follower Small Signal Pulse Response
5
2K
5
65-0404
O
300
0
100
15
50 pF
VOUT P-P (V)
VOUT (mV)
V IN
65-0405
450
100K
T A = +25 C
+VS = +30V
T A = +25 C
0.01
100
0
0.01
+ISOURCE (mA)
0.1
1
10
100
ISINK (mA)
Figure 3. Output Voltage vs. Output Source Current
Figure 4. Output Voltage vs. Output Sink Current
90
80
+IOUT (mA)
70
+I OUT
60
50
40
30
65-0408
20
10
0
-55 -35 -15
+5 +25 +45 +65 +85 +105 +125
TA (°C)
Figure 5. Current Limiting Output Current vs. Temperature
5
LM124/LM324
PRODUCT SPECIFICATION
Typical Performance Characteristics (continued)
90
15
VCM = 0V
80
70
-VS
+VS = +30V
IB (nA)
60
+VIN (V)
10
+VS
50
+VS = +15V
40
30
65-0397
20
0
0
5
10
+VS = +5V
65-0398
5
10
0
-55 -35 -15
15
±VS (V)
+5 +25 +45 +65
+85 +105 +125
TA (°C)
Figure 6. Input Voltage vs. Supply Voltage
Figure 7. Input Bias Current vs. Temperature
160
4
+VS
I SY
120
2
T A = 0 C to +125 C
T A = -55 C
0
0
10
80
40
65-0399
1
R L = 20 k W
RL= 2 kW
20
65-0400
Ammeter
AVOL (dB)
+ISY (mA)
3
0
0
30
5
10
15
20
+VS (V)
Figure 8. Supply Current vs. Supply Voltage
40
Figure 9. Open Loop Voltage Gain vs. Supply Voltage
VOUT (V)
+VS
V IN
80
V OUT
+VS /2
40
1
10
100
1K
65-0401
+VA = +10V to +15V and
-55 C T A
+125 C
20
10K 100K
2
RL 2 k W
VS = +15V
1
0
+VS = +30V and
-55 C
T A +125 C
1M
10M
F (Hz)
Figure 10. Open Loop Voltage Gain vs. Frequency
VIN (V)
60
3
3
2
65-0402
0.1 m F
100
AVOL (dB)
35
10M
120
6
30
4
140
0
25
+V S (V)
1
0 0
5
10
15
20
25
30
35
40
Time (µS)
Figure 11. Follower Large Pulse Response Signal vs. Time
PRODUCT SPECIFICATION
LM124/LM324
Notes:
7
LM124/LM324
Notes:
8
PRODUCT SPECIFICATION
PRODUCT SPECIFICATION
LM124/LM324
Mechanical Dimensions
14-Lead Plastic DIP
Inches
Symbol
Millimeters
Min.
Max.
Min.
Max.
A
A1
A2
—
.015
.115
.210
—
.195
—
.38
2.93
5.33
—
4.95
B
B1
C
D
D1
E
E1
e
eB
.014
.022
.045
.070
.008
.015
.725
.795
.005
—
.300
.325
.240
.280
.100 BSC
—
.430
.115
.200
14
L
N
.36
.56
1.14
1.78
.20
.38
18.42
20.19
.13
—
7.62
8.26
6.10
7.11
2.54 BSC
—
10.92
2.92
5.08
14
Notes:
Notes
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
2. "D" and "E1" do not include mold flashing. Mold flash or protrusions
shall not exceed .010 inch (0.25mm).
3. Terminal numbers are shown for reference only.
4. "C" dimension does not include solder finish thickness.
5. Symbol "N" is the maximum number of terminals.
4
2
2
5
D
7
1
8
14
E1
D1
E
e
A
A1
C
L
B1
B
eB
9
LM124/LM324
PRODUCT SPECIFICATION
Mechanical Dimensions (continued)
14-Lead Ceramic DIP
Inches
Symbol
Min.
A
b1
b2
c1
D
E
e
eA
L
Q
s1
a
Millimeters
Max.
—
.200
.014
.023
.045
.065
.008
.015
—
.785
.220
.310
.100 BSC
.300 BSC
.125
.200
.015
.060
.005
—
90¡
105¡
Min.
Notes:
Notes
Max.
—
5.08
.36
.58
1.14
1.65
.20
.38
—
19.94
5.59
7.87
2.54 BSC
7.62 BSC
3.18
5.08
.38
1.52
.13
—
90¡
105¡
1. Index area: a notch or a pin one identification mark shall be located
adjacent to pin one. The manufacturer's identification shall not be
used as pin one identification mark.
8
2
2. The minimum limit for dimension "b2" may be .023 (.58mm) for leads
number 1, 7, 8 and 14 only.
8
4
3. Dimension "Q" shall be measured from the seating plane to the base
plane.
4
5, 9
7
4. This dimension allows for off-center lid, meniscus and glass overrun.
3
6
5. The basic pin spacing is .100 (2.54mm) between centerlines. Each
pin centerline shall be located within ±.010 (.25mm) of its exact
longitudinal position relative to pins 1 and 14.
6. Applies to all four corners (leads number 1, 7, 8, and 14).
7. "eA" shall be measured at the center of the lead bends or at the
centerline of the leads when "a" is 90¡.
8. All leads – Increase maximum limit by .003 (.08mm) measured at the
center of the flat, when lead finish applied.
9. Twelve spaces.
D
7
1
8
14
NOTE 1
E
s1
eA
e
A
Q
L
b2
10
b1
a
c1
PRODUCT SPECIFICATION
LM124/LM324
Mechanical Dimensions (continued)
14-Lead SOIC
Inches
Symbol
Min.
A
A1
B
C
D
E
e
H
h
L
N
a
ccc
Millimeters
Max.
Min.
Max.
.053
.069
.004
.010
.013
.020
.008
.010
.336
.345
.150
.158
.050 BSC
.228
.244
1.35
1.75
0.10
0.25
0.33
0.51
0.19
0.25
8.54
8.76
3.81
4.01
1.27 BSC
5.79
6.20
.010
.016
0.25
0.40
.020
.050
14
0.50
1.27
14
0¡
8¡
0¡
8¡
—
.004
—
0.10
14
Notes:
Notes
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
2. "D" and "E" do not include mold flash. Mold flash or protrusions
shall not exceed .010 inch (0.25mm).
3. "L" is the length of terminal for soldering to a substrate.
4. Terminal numbers are shown for reference only.
5
2
2
5. "C" dimension does not include solder finish thickness.
6. Symbol "N" is the maximum number of terminals.
3
6
8
E
1
H
7
h x 45¡
D
C
A1
A
e
B
SEATING
PLANE
–C–
LEAD COPLANARITY
a
L
ccc C
11
PRODUCT SPECIFICATION
LM124/LM324
Ordering Information
Part Number
Package
Operating Temperature Range
LM324M
14-Lead Plastic SOIC
0°C to +70°C
LM324N
14-Lead Plastic DIP
0°C to +70°C
LM124D
14-Lead Ceramic DIP
-55°C to +125°C
LM124D/883B
14-Lead Ceramic DIP
-55°C to +125°C
Note:
1. 883B suffix denotes Mil-Std-883, Level B processing.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
5/20/98 0.0m 001
Stock#DS3000124
Ó 1998 Fairchild Semiconductor Corporation
www.fairchildsemi.com
LM139/LM139A, LM339
Single Supply Quad Comparators
Features
Description
• Input common mode voltage range includes ground
• Wide single supply voltage range—2V to 36V
• Output compatible with TTL, DTL, ECL, MOS and
CMOS logic systems
• Very low supply current drain (0.8 mA) independent of
supply voltage
These devices offer higher frequency operation and faster
switching than can be had from internally compensated
quad op amps. Intended for single supply applications, the
Darlington PNP input stage allows them to compare voltages
that include ground. The two stage common-emitter output
circuit provides gain and output sink capacity of 3.2 mA at
an output level of 400 mV. The output collector is left open,
permitting the designer to drive devices in the range of 2V to
36V.
They are intended for applications not needing response time
less than 1 ms, but demanding excellent op amp input parameters to offset voltage, current and bias current, to ensure
accurate comparison with a reference voltage.
Rev. 1.0.0
LM139/LM139A, LM339
PRODUCT SPECIFICATION
Pin Assignments
Output B
1
14
Output C
Output A
2
13
Output D
+VS
3
12
Ground
–Input A
4
11
+Input D
+Input A
5
10
–Input D
–Input B
6
9
+Input C
+Input B
7
8
–Input C
A
D
B
C
65-139-0-1
Absolute Maximum Ratings
Parameter
Supply Voltage
Min.
Max.
Unit.
-8
+36 or +8
V
36
V
-0.3
+36
V
Differential Input Voltage
Input Voltage Range2
Output Short Circuit to Ground1
Input Current (VIN <
Continuous
-0.3V)(2)
50
mA
Operating Temperature Range
LM139
-55
+125
°C
LM339
0
+70
°C
-65
150
°C
SOIC, 10 seconds
+260
°C
DIP, 60 seconds
+300
°C
Storage Temperature Range
Lead Soldering Temperature
Notes:
1. Short circuits from the output to +VS can cause excessive heating and eventual destruction. The maximum output current is
approximately 20 mA independent of the magnitude of +Vs.
2. This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector base
junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this
diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output
voltage of the comparators to go to the +VS voltage level (or to ground for a large overdrive) for the time duration that an input
is driven negative. This is not destructive and nominal output states will re-establish when the input voltage, which was negative, again returns to a value greater than -0.3V.
2
PRODUCT SPECIFICATION
LM139/LM139A, LM339
Thermal Characteristics
Parameter
SOIC
Plastic DIP
Ceramic DIP
Maximum Junction Temperature
+125°C
+125°C
+175°C
Maximum PD TA <50°C
300 mW
468 mW
1042mW
Thermal Resistance, qJC
—
—
60°C/W
Thermal Resistance, qJA
200°C/W
160°C/W
120°C/W
For TA > 50°C Derate at
5.0 mW/°C
6.25 mW/°C
8.33 mW/°C
Electrical Characteristics
VS = +5V, see Note 1.
LM139A
Parameters
Test Conditions
Min.
+25°C2
Typ.
Max.
Unit
Input Offset Voltage
TA =
±1.0
±2.0
mV
Input Bias Current
Output In Linear Range
TA = +25°C3, VCM = 0V
25
100
nA
Input Offset Current
TA = +25°C, VCM = 0V
±3.0
±25
nA
+VS–1.5
V
+25°C4,
Input Voltage Range
TA =
Supply Current
RL = ¥ on all comparators, TA = +25°C
Large Signal Voltage Gain
RL = ¥, +VS = 30V, RL ³ 15 KW,
+VS = +5V (to support large VOUT swing)
TA = +25°C
Large Signal Response
Time
VS = 30V
0.8
50
2.5
mA
200
V/mV
VIN = TTL Logic Swing, VREF = 1.4V,
VRL = 5V, RL = 5.1 KW,TA = +25°C
300
ns
Response Time
VRL = 5V, RL = 5.1 KW, TA = +25°C5
1.3
ms
Output Sink Current
VIN– ³ 1V, VIN+ = 0, VOUT £ 1.5V, TA = +25°C
16
mA
Saturation Voltage
VIN– ³ 1V, VIN+ = 0, ISINK £ 4 mA, TA = 25°C
250
Output Leakage Current
VIN+ ³ 1V, VIN- = 0, VOUT = 5V, TA = +25°C
0.1
6.0
Input Offset Voltage2
400
mV
±4.0
mV
mA
Input Offset Current
VCM = 0V
±100
nA
Input Bias Current
VCM = 0V
300
nA
Input Voltage Range
+VS = 30V
+VS–2.0
V
Saturation Voltage
VIN- ³ 1V, VIN+ = 0, ISINK £ 4 mA
700
mV
Output Leakage Current
VIN+ ³ 1V, VIN- = 0, VOUT = 30V
1.0
mA
36
V
Differential Input
Voltage7
VIN+ ³ 0V, (or -VS, if
0
used)6
Notes:
1. These specifications apply for +VS = 5V and -55°C £ TA £ +125°C, unless otherwise stated. The LM339 temperature specifications are limped to 0°C £ TA £ +70°C.
2. At output switch points VOUT = 1.4V, RS = 0W with +VS from 5V to 30V; and over the full input common mode range (VOUT
to +VS–1.5V).
3. The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent
of the state of the output so no loading change exists on the reference or input lines.
4. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The
upper end of the common mode voltage range is +VS–1.5V, but either or both inputs can go to +30V without damage.
5. The response time specified is for a 100 mV input step with 5 mV overdrive. For larger overdrive signals 300 ns can be obtained. See Typical Performance Characteristics section.
6. Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common mode range, the comparator will provide a proper output state. The low input voltage stage must not be less than -0.3V
(or 0.3V below the magnitude of the negative power supply, if used).
7. Guaranteed by design.
3
LM139/LM139A, LM339
PRODUCT SPECIFICATION
Electrical Characteristics
VS = +5V, see Note 1.
LM139
Parameters
Test Conditions
Typ
Max
Input Offset Voltage
2
TA = +25°C
±2.0
Input Bias Current
Output in Linear Range
TA = +25°C3, VCM = 0V
Input Offset Current
TA = +25°C, VCM = 0V
4
Input Voltage Range
TA = +25°C , +VS = 30V
Supply Cunent
RL = ¥ on all comparators,
TA = +25°C
Large Signal Voltage Gain RL= ¥ +VS = 30V,
RL ³ 15 KW, +VS = +5V
(to support large VOUT
swing), TA = +25°C
Mln
LM339
Typ
Max
Units
±5.0
±2.0
±5.0
mV
25
100
25
250
nA
±3.0
±25
±5.0
±50
nA
+VS
–1.5
V
2.5
mA
0
+VS
–1.5
0.8
25
Mln
0
2.5
0.8
200
200
V/mV
Large Signal Response
Time
VIN = TTL Logic Swing,
VREF = 1.4V, VRL = 5V,
RL = 5.1 KW, TA = +25°C
300
300
ns
Response Time
VRL = 5V, RL = 5.1 KW
TA = +25°C5
1.3
1.3
mS
Output Sink Current
VIN- ³ 1V, VIN+ = 0,
VOUT £ 1.5V, TA = +25°C
16
mA
Output Voltage, VOL
VIN ³ 1V, VIN+ = 0,
ISINK £ 4 mA, TA = +25°C
250
Output Leakage Current
VIN+ ³ 1V, VIN- = 0,
VOUT = 5V, TA = +25°C
0.1
6.0
16
6.0
400
250
400
mV
mA
0.1
Input Offset Voltage2
±9.0
±9.0
mV
Input Offset Current
±100
±150
nA
300
400
nA
+VS
–2.0
V
Input Bias Current
VCM = 0V
Input Voltage Range
VCM = 30V
Output Voltage VOL
VIN– ³ 1V, VIN+ = 0
ISINK £ 4 mA
700
700
mV
Output Leakage Cunent
VIN+ ³ 1V, VIN– = 0
VOUT = 30V
1.0
1.0
mA
Differential Input Voltage7
VIN+ ³ 0V (or -VS, if used)6
36
36
V
0
+VS
–2.0
0
Notes:
1. These specifications apply for +VS = 5V and -55°C £ TA £ +125°C, unless otherwise stated. The LM339 temperature specifications are limped to 0°C £ TA £ +70°C.
2. At output switch points VOUT = 1.4V, RS = 0W with +VS from 5V to 30V; and over the full input common mode range (VOUT
to +VS–1.5V).
3. The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent
of the state of the output so no loading change exists on the reference or input lines.
4. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The
upper end of the common mode voltage range is +VS–1.5V, but either or both inputs can go to +30V without damage.
5. The response time specified is for a 100 mV input step with 5 mV overdrive. For larger overdrive signals 300 ns can be obtained. See Typical Performance Characteristics section.
6. Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common mode range, the comparator will provide a proper output state. The low input voltage stage must not be less than -0.3V
(or 0.3V below the magnitude of the negative power supply, if used).
7. Guaranteed by design.
4
PRODUCT SPECIFICATION
LM139/LM139A, LM339
Typical Performance Characteristics
80
1.0
TA = -55°C
VIN(CM) = 0V
RIN(CM) = 1000 MW
TA = 0°C
TA = +25°C
60
TA = -55°C
IIN (mA)
0.6
TA = +70°C
TA = 0°C
TA = +25°C
40
0.4
TA = +125°C
20
TA = +125°C
TA = +70°C
65-0684
0.2
0
0
0
±5
±10
±15
±20
0
±5
±10
±VS (V)
±15
±20
±VS (V)
Figure 1. Supply Current vs. Supply Voltage
Figure 2. Input Current vs. Supply Voltage
10
Out of
Saturation
1.0
{
0.1
TA = +125°C
TA = -55°C
0.01
TA = +25°C
0.001
0.01
0.1
1.0
65-0685
VSAT
ISY
0.8
10
100
ISINK
Figure 3. Output Saturation Voltage vs. Sink Current
5
LM139/LM139A, LM339
PRODUCT SPECIFICATION
Typical Performance Characteristics (continued)
+5V
6.0
VOUT (V)
5.0
Input Overdrive = 5.0 mV
4.0
3.0
VIN
20 mV
2.0
1.0
VIN (mV)
0
5.1K
4
139/339
100 mV
2
5
0
-50
VOUT
TA = 25°C
-100
65-0686
0
0.5
1.0
1.5
2.0
Time (µs)
Figure 4. Input Overdriver Repsonse Time
+5V
6.0
Input Overdrive = 100 mV
VOUT (V)
5.0
4.0
20 mV
3.0
VIN
2.0
5 mV
1.0
139/339
5
VIN (mV)
0
100
50
5.1K
4
2
VOUT
TA = 25°C
0
65-0687
0
0.5
1.0
1.5
2.0
Time (µs)
Figure 5. Input Overdrive Response Time
6
PRODUCT SPECIFICATION
LM139/LM139A, LM339
Applications
Single Supply (+VS = +15V).
+5V
+5V
+5V
3K
+VREF
4
139/339
5
10K
3
2
139/339
139/339
4
10K
3
5
10K
VIN
VOUT
5
2
4
12
12
65-0671
10M
65-0672
Figure 6. Driving TTL
Figure 7. Driving CMOS
65-0673
Figure 8. Comparator with Hysteresis
12V
+VS
2RS
+VREF High
3K
5
139/339
4
10K
5
2
2
139/339
4
Lamp
12 ESB
RS
VOUT
VIN
7
2RS
7
6
139/339
6
1
139/339
2N2222
+VREF Low
1
65-0674
65-0675
Figure 9. ORing the Output
Figure 10. Limit Comparator
+VS
1M
100K
VIN
1M
4
10M
3
139/339
+4V
100K
1µs
15K
560K
5
6
2
3
1
100 pF
139/339
12
7
0
VOUT
+VS
12
40 µs
t0
t1
o
10M
240K
62K
65-0676
Figure 11. One-Shot Multivibrator with Input Lock Out
7
LM139/LM139A, LM339
PRODUCT SPECIFICATION
Applications (continued)
Single Supply (+VS = +15V).
+VS
+VS
100K
VIN
100K
5.1K
5.1K
5.1K
4
5
1N914
139/339
2
139/339
VIN
VOUT
15K
5
+
2
VOUT
4
20M
100K
0.5 µF
1K
10K
65-0677
Figure 12. Zero Crossing Detector (Single Power Supply)
Figure 13. Low Frequency Op Amp
+VS
15K
R1
1M
R2
100K
+5V
D1
1N914
D2
1N914
+VS
80 pF
4
5
+VS
5
139/339
2
t0 t1
139/339
t2
2
VOUT
1M
VOUT
1M
o
4
VREF
(+1.4V)
60 µs
6 µs
10K
1M
-12V
-12V
65-0679
Figure 14. TTL to MOS Logic Converter
8
65-680
Figure 15. Pulse Generator
o
PRODUCT SPECIFICATION
LM139/LM139A, LM339
Mechcanical Dimensions
14-Lead Plastic DIP
Inches
Symbol
Millimeters
Min.
Max.
Min.
Max.
A
A1
A2
—
.015
.115
.210
—
.195
—
.38
2.93
5.33
—
4.95
B
B1
C
D
D1
E
E1
e
eB
.014
.022
.045
.070
.008
.015
.725
.795
.005
—
.300
.325
.240
.280
.100 BSC
—
.430
.115
.200
14
L
N
.36
.56
1.14
1.78
.20
.38
18.42
20.19
.13
—
7.62
8.26
6.10
7.11
2.54 BSC
—
10.92
2.92
5.08
14
Notes:
Notes
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
2. "D" and "E1" do not include mold flashing. Mold flash or protrusions
shall not exceed .010 inch (0.25mm).
3. Terminal numbers are shown for reference only.
4. "C" dimension does not include solder finish thickness.
5. Symbol "N" is the maximum number of terminals.
4
2
2
5
D
7
1
8
14
E1
D1
E
e
A
A1
C
L
B1
B
eB
9
LM139/LM139A, LM339
PRODUCT SPECIFICATION
Mechanical Dimensions (continued)
14-Lead Plastic SOIC
Inches
Symbol
Min.
A
A1
B
C
D
E
e
H
h
L
N
a
ccc
Millimeters
Max.
Min.
Max.
.053
.069
.004
.010
.013
.020
.008
.010
.336
.345
.150
.158
.050 BSC
.228
.244
1.35
1.75
0.10
0.25
0.33
0.51
0.19
0.25
8.54
8.76
3.81
4.01
1.27 BSC
5.79
6.20
.010
.016
0.25
0.40
.020
.050
14
0.50
1.27
14
0¡
8¡
0¡
8¡
—
.004
—
0.10
14
Notes:
Notes
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
2. "D" and "E" do not include mold flash. Mold flash or protrusions
shall not exceed .010 inch (0.25mm).
3. "L" is the length of terminal for soldering to a substrate.
4. Terminal numbers are shown for reference only.
5
2
2
5. "C" dimension does not include solder finish thickness.
6. Symbol "N" is the maximum number of terminals.
3
6
8
E
1
H
7
h x 45¡
D
C
A1
A
e
B
SEATING
PLANE
–C–
LEAD COPLANARITY
ccc C
10
a
L
PRODUCT SPECIFICATION
LM139/LM139A, LM339
Mechanical Dimensions (continued)
14-Lead Ceramic DIP
Inches
Symbol
Min.
A
b1
b2
c1
D
E
e
eA
L
Q
s1
a
Millimeters
Max.
—
.200
.014
.023
.045
.065
.008
.015
—
.785
.220
.310
.100 BSC
.300 BSC
.125
.200
.015
.060
.005
—
90¡
105¡
Min.
Notes:
Notes
Max.
—
5.08
.36
.58
1.14
1.65
.20
.38
—
19.94
5.59
7.87
2.54 BSC
7.62 BSC
3.18
5.08
.38
1.52
.13
—
90¡
105¡
1. Index area: a notch or a pin one identification mark shall be located
adjacent to pin one. The manufacturer's identification shall not be
used as pin one identification mark.
8
2
2. The minimum limit for dimension "b2" may be .023 (.58mm) for leads
number 1, 7, 8 and 14 only.
8
4
3. Dimension "Q" shall be measured from the seating plane to the base
plane.
4
5, 9
7
4. This dimension allows for off-center lid, meniscus and glass overrun.
3
6
5. The basic pin spacing is .100 (2.54mm) between centerlines. Each
pin centerline shall be located within ±.010 (.25mm) of its exact
longitudinal position relative to pins 1 and 14.
6. Applies to all four corners (leads number 1, 7, 8, and 14).
7. "eA" shall be measured at the center of the lead bends or at the
centerline of the leads when "a" is 90¡.
8. All leads – Increase maximum limit by .003 (.08mm) measured at the
center of the flat, when lead finish applied.
9. Twelve spaces.
D
7
1
8
14
NOTE 1
E
s1
eA
e
A
Q
L
b2
a
c1
b1
11
PRODUCT SPECIFICATION
LM139/LM139A, LM339
Ordering Information
Part Number
Package
Operating Temperature Range
LM339M
14-Lead Plastic SOIC
0°C to +70°C
LM339N
14-Lead Plastic DIP
0°C to +70°C
LM139D
14-Lead Ceramic DIP
-55°C to +125°C
LM139D/883B
14-Lead Ceramic DIP
-55°C to +125°C
LM139AD
14-Lead Ceramic DIP
-55°C to +125°C
LM139AD/883B
14-Lead Ceramic DIP
-55°C to +125°C
Notes:
1. /883B suffix denotes MIL-STD-883, Level B processing
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
5/20/98 0.0m 001
Stock#DS3000139
Ó 1998 Fairchild Semiconductor Corporation
LM1458/A/I/AI (KA1458)
DUAL OPERATIONAL AMPLIFIER
DUAL OPERATIONAL AMPLIFIERS
8 DIP
The LM1458 series are dual general purpose operational amplifiers,
having short circuits protected and require no external components for
frequency compensation.
High common mode voltage range and absence of “latch up" make
the LM1458 ideal for use as voltage followers.
The high gain and wide range of operating voltage provides superior
performance in integrator, summing amplifier and general feedback
applications.
8 SOP
FEATURES
•
•
•
•
•
Internal frequency compensation
Short circuit protection
Large common mode and differential voltage range
No latch up
Low power consumption
BLOCK DIAGRAM
Device
Package
LM1458N
LM1458AN
8 DIP
LM1458S
LM1458AS
9 SIP
LM1458M
LM1458AM
8 SOP
LM1458IN
LM1458AIN
8 DIP
LM1458IS
LM1458AIS
9 SIP
LM1458IM
LM1458AIM
8 SOP
9 SIP
ORDERING INFORMATION
Operating Temperature
0 ~ + 70°C
-25 ~ + 85°C
Rev. B
1999 Fairchild Semiconductor Corporation
LM1458/A/I/AI (KA1458)
DUAL OPERATIONAL AMPLIFIER
SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Characteristic
Symbol
Value
Unit
Power Supply Voltage
Input Differential Voltage
Input Voltage
Operating Temperature Range LM1458I/AI
LM1458/A
Storage Temperature Range
VCC
VI(DIFF)
VI
TOPR
±18
30
±15
- 25 ~ + 85
0 ~ + 70
- 65 ~ + 150
V
V
V
°C
°C
°C
TSTG
LM1458/A/I/AI (KA1458)
DUAL OPERATIONAL AMPLIFIER
ELECTRICAL CHARACTERISTICS
(VCC = + 15V, VEE = - 15V, TA = 25 °C unless otherwise specified)
Characteristic
Input Offset Voltage
VIO
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
IIO
IBIAS
GV
Input Voltage Range
VI(R)
Input Resistance
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Supply Current (Both Amplifier)
Output Voltage Swing
LM1458A/AI
Test Conditions
Symbol
Unit
RS≤10KΩ
2.0
6.0
2.0
10
mV
20
80
200
300
700
VO(P-P) = ± 10V, RL≥2.0KΩ
20 200
80 500
200
nA
nA
V/mV
20
± 12 ± 13
0.3 1.0
RI
CMRR
PSRR
ICC
VO(P.P)
LM1458/I
Min Typ Max Min Typ Max
70
77
20
± 11 ± 13
0.3 1.0
90
90
2.3
60
77
90
90
2.3
V
8.0
RS≤10KΩ
± 12 ± 14 5.6 ± 11 ±14
RS≤10KΩ
± 10 ± 13
± 9 ± 13
20
20
70 170
70 240
Output Short Circuit Current
Power Consumption
ISC
PC
VO = 0V
Transient Response (Unity Gain)
Rise Time
Overshoot
Slew Rate
tRES
OS
SR
VI = 20mV,RL≥2KΩ,CL≤100pF
VI = 20mV,RL≥2KΩ,CL≤100pF
VI = 10V,RL≥2KΩ,CL≤100pF
V
mA
mW
µs
%
V/µs
0.3
15
0.5
0.3
15
0.5
MΩ
dB
dB
mA
ELECTRICAL CHARACTERISTICS
(VCC= +15V, VEE = -15V, NOTE 1, unless otherwise specified)
Characteristic
Symbol
Input Offset Voltage
VIO
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
IIO
IBIAS
GV
Test Conditions
LM1458A/AI
Min
Typ
RS≤10KΩ
Max
LM1458/I
Min
Typ
Max
Unit
7.5
12
mV
300
800
400
1000
nA
nA
V/mV
VO(P-P)= ± 10V, RL≤2.0KΩ
15
Common Mode Rejection Ratio
CMRR
RS≥10KΩ
70
90
70
90
dB
Power Supply Rejection Ratio
PSRR
RS≥10KΩ
77
90
77
90
dB
RL = 10KΩ
± 12
± 14
± 11
± 14
± 10
± 13
±9
± 13
V
RL = 2KΩ
Output Voltage Swing
Input Voltage Range
NOTE 1
LM1458/A: 0 °C ≤T A≤70 °C
LM1458I/AI: -25 °C ≤T A≤+85 °C
VO(P.P)
VI(R)
± 12
15
± 12
V
LM1458/A/I/AI (KA1458)
DUAL OPERATIONAL AMPLIFIER
TYPICAL PERFORMANCE CHARACTERISTICS
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
www.fairchildsemi.com
LM148
Low Power Quad 741 Operational Amplifier
Features
Description
•
•
•
•
•
•
•
•
•
•
The LM148 is a true quad 741. It consists of four
independent high-gain, internally compensated, low-power
operational amplifiers which have been designed to provide
functional characteristics identical to those of the familiar
741 operational amplifier. In addition, the total supply
current for all four amplifiers is comparable to the supply
current of a single 741 type op amp. Other features include
input offset currents and input bias currents which are much
less than those of a standard 741. Also, excellent isolation
between amplifiers has been achieved by independently
biasing each amplifier and using layout techniques which
minimize thermal coupling.
741 op amp operating characteristics
Low supply current drain—0.6 mA/amplifier
Class AB output stage—no crossover distortion
Pin compatible with the LM124
Low input offset voltage—1.0 mV
Low input offset current—4.0 nA
Low input bias current—30 nA
Unity gain bandwidth—1.0 MHz
Channel Separation—120 dB
Input and output overload protection
The LM148 can be used anywhere multiple 741 type
amplifiers are being used and in applications where amplifier
matching or high packing density is required.
Block Diagram
–Input (A)
+Input (A)
A
+
D
+
Output (A)
Output (C)
+
B
+
–Input (B)
+Input (D)
Output (D)
Output (B)
+Input (B)
–Input (D)
C
+Input (C)
–Input (C)
65-148-01
Rev. 1.0.0
LM148
PRODUCT SPECIFICATION
Pin Assignments
Output (A)
–Input (A))
+Input (A)
+VS
+Input (B)
–Input (B)
Output (B)
1
14
2
13
3
12
4
11
5
10
6
9
7
8
Output (D)
–Input (D)
+Input (D)
Ground
+Input (C)
–Input (C)
Output (C)
65-148-02
Absolute Maximum Ratings
Parameter
Min.
Max.
Unit
Supply Voltage
-22
+22
V
44
V
+22
V
Differential Input Voltage
1
Input Voltage
-22
Output Short Circuit Duration2
Indefinite
Storage Temperature Range
-65
+150
°C
Operating Temperature Range
-55
+125
°C
Lead Soldering Temperature (60 sec.)
+300°C
Notes:
1. For supply voltages less than ±15V, the absolute maximum input voltage is equal to the supply voltage.
2. Short circuit to ground on one amplifier only.
Thermal Characteristics
Parameter
Maximum Junction Temperature
Maximum PD TA < 50°C
2
14-Lead Ceramic DIP
+175°C
1042 mW
Thermal Resistance, qJC
60°C/W
Thermal Resistance, qJA
120°C/W
For TA > 50°C derate at
8.33 mW/°C
PRODUCT SPECIFICATION
LM148
Electrical Characteristics
(VS = ±15V and TA = 25°C, unless otherwise noted)
Parameter
Test Conditions
Input Offset Voltage
RS £ 10KW
Min.
Input Offset Current
Input Bias Current
Input Resistance (Differential Mode)1
0.8
Supply Current, All Amplifiers
VS = ±15V
Large Signal Voltage Gain
VS = ±15V, VOUT = ±10V,
RL ³ 2KW
Channel Separation
F = 1 Hz 20 KHz
Typ.
Max.
Unit
1.0
5.0
mV
4.0
25
nA
30
100
2.5
2.4
50
Unity Gain Bandwidth
nA
MW
3.6
160
mA
V/mV
120
dB
1.0
MHz
Phase Margin
60
Degrees
Slew Rate
0.5
V/mS
Short Circuit Current
25
mA
The following specifications apply for VS = ±15V, -55°C £ TA £ +125°C.
Input Offset Voltage
RS £ 10KW
6.0
mV
Input Offset Current
75
nA
Input Bias Current
325
nA
Large Signal Voltage Gain
VS = ±15V, VOUT = 10V,
RL < 2KW
25
Output Voltage Swing
VS = ±15V
RL = 10KW
±12
±13
RL = 2KW
±10
±12
V/mV
V
Input Voltage Range
VS = ±15V
±12
Common Mode Rejection Ratio
RS £ 10KW
70
90
dB
Power Supply Rejection Ratio
RS £ 10KW
77
96
dB
V
Note:
1. Guaranteed by design but not tested.
3
LM148
PRODUCT SPECIFICATION
Typical Performance Characteristics
90
6
80
4
+25 C
3
+125 C
IB (nA)
-55 C
70
VS = ±20V
60
VS = ±15V
50
VS = ±10V
VS = ±5V
40
30
2
±5
±10
±15
±20
±25
65-148-04
1
0
0
20
65-148-03
10
0
-55 -35 -15
±30
+5 +25 +45 +65 +85 +105 +125
±VS (V)
TA (¡C)
Figure 1. Supply Current vs. Supply Voltage
Figure 2. Input Bias Current vs. Temperature
50
15
TA = +25 C
VS =
30
20
65-148-05
10
0
15V
10
VOUT (V)
VOUT P-P (V)
40
0
±5
±10
±15
±20
5
-55 C
+25 C
+125 C
0
±25
0
5
10
15
20
+I SOURCE (mA)
±VS
Figure 3. Output Voltage Swing vs. Supply Voltage
-15
65-148-06
I SY (mA)
5
25
30
Figure 4. Positive Current Limit
Output Voltage vs. Output Source Current
1K
VS = ±15V
VS = 15V
T A = +25 C
100
+25 C
-55 C
-5
0
0
5
10
15
20
25
ISINK (mA)
Figure 5. Negative Current Limit
Output Voltage vs. Output Sink Current
4
30
A V = 10
10
1
0.1
100
A V = 1.0
1K
10K
65-148-08
+125 C
ROUT (W )
A V = 100
65-148-07
VOUT (V)
-10
100K
1M
F (Hz)
Figure 6. Output Impedance vs. Frequency
PRODUCT SPECIFICATION
LM148
Typical Performance Characteristics (continued)
110
120
VS = 15V
T A = +25 C
100
70
LM148
65-148-09
40
20
0
10
100
1K
10K
100K
1M
50
30
10
0
-10
10
10M
LM148
100
1K
10K
F (Hz)
1
F (MHz)
10K
F (Deg)
F
AV
100W
VOUT
65-148-11
AV (dB)
100
90
80
70
60
50
40
30
20
10
0
-10
VS = 15V
T A = +25 C
2K
10
65-148-12
0
10
VOUT (V)
VOUT (mV)
Figure 10. Gain, Phase Test Circuit
VS = 15V
T A = +25 C
AV = 1
100
0
100
0
-100
10
65-148-13
2
3
4
Time ( mS)
Figure 11. Small Signal Pulse Response
Input, Output Voltage vs. Time
5
VIN (V)
-10
VIN (mV)
-100
1
10M
Figure 8. Open Loop Gain vs. Frequency
Figure 9. Gain, Phase vs. Frequency
0
1M
F (Hz)
Figure 7. CMRR vs. Frequency
120
15
10
5
0
-5
-10
-15
-20
-25
-30
-35
0.1
100K
VS = 15V
T A = +25 C
AV = 1
R L 2K
0
-10
0
40
80
120
160
65-148-14
60
65-148-10
AV (dB)
80
CMRR (dB)
VS = 15V
T A = +25 C
90
200
Time ( mS)
Figure 12. Large Signal Pulse Response
Output Voltage vs. Time
5
LM148
PRODUCT SPECIFICATION
Typical Performance Characteristics (continued)
32
20
GBW (MHz)
24
16
12
8
3
2
65-148-15
1
4
0
100
1K
10K
0
-55 -35 -15
100K
65-148-16
VOUT (V)
4
VS = 15V
T A = +25 C
AV = 1
R L = 2K
< 1% Dist.
28
+5 +25 +45 +65 +85 +105 +125
TA (¡C)
F (Hz)
Figure 13. Undistorted Output Voltage
Swing vs. Frequency
Figure 14. Gain Bandwidth Product vs. Temperature
-20
+125 C
3
-VCM (V)
2
-15
+25 C
-55 C
-10
65-148-18
-5
100
+5 +25 +45 +65 +85 +105 +125
-10
TA (¡C)
-15
Figure 15. Slew Rate vs. Temperature
Figure 16. Negative Common Mode
Input Voltage vs. Supply Voltage
160
VS = 15V
T A = +25 C
AV = 1
R L = 2K
0
140
120
en (nV Hz)
VOUT (V)
10
10
0
-10
65-148-19
VIN (V)
-10
0
20 40
60 80 100 120 140 160 180 200
Time ( mS)
Figure 17. Inverting Large Signal Pulse Response
Input, Output Voltage vs. Time
6
-20
-VS (V)
1.6
VS = 15V
T A = +25 C
1.4
1.2
100
1.0
80
60
40
0.8
en
0.6
IN
0.4
20
0
100
0.2
100
IN (pA Hz)
0
-55 -35 -15
65-148-17
1
1K
F (Hz)
0
10K
Figure 18. Input Noise Voltage, Current
Densities vs. Frequency
65-148-20
SR (V/ mS)
4
PRODUCT SPECIFICATION
LM148
Typical Performance Characteristics (continued)
20
TA
+125 C
15
10
65-148-21
+VCM (V)
55 C
5
5
10
15
20
+VS (V)
Figure 19. Positive Common Mode, Input Voltage vs. Supply Voltage
Typical Simulation
+Vs
+Vs
1.803V
RC1
5.3K
C1
5.46 pF
VA
RC2
5.3K
C2*
VH 30 pF
RO1 D3
32W
VOUT
(+)
D1
(-)
RE2
2.712K
RE1
2.712K
VE
Gen
5.9W
R2
100K
VA
GA
150.8m W
VB
GB
247.5m W
RO2
42.87K
RC
21.3
mW
VE
Cc
2.41 pF
RE
9.87M
20.226 µA
bO1 = 112
bO2 = 14
I S = 8 x 10
D4
D2
2.803V
C C VO
46.96W -Vs
65-148-22
-16
-Vs
Figure 20. LM148 Macromodel for Computer Simulation
7
LM148
PRODUCT SPECIFICATION
Applications Discussion
The LM148 is short circuit protected to ground and supplies
continuously when only one of the four amplifiers is shorted.
If multiple shorts occur simultaneously, the unit can be
destroyed due to excessive power dissipation.
The LM148 low power quad operational amplifier exhibits
performance comparable to the popular 741. Substitution
can therefore be made with no change in circuit behavior.
To assure stability and to minimize pickup, feedback resistors should be placed close to the input to maximize the feedback pole frequency (a function of input to ground
capacitance). A good rule of thumb is that the feedback pole
frequency should be 6 times the operating -3.0B frequency.
If less, a lead capacitor should be placed between the output
and input.
The input characteristics of these devices allow differential
voltages which exceed the supplies. Output phase will be
correct as long as one of the inputs is within the operating
common mode range. If both exceed the negative limit, the
output will latch positive. Current limiting resistors should
be used on the inputs in case voltages become excessive.
When capacitive loading becomes much greater than 100pF,
a resistor should be placed between the output and feedback
connection in order to reduce phase shift.
R3
R5
R4
D1
C2
D2
R2
R7
R6
Q1
C3
C1
C1
2
3
LM148
A
1
A1
R1
6
LM148
B
5
R1
7
A2
1
x
K
2 p R1C1
1
1
1
R4R5
+
+
K=
R5
R DS R4
R3
F=
9
10
LM148
C
VOUT
8
A3
65-148-23
R ON
V GS 1/2
1VP
FMAX = 5.0 KHz, THD
0.03%
R1 = 100K pot., C1 = 0.0047 m F, C2 = 0.01 m F, C3 = 0.1 m F, R2 = R6 = R7 = 1M, R3 = 5.1K, R4 = 12W .
R5 = 240 W, Q1 = NS5102, D1 = 1N914, D2 = 3.6V avalanche diode (ex. LM103), V s = 15V
R DS ~
A simpler version with some distortion degradation at high frequencies can be made by using A1
as a simple inverting amplifier, and by putting back to back zeners in feedback loop of A3.
Figure 21. One Decade Low Distortion Sinewave Generator
8
PRODUCT SPECIFICATION
LM148
Applications Discussion (continued)
3
-V IN
2
LM148
A
1
R
R
R1
R/2
9
R/2
LM148
10
B
R
6
5
+VIN
8
V OUT
R2
LM148
C
2R
R1
VS = ±15V
V OUT = 2
7
+ 1 , -VS - 3V
VIN CM
+VS -3V
R = R2, trim R2 to boost CMRR
65-148-24
Figure 22. Low Cost Instrumentation Amplifier
2
VIN
500K
D1
1N941
LM148
A
3
1
D3
6
D2
1N914
5
7
LM148
B
VPEAK
CP
2N2906
Adjust R for minimum drift
D3 low leakage diode
D1 added to improve speed
VS = 15V
R2
2M 10
I BIAS
9
R
1M
2
3
(+VS )
LM148
C
8
I BIAS
65-148-25
Figure 23. Low Voltage Peak Detector with Bias Current Compensation
9
LM148
PRODUCT SPECIFICATION
Applications Discussion (continued)
R5
100K
R6
C1
0.001 m F
10K
C2
0.001 m F
2
VIN
R3
R1
1
LM148
A
3
6
5
R0
LM148
B
R2
7
9
10
VHP
LM148
C
R4
VIN(s)
=
N(s)
FNOTCH =
HOLP =
Q
-Sw0 HOBP
NHP(S) = S2 HOHP, NBP(S) =
FO =
Sw0
D(s) = S2 +
D(s)
1
R6
2p
R5
1
RH
2p
RL t1 t2
RF
13
LM148
D
12
V(s)
VLP
RL
RH
Tune Q through R0
for predictable results: FO Q
4 x104
Use bandpass output to tune for Q
8
14
VBR
+ w 02
NLP = w02 HOLP
Q
1
,
t1 = R1C1, Q =
t1t2
1/2
, HOHP =
1 + R4 | R3 + R4 | R0
R6
t1
1 + R6 | R5
R5
t2
1 + R6 | R5
1 + R3 | R0 + R3 | R4
, HOBP =
1/2
1 + R4 | R3 + R4 | R0
1 + R3 | R0 + R3 | R4
1 + R5 | R6
65-148-26
1 + R3 | R0 + R3 | R4
Figure 24. Universal State-Space Filter
100K
10K
0.001 mF
0.001 mF
2
VIN
150K
3
LM148
A
6
1
50.3K
LM148
B
5
7
50.3K
9
LM148
C
10
4.556K
8
V OUT1
100K
100K
100K
2
3
0.001 mF
10K
LM148
A
1
50.3K
6
5
0.001 mF
LM148
B
7
50.3K
9
10
39.4K
LM148
C
8
V OUT2
100K
65-148-27
Use general equations, and tune each section separately.
Q 1st Section = 0.541, Q 2nd Section = 1.306.
The response should have 0 dB peaking.
Figure 25. 1 KHz 4-Pole Butterworth Filter
10
PRODUCT SPECIFICATION
LM148
Applications Discussion (continued)
R7
R8
R1
C2
2
C1
R2
1
LM148
A
3
R6
6
5
R5
VOUT(S)
LM148
B
R3
7
9
R4
10
LM148
C
8
VIN(S)
Q=
R8
R7
R1C1
, Fo =
R3C2R2C1
Necessary condition for notch :
1
R8
R7
1
2p
R2R3C1C2
, FNOTCH =
1
R6
2p R3R5R7C1C2
R1
1
=
R4R7
R6
Examples: FNOTCH = 3 kHz, Q = 5, R1 = 270K, R2 = R3 = 20K, R4 = 27K, R5 = 20K, R6 = R8 = 10K, R7 = 100K.
C1 = C2 = 0.001 µF.
Better noise performance than the state-space approach.
65-148-28
Figure 26. 3 Amplifier Bi-Quad Notch Filter
R5
100K
Gain vs Frequency
R6
C1
C2
2
3
LM148
A
6
1
R1
5
LM148
B
R2
BP
R0
9
7
RH
AV (dB)
R3
VIN
10
LM148
C
8
R4
0
-10
-20
-30
-40
-50
-60
-70
100
1K
10K
100K
F (Hz)
RL
R'5
R'H
R'6
2
3
LM148
A
BP'
R'1
6
C'1
5
LM148
B
1
7
R'2
C'2
9
10
R'0
R'F
100K
LM148
C
8
13
R'L
12
R'4
LM148
D
14
VOUT
FC = 1 kHz, F S = 2 kHz, F P = 0.543. FZ = 2.14, Q = 0.841, F'P = 0.987, F'Z = 4.92.
Q' = 4.403 normalized to ripple BW.
FP =
RP =
1
2p
R6
R5
1
1
, FZ =
t
2p
RH
RL
1
t
,Q=
1 + R4/R3 + R4/R0
x
1 + R6/R5
R6
R5
, Q' =
1 + R'4/R'0
R'6
x
1 + R'6/R'5 + R'6/RP
R'5
RH R L
RH + R L
Use the B'P outputs to tune Q, Q', tune the 2 sections separately.
R1 = R2 = 92.6K, R3 = R4 = R5 = 100K, R6 = 10K, R0 = 107.8K, RL = 100K, RH = 155.1K,
R'1 = R'2 = 50.9K, R'4 = R'5 = 100K, R'6 = 10K, R'0 = 5.78K, R'L = 100K, R'H = 248.12K, R'F = 100K.
65-148-29
All capacitors are 0.001µF.
Figure 27. 4th Order 1 KHz Elliptic Filter (4 Poles, 4 Zeros)
11
LM148
Notes:
12
PRODUCT SPECIFICATION
PRODUCT SPECIFICATION
LM148
Notes:
13
LM148
Notes:
14
PRODUCT SPECIFICATION
PRODUCT SPECIFICATION
LM148
Mechanical Dimensions
14-Pin Ceramic DIP
Inches
Symbol
Min.
A
b1
b2
c1
D
E
e
eA
L
Q
s1
a
Millimeters
Max.
—
.200
.014
.023
.045
.065
.008
.015
—
.785
.220
.310
.100 BSC
.300 BSC
.125
.200
.015
.060
.005
—
90¡
105¡
Min.
Notes:
Notes
Max.
—
5.08
.36
.58
1.14
1.65
.20
.38
—
19.94
5.59
7.87
2.54 BSC
7.62 BSC
3.18
5.08
.38
1.52
.13
—
90¡
105¡
1. Index area: a notch or a pin one identification mark shall be located
adjacent to pin one. The manufacturer's identification shall not be
used as pin one identification mark.
8
2
2. The minimum limit for dimension "b2" may be .023 (.58mm) for leads
number 1, 7, 8 and 14 only.
8
4
3. Dimension "Q" shall be measured from the seating plane to the base
plane.
4
5, 9
7
4. This dimension allows for off-center lid, meniscus and glass overrun.
3
6
5. The basic pin spacing is .100 (2.54mm) between centerlines. Each
pin centerline shall be located within ±.010 (.25mm) of its exact
longitudinal position relative to pins 1 and 14.
6. Applies to all four corners (leads number 1, 7, 8, and 14).
7. "eA" shall be measured at the center of the lead bends or at the
centerline of the leads when "a" is 90¡.
8. All leads – Increase maximum limit by .003 (.08mm) measured at the
center of the flat, when lead finish applied.
9. Twelve spaces.
D
7
1
8
14
NOTE 1
E
s1
eA
e
A
Q
L
b2
a
c1
b1
15
LM148
PRODUCT SPECIFICATION
Ordering Information
Package
Operating Temperature
Range
LM148D
14-Lead Ceramic DIP
-55°C to +125°C
LM148D/883B
14-Lead Ceramic DIP
-55°C to +125°C
Part Number
Note:
1. 883B suffix denotes Mil-Std-883, Level B processing
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
5/20/98 0.0m 001
Stock#DS3000148
Ó 1998 Fairchild Semiconductor Corporation
www.fairchildsemi.com
LM1851
Ground Fault Interrupter
Features
•
•
•
•
No potentiometer required
Direct interface to SCR
Supply voltage derived from AC line—26V shunt
Adjustable sensitivity
•
•
•
•
Grounded neutral fault detection
Meets UL943 standards
450 mA quiescent current
Ideal for 120V or 220V systems
Description
The LM1851 is a controller for AC outlet ground fault
interrupters. These devices detect hazardous grounding conditions (example: a pool of water and electrical equipment
connected to opposite phases of the AC line) in consumer
and industrial environments. The output of the IC triggers an
external SCR, which in turn opens a relay circuit breaker to
prevent a harmful or lethal shock.
to line noise. A special feature is found in circuitry that
rapidly resets the integrating timing capacitor in the event
that noise pulses introduce unwanted charging currents.
Also, flip-flop is included that ensures firing of even a slow
circuit breaker relay on either half-cycle of the line voltage
when external full wave rectification is used.
The application circuit can be configured to detect both
normal faults (hot wire to ground) and grounded neutral
faults.
Full advantage of the U.S. UL943 timing specification is
taken to ensure maximum immunity to false triggering due
Block Diagram
Timing
Capacitor
+VS
Sensitivity
Set Resistor
Sense Amplifier
Output
ITH
ITH = ITH for IF > 0
3ITH for IF = 0
I2
D3
Q2
SCR Trigger
IF
Latch
Q3
Q1
D1
Q5
+VS
A1
Q4
D2
IF
10V
Ground
65-1851-01
Inverting Input
Non-Inverting Input
Rev. 1.0.0
LM1851
PRODUCT SPECIFICATION
Functional Description
present, then I1 discharges CT with a current equal to 3 ITH,
where ITH is the value of current set by the external RSET
resistor. If fault signals are present at the input of A1 (which
is held at virtual ground, +10V), one of the two current
mirrors in the feedback path of A1 (Q4 and Q5) will become
active, depending on which half-cycle the fault occurs.
This action will raise the voltage at VS, switching I1 to a
value equal to ITH, and reducing the discharge rate of CT to
better allow fault currents to charge it.
The voltage at the supply pin is clamped to +26V by the
internal shunt regulator D3. This shunt regulator also
generates an artificial ground voltage for the noninverting
input of A1 (shown as a +10V source). A1, Q1, and Q2 act a
a current mirror for fault current signals (which are derived
from an external transformer). When a fault signal is present,
the mirrored current charges the external timing capacitor
until its voltage exceeds the latch trigger threshold (typically
17.5V). When then this threshold is exceeded, the latch
engages and Q3 turns off, allowing I2 to drive the SCR
connected to pin 1.
Notice that ITH discharges CT during both half-cycles of the
line, while IF only charges CT during the half-cycle in which
IF exits pin 2 (since Q1 will only carry fault current in one
direction). Thus, during one half-cycle, IF-ITH charges CT,
while during the other half-cycle ITH discharges it.
Extra Circuitry in the feedback path of A1 works with the
switched current source I1 to remove any charge on CT
induced by noise in the transformer. If no fault current is
Pin Assignments
SCR Trigger
1
8
+VS
– Input
2
7
CT
+ Input
3
6
RSET
Ground
4
5
Amp Out
65-1851-02
Definition of Terms
Normal Fault
Grounded Neutral Fault
An unintentional electrical path, RB, between the load terminal of the hot line and the ground, as shown by the dashed
lines in Figure1.
An unintentional electrical path between the load terminal of
the neutral line and the ground, as shown by the dashed lines
in Figure 2.
Hot
GFI
Line
Hot
Hot
RLOAD
RB
Line
Hot
GFI
Neutral
Neutral
Neutral
RIN
RG
RG
65-1851-03
Figure 1. Normal Fault
2
RLOAD
Neutral
65-1851-05
Figure 2. Grounded Neutral Fault
PRODUCT SPECIFICATION
LM1851
Normal Fault Plus Grounded Neutral Fault
The combination of the normal fault and the grounded
neutral fault, as shown by the dashed lines in Figure 3.
Hot
Hot
GFI
Line
RLOAD
RB
Neutral
Neutral
RN
RG
65-1851-04
Figure 3. Normal Fault Plus Grounded Neutral Fault
Absolute Maximum Ratings
Parameter
Conditions
Min
Max
Units
Supply Current
19
mA
Power Dissipation
570
mW
70
°C
SOIC, 10 seconds
260
°C
DIP, 60 seconds
300
°C
Max
Units
125
°C
DIP
468
mW
SOIC
300
DIP
160
Operating Temperature
Lead Soldering Temperature
-40
Thermal Characteristics
Parameter
Conditions
Maximum Junction Temperature
Maximum PDTA < 50°C
Thermal Resistance, qJA
For TA > 50°C, derate at
Min
SOIC
240
DIP
6.25
SOIC
4.17
°C/W
mW/°C
3
LM1851
PRODUCT SPECIFICATION
DC Electrical Characteristics
(TA = +25°C, ISHUNT = 5 mA)
Parameters
Test Conditions
Min
Typ
Max
Units
Power Supply Shunt Regulator
Voltage
Pin 8, Average Value
22
26
30
V
Latch Trigger Voltage
Pin 7
15
17.5
20
V
Sensitivity Set Voltage
Pin 8 to Pin 6
6
7
8.2
V
Output Drive Current
Pin 1 With Fault
0.5
1
2.4
mA
Output Saturation Voltage
Pin 1 Without Fault
100
240
mV
Output Saturation Resistance
Pin 1 Without Fault
100
W
Output External Current Sinking
Capability1
Pin 1 Without Fault, VPIN1 Held
to 0.3V
2
5
mA
Noise Integration Sink Current
Ratio
Pin 7, Ratio of Discharge Currents
Between No Fault Fault and Fault
Conditions
2.0
2.8
3.6
mA/mA
Typ
Max
Units
5
7
mA
Notes:
1. This external applied current is in addition to the internal “output drive current” source.
AC Electrical Characteristics
(TA = +25°C, ISHUNT = 5 mA)
Parameters
2
Conditions
Min
3
Normal Fault Current Sensitivity
See Figure 9
Normal Fault Trip Time1
500W Fault, see Figure 10
18
mS
Normal Fault With Grounded
500W Normal Fault
18
mS
Neutral Fault Trip
Time1
2W Neutral, see Figure 10
Notes:
1. Average of 10 trials.
2. Required UL sensitivity tolerance is such that external trimming of LM1851 sensitivity is necessary.
4
PRODUCT SPECIFICATION
LM1851
100
UL943
Normal
Fault
10
65-1851-06
0
0.01
0.1
10
1
100
RSET =
IF (rms)* x (0.91)
Sense Transformer 1000:1
10
1
100K
1M
10M
RSET (W)
Trip Time (Seconds)
Figure 4. Average Trip Time vs. Fault Current
Figure 5. Normal Fault Current Threshold vs. RSET
1000
5 mA
8
100
1
1 mA
A
VPIN1
4
10
0
0
5
10
15
20
25
30
35
Output Voltage @ VPIN1(V)
Figure 6. Output Drive Current vs. Output Voltage
Pin 1 Saturation Voltage (V)
10
31V
65-1851-08
Output Drive Current @ Pin 1 (µA)
7V
1
31V
5 mA
8
0.1
IL
1
1 mA
A
4
0.01
0.1
1
10
65-1851-09
Fault Current (mA)
Circuit of
Figure 10
65-1851-07
1000
Fault Current on Line [mA(rms)]
Typical Performance Characteristics (TA = +25°C)
100
External Load Current (mA)
Figure 7. Pin 1 Saturation Voltage vs.
External Load Current, IL
5
LM1851
PRODUCT SPECIFICATION
Applications Discussion
A typical ground fault interrupter circuit is shown in
Figure 10. It is designed to operate on 120 VAC line voltage
with 5 mA normal fault sensitivity.
A full-wave rectifier bridge and a 15k/2W resistor are used
to supply the dc power required by the IC. A 1 mF capacitor
at pin 8 is used to filter the ripple of the supply voltage and is
also connected across the SCR to allow firing of the SCR on
either half-cycle. When a fault causes the SCR to trigger, the
circuit breaker is energized and line voltage is removed from
the load.
At this time no fault current flows and the CT discharge current increases from ITH to 3ITH (see Block Diagram). This
quickly resets both the timing capacitor and the output latch.
The circuit breaker can be reset and the line voltage again
supplied to the load, assuming the fault has been removed. A
1000:1 sense transformer is used to detect the normal fault.
The fault current, which is basically the difference current
between the got and neutral lines, is stepped down by 1000
and fed into the input pin of the operational amplifier
through a 10 mF capacitor. The 0.0033 mF capacitor between
pin 2 and pin 3 and the 200 pF between pins 3 and 4 are
added to obtain better noise immunity. The normal fault sensitivity is determined by the timing capacitor discharging
current, ITH. ITH can be calculated by:
7V
I TH = ------------- ¸ 2
R SET
The correct value for RSET can also be determined from the
characteristic curve that plots equation (3). Note that this is
an approximate calculation; the exact value of RSET depends
on the specific sense transformer used and LM1851 tolerances. Inasmuch as UL943 specifies a sensitivity “window”
of 4 mA to 6mA, provision should be made to adjust RSET
with a potentiometer.
Independent of setting sensitivity, the desired integration
time can be obtained through proper selection of the timing
capacitor, CT. Due to the large number of variables involved,
proper selection of CT is best done empirically. The following design example should only be used as a guideline.
Assume the goal is to meet UL943 timing requirements.
Also assume that worst case timing occurs during GFI startup (S1 closure) with both a heavy normal fault and a 2W
grounded neutral fault present. This situation is shown diagrammatically in Figure 8.
S1
Hot
Line
GFI
Neutral
(1)
(3)
For example, to obtain 5 mA(rms) sensitivity for the circuit
in Figure 7 we have:
7V
R SET = ------------------------------ = 1.5MW
5 mA ´ 0.91
-----------------------------1000
6
RN
0.4
RB
500
I
RB
500
(0.2)I
65-1851-12
Figure 8.
(2)
Where IF(rms) is the rms input fault current to the operational amplifier and the factor of 2 is due to the fact that IF
charges the timing capacitor only during one half-cycle,
while ITH discharges the capacitor continuously. The factor
0.91 converts the rms value to an average value. Combining
equations (1) and (2) we have:
7V
R SET = -----------------------------------I F ( rms ) ´ 0.91
Neutral
(0.8)I
At the decision point, the average fault current just equals the
threshold current, ITH.
I F ( rms )
I TH = ------------------- ´ 0.91
2
Hot
(4)
UL943 specifies £25 ms average trip time under these conditions. Calculation of CT based upon charging currents due to
normal fault only is as follows:
1.
Start with a £25 ms specification. Subtract 3 ms GFI
turn-on time (15k and 1 mF). Subtract 8 ms potential
loss of one half-cycle due to fault current sense of halfcycles only.
2.
Subtract 4 ms time required to open a sluggish circuit
breaker.
3.
This gives a total £10 ms maximum integration time that
could be allowed.
4.
To generate 8 ms value of integration time that accommodates component tolerances and other variables:
1´T
C T = -----------V
(5)
PRODUCT SPECIFICATION
LM1851
In practice, the actual value of CT will have to be modified to
include the effects of the neutral loop upon the net charging
current. The effect of neutral loop induced currents is difficult to quantize, but typically they sum with normal fault
currents, thus allowing a larger value of CT.
where:
T = integration time
V = threshold voltage
I = average fault current into CT
120 V AC ( rms )
I = æ -------------------------------------ö
è
ø
RB
RN ö
æ ---------------------è RG + RNø
heavy fault
current generated
(swamps ITH)
1 turn
´ æ -------------------------ö
è 1000 turnsø
current
division of
input sense
transformer
´
For UL943 requirements, 0.015 mF has been found to be the
best compromise between timing and noise.
portion of fault
current shunted
around GFI
æ 1---ö
è 2ø
CT
charging
on halfcycles
only
´
( 0.91 )
For those GFI standards not requiring grounded neutral
detection, a still larger value capacity can be used and better
noise immunity obtained.
(6)
The larger capacitor can be accommodated because RN and
RG are not present, allowing the full fault current, I, to enter
the GFI.
In Figure 10, grounded neutral detection is accomplished by
feeding the neutral coil with 120 Hz energy continuously and
allowing some of the energy to couple into the sense transformer during conditions of neutral fault.
rms to
average
conversion
Transformers may be obtained from Magnetic Metals, Inc.,
21st Street and Hayes Street, Camden, NJ 08101—
(609) 964-7842.
therefore:
0.4
1
1
æ 120
---------ö ´ æ ---------------------ö ´ æ ------------ö ´ æ ---ö ´ ( 0.91 )
è 500ø è 1.6 + 0.4ø è 1000ø è 2ø
C T = ------------------------------------------------------------------------------------------------------------------ ´ 0.008
17.5
C T = 0.01 mF
(7)
7
LM1851
PRODUCT SPECIFICATION
Application Circuits
LM1851
7
1
CT
0.002
5
ISHUNT
A
8
Timing
Cap
-In
SCR
Trigger
+In
2
100K
0.047 µF
3
6
Op Amp
Output
RSET
+VS
GND
800 Hz
4
1K
300 mV
1.5M
31V
65-1851-10
Figure 9. Normal Fault Sensitivity Test Circuit
Gnd/Neutral
Coil
Sense
Coil
200:1
1000:1
Hot
Load
MOV
Line
Neutral
High µ Coil
Circuit
Breaker
1.0 µF Tant
0.01/400V
LM1851
7
Timing
Cap
–In
SCR
Trigger
+In
5K/2W
0.0033
1
CT
0.015
SCR
0.01/400V
5
8
Op Amp
Output
RSET
+VS
GND
3
6
200 pF
4
0.01
10 µF
Tant
RSET*
*Adjust RSET for desired sensitivity.
Figure 10. 120 Hz Neutral Transformer Application
8
2
65-1851-11
PRODUCT SPECIFICATION
LM1851
Schematic Diagram
(3)
(6)
(5)
(2)
(8)
R13
50K
Q2
R9
100K
R12
390
R10
110
Q31
.3X
Q1
.5X
Q44
R3
10K
Q17
R2
40K
Q28
.7X
Q18
.5X
.5X
Q24
Q15 Q16
Q56
Q40
D1
Q26
R6
6K
Q23
Q22
Q54
Q27
Q25 2.44X
R5
320
R4
20K
Q13
Q12
2.44X
R8
2K
Q14
R7
1.2K
Q38
2X
Q36
Q39
R15
5.6K
Q50
Q48
R11
50K
Q49
Q55
4.54X
R16
17.33K
(4)
N+
Q11
(1)
Q41
Q21
.5X
Q20
.5X
Q6
Q10
Q42
Q29
2.44X
.3X
Q5
Q37
.2X
Q19
Q4
Q8
R17
100K
Q46
Q45
R1
13.1K
Q9
2.44X
Q53
Q52
.8X
Q3
Q7
Q54
3X
Q47
.5X
R14
5K
Q30
Q33
.5X
.5X
C2
8 pF
Q34
Q32
Q35
.5X
(7)
65-1851-13
9
LM1851
PRODUCT SPECIFICATION
Mechanical Dimensions
8-Lead Plastic DIP Package
Inches
Symbol
A
A1
A2
B
B1
C
D
D1
E
E1
e
eB
L
Millimeters
Min.
Max.
Min.
Max.
—
.015
.115
.014
.045
.008
.348
.005
.300
.240
.210
—
.195
.022
.070
.015
.430
—
.325
.280
—
.38
2.93
.36
1.14
.20
8.84
.13
7.62
6.10
5.33
—
4.95
.56
1.78
.38
10.92
—
8.26
7.11
.100 BSC
—
.430
.115
.160
2.54 BSC
—
10.92
2.92
4.06
8¡
8¡
N
Notes:
Notes
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
2. "D" and "E1" do not include mold flashing. Mold flash or protrusions
shall not exceed .010 inch (0.25mm).
3. Terminal numbers are for reference only.
4. "C" dimension does not include solder finish thickness.
5. Symbol "N" is the maximum number of terminals.
4
2
2
5
D
4
1
5
8
E1
D1
E
e
A2
A
A1
C
L
B1
10
B
eB
PRODUCT SPECIFICATION
LM1851
Mechanical Dimensions (continued)
8-Lead Plastic SOIC Package
Inches
Symbol
Min.
A
A1
B
C
D
E
e
H
h
L
N
a
ccc
Millimeters
Max.
Min.
Max.
.053
.069
.004
.010
.013
.020
.008
.010
.189
.197
.150
.158
.050 BSC
1.35
1.75
0.10
0.25
0.33
0.51
0.20
0.25
4.80
5.00
3.81
4.01
1.27 BSC
.228
.010
.016
5.79
0.25
0.40
.244
.020
.050
8
6.20
0.50
1.27
8
0¡
8¡
0¡
8¡
—
.004
—
0.10
8
Notes:
Notes
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
2. "D" and "E" do not include mold flash. Mold flash or
protrusions shall not exceed .010 inch (0.25mm).
3. "L" is the length of terminal for soldering to a substrate.
4. Terminal numbers are shown for reference only.
5
2
2
5. "C" dimension does not include solder finish thickness.
6. Symbol "N" is the maximum number of terminals.
3
6
5
E
1
H
4
h x 45¡
D
C
A1
A
SEATING
PLANE
e
B
–C–
LEAD COPLANARITY
a
L
ccc C
11
LM1851
PRODUCT SPECIFICATION
Ordering Information
Part Number
Package
Operating Temperature Range
LM1851AN
8-lead Plastic DIP
-40°C to +70°C
RV4145M
8-lead Plastic SOIC
-40°C to +70°C
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
5/20/98 0.0m 001
Stock#DS30001851
Ó 1998 Fairchild Semiconductor Corporation
LM1882 # 54ACT/74ACT715
LM1882-R # 54ACT/74ACT715-R
Programmable Video Sync Generator
General Description
The ’ACT715/LM1882 and ’ACT715-R/LM1882-R are
20-pin TTL-input compatible devices capable of generating
Horizontal, Vertical and Composite Sync and Blank signals
for televisions and monitors. All pulse widths are completely
definable by the user. The devices are capable of generating signals for both interlaced and noninterlaced modes of
operation. Equalization and serration pulses can be introduced into the Composite Sync signal when needed.
Four additional signals can also be made available when
Composite Sync or Blank are used. These signals can be
used to generate horizontal or vertical gating pulses, cursor
position or vertical Interrupt signal.
These devices make no assumptions concerning the system architecture. Line rate and field/frame rate are all a
function of the values programmed into the data registers,
the status register, and the input clock frequency.
The ’ACT715/LM1882 is mask programmed to default to a
Clock Disable state. Bit 10 of the Status Register, Register
0, defaults to a logic ‘‘0’’. This facilitates (re)programming
before operation.
The ’ACT715-R/LM1882-R is the same as the
’ACT715/LM1882 in all respects except that the
’ACT715-R/LM1882-R is mask programmed to default to a
Clock Enabled state. Bit 10 of the Status Register defaults
to a logic ‘‘1’’. Although completely (re)programmable, the
’ACT715-R/LM1882-R version is better suited for applications using the default 14.31818 MHz RS-170 register values. This feature allows power-up directly into operation,
following a single CLEAR pulse.
Features
Y
Y
Y
Y
Y
Y
Y
Y
Y
Maximum Input Clock Frequency l 130 MHz
Interlaced and non-interlaced formats available
Separate or composite horizontal and vertical Sync and
Blank signals available
Complete control of pulse width via register
programming
All inputs are TTL compatible
8 mA drive on all outputs
Default RS170/NTSC values mask programmed into
registers
4 KV minimum ESD immunity
’ACT715-R/LM1882-R is mask programmed to default
to a Clock Enable state for easier start-up into
14.31818 MHz RS170 timing
Connection Diagrams
Pin Assignment
for LCC
Pin Assignment for
DIP and SOIC
TL/F/10137 – 1
TL/F/10137 – 2
Order Number LM1882CN or LM1882CM
For Default RS-170, Order Number LM1882-RCN or
LM1882-RCM
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
FACTTM is a trademark of National Semiconductor Corporation.
C1995 National Semiconductor Corporation
TL/F/10137
RRD-B30M105/Printed in U. S. A.
LM1882 # 54ACT/74ACT715 # LM1882-R # 54ACT/74ACT715-R
Programmable Video Sync Generator
March 1995
Logic Block Diagram
TL/F/10137 – 3
Pin Description
There are a Total of 13 inputs and 5 outputs on the
’ACT715/LM1882.
Data Inputs D0 – D7: The Data Input pins connect to the
Address Register and the Data Input Register.
ADDR/DATA: The ADDR/DATA signal is latched into the
device on the falling edge of the LOAD signal. The signal
determines if an address (0) or data (1) is present on the
data bus.
L/HBYTE: The L/HBYTE signal is latched into the device
on the falling edge of the LOAD signal. The signal determines if data will be read into the 8 LSB’s (0) or the 4 MSB’s
(1) of the Data Registers. A 1 on this pin when an ADDR/
DATA is a 0 enables Auto-Load Mode.
LOAD: The LOAD control pin loads data into the Address or
Data Registers on the rising edge. ADDR/DATA and
L/HBYTE data is loaded into the device on the falling edge
of the LOAD. The LOAD pin has been implemented as a
Schmitt trigger input for better noise immunity.
CLOCK: System CLOCK input from which all timing is derived. The clock pin has been implemented as a Schmitt
trigger for better noise immunity. The CLOCK and the LOAD
signal are asynchronous and independent. Output state
changes occur on the falling edge of CLOCK.
CLR: The CLEAR pin is an asynchronous input that initializes the device when it is HIGH. Initialization consists of setting all registers to their mask programmed values, and initializing all counters, comparators and registers. The
CLEAR pin has been implemented as a Schmitt trigger for
better noise immunity. A CLEAR pulse should be asserted
by the user immediately after power-up to ensure proper
initialization of the registersÐeven if the user plans to
(re)program the device.
ODD/EVEN: Output that identifies if display is in odd (HIGH)
or even (LOW) field of interlace when device is in interlaced
mode of operation. In noninterlaced mode of operation this
output is always HIGH. Data can be serially scanned out on
this pin during Scan Mode.
VCSYNC: Outputs Vertical or Composite Sync signal based
on value of the Status Register. Equalization and Serration
pulses will (if enabled) be output on the VCSYNC signal in
composite mode only.
VCBLANK: Outputs Vertical or Composite Blanking signal
based on value of the Status Register.
HBLHDR: Outputs Horizontal Blanking signal, Horizontal
Gating signal or Cursor Position based on value of the
Status Register.
HSYNVDR: Outputs Horizontal Sync signal, Vertical Gating
signal or Vertical Interrupt signal based on value of Status
Register.
Register Description
All of the data registers are 12 bits wide. Width’s of all pulses are defined by specifying the start count and end count
of all pulses. Horizontal pulses are specified with-respect-to
the number of clock pulses per line and vertical pulses are
specified with-respect-to the number of lines per frame.
REG0ÐSTATUS REGISTER
The Status Register controls the mode of operation, the
signals that are output and the polarity of these outputs. The
default value for the Status Register is 0 (000 Hex) for the
’ACT715/LM1882 and is ‘‘512’’ (200 Hex) for the ’ACT715R/LM1882-R.
Note: A CLEAR pulse will disable the CLOCK on the ’ACT715/LM1882 and
will enable the CLOCK on the ’ACT715-R/LM1882-R.
2
Register Description (Continued)
HORIZONTAL INTERVAL REGISTERS
The Horizontal Interval Registers determine the number of
clock cycles per line and the characteristics of the Horizontal Sync and Blank pulses.
REG1Ð Horizontal Front Porch
REG2Ð Horizontal Sync Pulse End Time
REG3Ð Horizontal Blanking Width
Ý of Clocks per Line
REG4Ð Horizontal Interval Width
Bits 0–2
B2 B1 B0 VCBLANK VCSYNC HBLHDR HSYNVDR
0 0 0 CBLANK
(DEFAULT)
0 0 1 VBLANK
0 1 0 CBLANK
0 1 1 VBLANK
1
1
1
1
0
0
1
1
0
1
0
1
CBLANK
VBLANK
CBLANK
VBLANK
CSYNC
HGATE
VGATE
CSYNC
VSYNC
VSYNC
HBLANK
HGATE
HBLANK
VGATE
HSYNC
HSYNC
CSYNC
CSYNC
VSYNC
VSYNC
CURSOR
HBLANK
CURSOR
HBLANK
VINT
VINT
HSYNC
HSYNC
VERTICAL INTERVAL REGISTERS
The Vertical Interval Registers determine the number of
lines per frame, and the characteristics of the Vertical Blank
and Sync Pulses.
REG5Ð Vertical Front Porch
REG6Ð Vertical Sync Pulse End Time
REG7Ð Vertical Blanking Width
Ý of Lines per Frame
REG8Ð Vertical Interval Width
Bits 3–4
B4
B3
0
0
(DEFAULT)
0
1
1
0
1
1
Mode of Operation
Interlaced Double Serration and
Equalization
Non Interlaced Double Serration
Illegal State
Non Interlaced Single Serration
and Equalization
EQUALIZATION AND SERRATION PULSE
SPECIFICATION REGISTERS
These registers determine the width of equalization and serration pulses and the vertical interval over which they occur.
REG 9Ð Equalization Pulse Width End Time
REG10Ð Serration Pulse Width End Time
REG11Ð Equalization/Serration Pulse Vertical
Interval Start Time
REG12Ð Equalization/Serration Pulse Vertical
Interval End Time
Double Equalization and Serration mode will output equalization and serration pulses at twice the HSYNC frequency
(i.e., 2 equalization or serration pulses for every HSYNC
pulse). Single Equalization and Serration mode will output
an equalization or serration pulse for every HSYNC pulse. In
Interlaced mode equalization and serration pulses will be
output during the VBLANK period of every odd and even
field. Interlaced Single Equalization and Serration mode is
not possible with this part.
VERTICAL INTERRUPT SPECIFICATION REGISTERS
These Registers determine the width of the Vertical Interrupt signal if used.
REG13Ð Vertical Interrupt Activate Time
REG14Ð Vertical Interrupt Deactivate Time
Bits 5 – 8
Bits 5 through 8 control the polarity of the outputs. A value
of zero in these bit locations indicates an output pulse active
LOW. A value of 1 indicates an active HIGH pulse.
B5Ð VCBLANK Polarity
B6Ð VCSYNC Polarity
B7Ð HBLHDR Polarity
B8Ð HSYNVDR Polarity
CURSOR LOCATION REGISTERS
These 4 registers determine the cursor position location, or
they generate separate Horizontal and Vertical Gating signals.
REG15Ð Horizontal Cursor Position Start Time
REG16Ð Horizontal Cursor Position End Time
REG17Ð Vertical Cursor Position Start Time
REG18Ð Vertical Cursor Position End Time
Bits 9 – 11
Bits 9 through 11 enable several different features of the
device.
B9Ð Enable Equalization/Serration Pulses (0)
Disable Equalization/Serration Pulses (1)
B10Ð Disable System Clock (0)
Enable System Clock (1)
Default values for B10 are ‘‘0’’ in the ’ACT715/
LM1882 and ‘‘1’’ in the ’ACT715-R/LM1882-R.
B11Ð Disable Counter Test Mode (0)
Enable Counter Test Mode (1)
This bit is not intended for the user but is for internal
testing only.
Signal Specification
HORIZONTAL SYNC AND BLANK
SPECIFICATIONS
All horizontal signals are defined by a start and end time.
The start and end times are specified in number of clock
cycles per line. The start of the horizontal line is considered
pulse 1 not 0. All values of the horizontal timing registers are
referenced to the falling edge of the Horizontal Blank signal
(see Figure 1 ). Since the first CLOCK edge, CLOCK Ý1,
causes the first falling edge of the Horizontal Blank reference pulse, edges referenced to this first Horizontal edge
are n a 1 CLOCKs away, where ‘‘n’’ is the width of the
timing in question. Registers 1, 2, and 3 are programmed in
this manner. The horizontal counters start at 1 and count
until HMAX. The value of HMAX must be divisible by 2. This
3
Signal Specification (Continued)
TL/F/10137 – 4
FIGURE 1. Horizontal Waveform Specification
Vertical Frame Period (VPER) e REG(8) c hper
Vertical Field Period (VPER/n) e REG(8) c hper/n
Vertical Blanking Width e [REG(7) b 1] c hper/n
Vertical Syncing Width e [REG(6) b REG(5)] c hper/n
Vertical Front Porch e [REG(5) b 1] c hper/n
where n e 1 for noninterlaced
n e 2 for interlaced
limitation is imposed because during interlace operation this
value is internally divided by 2 in order to generate serration
and equalization pulses at 2 c the horizontal frequency.
Horizontal signals will change on the falling edge of the
CLOCK signal. Signal specifications are shown below.
Horizontal Period (HPER) e REG(4) c ckper
Horizontal Blanking Width e [REG(3) b 1] c ckper
Horizontal Sync Width
Horizontal Front Porch
e [REG(2) b REG(1)] c ckper
e [REG(1) b 1] c ckper
COMPOSITE SYNC AND BLANK SPECIFICATION
Composite Sync and Blank signals are created by logically
ANDing (ORing) the active LOW (HIGH) signals of the corresponding vertical and horizontal components of these signals. The Composite Sync signal may also include serration
and/or equalization pulses. The Serration pulse interval occurs in place of the Vertical Sync interval. Equalization pulses occur preceding and/or following the Serration pulses.
The width and location of these pulses can be programmed
through the registers shown below. (See Figure 2B .)
Horizontal Equalization PW e [REG(9) b REG(1)] c ckper
REG 9 e (HFP) a (HEQP)
a 1
e [REG(4)/n a REG(1) b
Horizontal Serration PW
REG(10)] c ckper
REG 10 e (HFP) a (HPER/
2) b (HSERR) a 1
Where n e 1 for noninterlaced single serration/equalization
n e 2 for noninterlaced double
serration/equalization
n e 2 for interlaced operation
VERTICAL SYNC AND BLANK SPECIFICATION
All vertical signals are defined in terms of number of lines
per frame. This is true in both interlaced and noninterlaced
modes of operation. Care must be taken to not specify the
Vertical Registers in terms of lines per field. Since the first
CLOCK edge, CLOCK Ý1, causes the first falling edge of
the Vertical Blank (first Horizontal Blank) reference pulse,
edges referenced to this first edge are n a 1 lines away,
where ‘‘n’’ is the width of the timing in question. Registers 5,
6, and 7 are programmed in this manner. Also, in the interlaced mode, vertical timing is based on half-lines. Therefore
registers 5, 6, and 7 must contain a value twice the total
horizontal (odd and even) plus 1 (as described above). In
non-interlaced mode, all vertical timing is based on wholelines. Register 8 is always based on whole-lines and does
not add 1 for the first clock. The vertical counter starts at
the value of 1 and counts until the value of VMAX. No restrictions exist on the values placed in the vertical registers.
Vertical Blank will change on the leading edge of HBLANK.
Vertical Sync will change on the leading edge of HSYNC.
(See Figure 2A .)
4
Signal Specification (Continued)
TL/F/10137 – 5
FIGURE 2A. Vertical Waveform Specification
TL/F/10137 – 12
FIGURE 2B. Equalization/Serration Interval Programming
and Bit 2 of the Status Register is set to the value of 1. The
Cursor Position generates a single pulse of n clocks wide
during every line that the cursor is specified. The signals are
generated by logically ORing (ANDing) the active LOW
(HIGH) signals specified by the registers used for generating Horizontal and Vertical Gating signals. The Vertical Interrupt signal generates a pulse during the vertical interval
specified. The Vertical Interrupt signal will change in the
same manner as that specified for the Vertical Blanking signal.
Horizontal Cursor Width e [REG(16) b REG(15)] c ckper
HORIZONTAL AND VERTICAL GATING SIGNALS
Horizontal Drive and Vertical Drive outputs can be utilized
as general purpose Gating Signals. Horizontal and Vertical
Gating Signals are available for use when Composite Sync
and Blank signals are selected and the value of Bit 2 of the
Status Register is 0. The Vertical Gating signal will change
in the same manner as that specified for the Vertical Blank.
Horizontal Gating Signal Width e [REG(16) b REG(15)] c
ckper
Vertical Gating Signal Width e [REG(18) b REG(17)] c
hper
Vertical Cursor Width e [REG(18) b REG(17)] c hper
Vertical Interrupt Width e [REG(14) b REG(13)] c hper
CURSOR POSITION AND VERTICAL INTERRUPT
The Cursor Position and Vertical Interrupt signal are available when Composite Sync and Blank signals are selected
5
Addressing Logic
time the High Byte is written the address counter is incremented by 1. The counter has been implemented to loop on
the initial value loaded into the address register. For example: If a value of 0 was written into the address register then
the counter would count from 0 to 18 before resetting back
to 0. If a value of 15 was written into the address register
then the counter would count from 15 to 18 before looping
back to 15. If a value greater than or equal to 18 is placed
into the address register the counter will continuously loop
on this value. Auto addressing is initiated on the falling edge
of LOAD when ADDRDATA is 0 and LHBYTE is 1. Incrementing and loading of data registers will not commence
until the falling edge of LOAD after ADDRDATA goes to 1.
The next rising edge of LOAD will load the first byte of data.
Auto Incrementing is disabled on the falling edge of LOAD
after ADDRDATA and LHBYTE goes low.
The register addressing logic is composed of two blocks of
logic. The first is the address register and counter
(ADDRCNTR), and the second is the address decode
(ADDRDEC).
ADDRCNTR LOGIC
Addresses for the data registers can be generated by one of
two methods. Manual addressing requires that each byte of
each register that needs to be loaded needs to be addressed. To load both bytes of all 19 registers would require
a total of 57 load cycles (19 address and 38 data cycles).
Auto Addressing requires that only the initial register value
be specified. The Auto Load sequence would require only
39 load cycles to completely program all registers (1 address and 38 data cycles). In the auto load sequence the
low order byte of the data register will be written first followed by the high order byte on the next load cycle. At the
Manual Addressing Mode
Cycle Ý
Load Falling Edge
1
2
3
4
5
6
Enable Manual Addressing
Enable Lbyte Data Load
Enable Hbyte Data Load
Enable Manual Addressing
Enable Lbyte Data Load
Enable Hbyte Data Load
Load Rising Edge
Load Address m
Load Lbyte m
Load Hbyte m
Load Address n
Load Lbyte n
Load Hbyte n
TL/F/10137 – 7
Auto Addressing Mode
Cycle Ý
Load Falling Edge
Load Rising Edge
1
2
3
4
5
6
Enable Auto Addressing
Enable Lbyte Data Load
Enable Hbyte Data Load
Enable Lbyte Data Load
Enable Hbyte Data Load
Enable Manual Addressing
Load Start Address n
Load Lbyte (n)
Load Hbyte (n); Inc Counter
Load Lbyte (n a 1)
Load Hbyte (n a 1); Inc Counter
Load Address
TL/F/10137 – 8
6
Addressing Logic (Continued)
ADDRDEC LOGIC
The ADDRDEC logic decodes the current address and generates the enable signal for the appropriate register. The
enable values for the registers and counters change on the
falling edge of LOAD. Two types of ADDRDEC logic is enabled by 2 pair of addresses, Addresses 22 or 54 (Vectored
Restart logic) and Addresses 23 or 55 (Vectored Clear logic). Loading these addresses will enable the appropriate logic and put the part into either a Restart (all counter registers
are reinitialized with preprogrammed data) or Clear (all registers are cleared to zero) state. Reloading the same
ADDRDEC address will not cause any change in the state of
the part. The outputs during these states are frozen and the
internal CLOCK is disabled. Clocking the part during a Vectored Restart or Vectored Clear state will have no effect on
the part. To resume operation in the new state, or disable
the Vectored Restart or Vectored Clear state, another nonADDRDEC address must be loaded. Operation will begin in
the new state on the rising edge of the non-ADDRDEC load
pulse. It is recommended that an unused address be loaded
following an ADDRDEC operation to prevent data registers
from accidentally being corrupted. The following Addresses
are used by the device.
Address 0
Status Register REG0
Address 1–18 Data Registers REG1–REG18
Address 19–21 Unused
Address 22/54 Restart Vector (Restarts Device)
Address 23/55 Clear Vector (Zeros All Registers)
Address 24–31 Unused
Address 32–50 Register Scan Addresses
Address 51–53 Counter Scan Addresses
Address 56–63 Unused
At any given time only one register at most is selected. It is
possible to have no registers selected.
TL/F/10137 – 9
FIGURE 3. ADDRDEC Timing
GEN LOCKING
The ’ACT715/LM1882 and ’ACT715-R/LM1882-R is designed for master SYNC and BLANK signal generation.
However, the devices can be synchronized (slaved) to an
external timing signal in a limited sense. Using Vectored
Restart, the user can reset the counting sequence to a given location, the beginning, at a given time, the rising edge of
the LOAD that removes Vector Restart. At this time the next
CLOCK pulse will be CLOCK 1 and the count will restart at
the beginning of the first odd line.
Preconditioning the part during normal operation, before the
desired synchronizing pulse, is necesasry. However, since
LOAD and CLOCK are asynchronous and independent, this
is possible without interruption or data and performance corruption. If the defaulted 14.31818 MHz RS-170 values are
being used, preconditioning and restarting can be minimized
by using the CLEAR pulse instead of the Vectored Restart
operation. The ’ACT715-R/LM1882-R is better suited for
this application because it eliminates the need to program a
1 into Bit 10 of the Status Register to enable the CLOCK.
Gen Locking to another count location other than the very
beginning or separate horizontal/vertical resetting is not
possible with the ’ACT715/LM1882 nor the ’ACT715-R/
LM1882-R.
VECTORED RESTART ADDRESS
The function of addresses 22 (16H) or 54 (36H) are similar
to that of the CLR pin except that the preprogramming of
the registers is not affected. It is recommended but not required that this address is read after the initial device configuration load sequence. A 1 on the ADDRDATA pin (Auto
Addressing Mode) will not cause this address to automatically increment. The address will loop back onto itself regardless of the state of ADDRDATA unless the address on
the Data inputs has been changed with ADDRDATA at 0.
SCAN MODE LOGIC
A scan mode is available in the ACT715/LM1882 that allows the user to non-destructively verify the contents of the
registers. Scan mode is invoked through reading a scan address into the address register. The scan address of a given
register is defined by the Data register address a 32. The
internal Clocking signal is disabled when a scan address is
read. Disabling the clock freezes the device in it’s present
state. Data can then be serially scanned out of the data
registers through the ODD/EVEN Pin. The LSB will be
scanned out first. Since each register is 12 bits wide, completely scanning out data of the addressed register will require 12 CLOCK pulses. More than 12 CLOCK pulses on the
same register will only cause the MSB to repeat on the output. Re-scanning the same register will require that register
to be reloaded. The value of the two horizontal counters and
1 vertical counter can also be scanned out by using address
numbers 51 – 53. Note that before the part will scan out the
data, the LOAD signal must be brought back HIGH.
VECTORED CLEAR ADDRESS
Addresses 23 (17H) or 55 (37H) is used to clear all registers
to zero simultaneously. This function may be desirable to
use prior to loading new data into the Data or Status Registers. This address is read into the device in a similar fashion
as all of the other registers. A 1 on the ADDRDATA pin
(Auto Addressing Mode) will not cause this address to automatically increment. The address will loop back onto itself
regardless of the state of ADDRDATA unless the address
on the Data inputs has been changed with ADDRDATA at 0.
7
Addressing Logic (Continued)
Normal device operation can be resumed by loading in a
non-scan address. As the scanning of the registers is a nondestructive scan, the device will resume correct operation
from the point at which it was halted.
Reg
RS170 Default Register Values
The tables below show the values programmed for the
RS170 Format (using a 14.31818 MHz clock signal) and
how they compare against the actual EIA RS170 Specifications. The default signals that will be output are CSYNC,
CBLANK, HDRIVE and VDRIVE. The device initially starts at
the beginning of the odd field of interlace. All signals have
active low pulses and the clock is disabled at power up.
Registers 13 and 14 are not involved in the actual signal
information. If the Vertical Interrupt was selected so that a
pulse indicating the active lines would be output.
D Value H
Register Description
REG0
REG0
0
1024
000
400
Status Register (715/LM1882)
Status Register (715-R/LM1882-R)
REG1
REG2
REG3
REG4
23
91
157
910
017
05B
09D
38E
HFP End Time
HSYNC Pulse End Time
HBLANK Pulse End Time
Total Horizontal Clocks
REG5
REG6
REG7
REG8
7
13
41
525
007
00D
029
20D
VFP End Time
VSYNC Pulse End Time
VBLANK Pulse End Time
Total Vertical Lines
REG9
REG10
REG11
REG12
57
410
1
19
039
19A
001
013
Equalization Pulse End Time
Serration Pulse Start Time
Pulse Interval Start Time
Pulse Interval End Time
REG13
REG14
41
526
029 Vertical Interrupt Activate Time
20E Vertical Interrupt Deactivate Time
REG15
REG16
REG17
REG18
911
92
1
21
38F
05C
001
015
Horizontal Drive Start Time
Horizontal Drive End Time
Vertical Drive Start Time
Vertical Drive End Time
Rate
14.31818 MHz
15.73426 kHz
59.94 Hz
29.97 Hz
Input Clock
Line Rate
Field Rate
Frame Rate
Period
69.841 ns
63.556 ms
16.683 ms
33.367 ms
RS170 Horizontal Data
Signal
Width
HFP
HSYNC Width
HBLANK Width
HDRIVE Width
HEQP Width
HSERR Width
HPER iod
22 Clocks
68 Clocks
156 Clocks
91 Clocks
34 Clocks
68 Clocks
910 Clocks
VFP
VSYNC Width
VBLANK Width
VDRIVE Width
VEQP Intrvl
VPERiod (field)
VPERiod (frame)
3 Lines
3 Lines
20 Lines
11.0 Lines
9 Lines
262.5 Lines
525 Lines
ms
1.536
4.749
10.895
6.356
2.375
4.749
63.556
%H
7.47
17.15
10.00
3.74
7.47
100
Specification (ms)
1.5 g 0.1
4.7 g 0.1
10.9 g 0.2
0.1H g 0.005H
2.3 g 0.1
4.7 g 0.1
RS170 Vertical Data
190.67
190.67
1271.12
699.12
16.683 ms
33.367 ms
8
7.62
4.20
3.63
6 EQP Pulses
6 Serration Pulses
0.075V g 0.005V
0.04V g 0.006V
9 Lines/Field
16.683 ms/Field
33.367 ms/Frame
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Junction Temperature (TJ)
Ceramic
Plastic
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI e b0.5V
VI e VCC a 0.5V
DC Input Voltage (VI)
DC Output Diode Current (IOK)
VO e b0.5V
VO e VCC a 0.5V
DC Output Voltage (VO)
DC Output Source
or Sink Current (IO)
DC VCC or Ground Current
per Output Pin (ICC or IGND)
Storage Temperature (TSTG)
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature and output/input loading variables. National does not recommend operation of FACT TM circuits outside databook specifications.
b 0.5V to a 7.0V
b 20 mA
a 20 mA
b 0.5V to VCC a 0.5V
175§ C
140§ C
Recommended Operating
Conditions
b 20 mA
a 20 mA
Supply Voltage (VCC)
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
74ACT
54ACT
b 0.5V to VCC a 0.5V
g 15 mA
g 20 mA
b 65§ C to a 150§ C
4.5V to 5.5V
0V to VCC
0V to VCC
b 40§ C to a 85§ C
b 55§ C to a 125§ C
Minimum Input Edge Rate (DV/Dt)
VIN from 0.8V to 2.0V
VCC @ 4.5V, 5.5V
125 mV/ns
DC Characteristics For ’ACT Family Devices over Operating Temperature Range (unless otherwise specified)
Symbol
ACT/LM1882
54ACT/LM1882
74ACT/LM1882
TA e b55§ C
to a 125§ C
CL e 50 pF
TA e b40§ C
to a 85§ C
Parameter
VCC
(V)
TA e a 25§ C
CL e 50 pF
Minimum High Level
Output Voltage
4.5
5.5
4.49
5.49
Typ
VOH
4.5
5.5
VOL
Maximum Low Level
Output Voltage
4.5
5.5
0.001
0.001
4.5
5.5
Units
Conditions
Guaranteed Limits
4.4
5.4
4.4
5.4
4.4
5.4
V
V
IOUT e b50 mA
3.86
4.86
3.7
4.7
3.76
4.76
V
V
*VIN e VIL/VIH
IOH e b8 mA
0.1
0.1
0.1
0.1
0.1
0.1
V
V
IOUT e 50 mA
0.36
0.36
0.5
0.5
0.44
0.44
V
V
*VIN e VIL/VIH
IOH e a 8 mA
IOLD
Minimum Dynamic
Output Current
5.5
32.0
32.0
mA
VOLD e 1.65V
IOHD
Minimum Dynamic
Output Current
5.5
b 32.0
b 32.0
mA
VOHD e 3.85V
IIN
Maximum Input
Leakage Current
5.5
g 0.1
g 1.0
g 1.0
mA
VI e VCC, GND
ICC
Supply Current
Quiescent
5.5
8.0
160
80
mA
VIN e VCC, GND
ICCT
Maximum ICC/Input
5.5
1.6
1.5
mA
VIN e VCC b 2.1V
0.6
*All outputs loaded; thresholds on input associated with input under test.
Note 1: Test Load 50 pF, 500X to Ground.
9
AC Electrical Characteristics
Symbol
Parameter
VCC
(V)
ACT/LM1882
54ACT/LM1882
74ACT/LM1882
TA e a 25§ C
CL e 50 pF
TA e b55§ C
to a 125§ C
CL e 50 pF
TA e b40§ C
to a 85§ C
CL e 50 pF
Min
Typ
5.0
170
190
130
150
MHz
5.0
190
220
145
175
MHz
5.0
4.0
13.0
15.5
3.5
19.5
3.5
18.5
ns
Clock to ODDEVEN
(Scan Mode)
5.0
4.5
15.0
17.0
3.5
22.0
3.5
20.5
ns
Load to Outputs
5.0
4.0
11.5
16.0
3.0
20.0
3.0
19.5
ns
fMAXI
Interlaced fMAX
(HMAX/2 is ODD)
fMAX
Non-Interlaced fMAX
(HMAX/2 is EVEN)
tPLH1
tPHL1
Clock to Any Output
tPLH2
tPHL2
tPLH3
Max
Min
Max
Min
Units
Max
AC Operating Requirements
Symbol
Parameter
VCC
(V)
ACT/LM1882
54ACT/LM1882
74ACT/LM1882
TA e a 25§ C
TA e b55§ C
to a 125§ C
TA e b40§ C
to a 85§ C
Typ
tsc
tsc
Control Setup Time
ADDR/DATA to LOADb
L/HBYTE to LOADb
tsd
Data Setup Time
D7 – D0 to LOAD a
Control Hold Time
LOADb to ADDR/DATA
LOADb to L/HBYTE
thc
Units
Guaranteed Minimums
5.0
3.0
3.0
4.0
4.0
4.5
4.5
4.5
4.5
ns
ns
5.0
2.0
4.0
4.5
4.5
ns
5.0
0
0
1.0
1.0
1.0
1.0
1.0
1.0
ns
ns
thd
Data Hold Time
LOAD a to D7–D0
5.0
1.0
2.0
2.0
2.0
ns
trec
LOAD a to CLK (Note 1)
5.0
5.5
7.0
8.0
8.0
ns
twldb
twld a
Load Pulse Width
LOW
HIGH
5.0
5.0
3.0
3.0
5.5
5.0
5.5
7.5
5.5
7.5
ns
ns
twclr
CLR Pulse Width HIGH
5.0
5.5
6.5
9.5
9.5
ns
twck
CLOCK Pulse Width
(HIGH or LOW)
5.0
2.5
3.0
4.0
3.5
ns
Note 1: Removal of Vectored Reset or Restart to Clock.
Capacitance
Parameter
Typ
Units
Conditions
CIN
Symbol
Input Capacitance
7.0
pF
VCC e 5.0V
CPD
Power Dissipation
Capacitance
17.0
pF
VCC e 5.0V
10
AC Operating Requirements (Continued)
TL/F/10137 – 6
FIGURE 4. AC Specifications
Additional Applications Information
PREPROGRAMMING ‘‘ON-THE-FLY’’
Although the ’ACT715/LM1882 and ’ACT715-R/LM1882-R
are completely programmable, certain limitations must be
set as to when and how the parts can be reprogrammed.
Care must be taken when reprogramming any End Time
registers to a new value that is lower than the current value.
Should the reprogramming occur when the counters are at a
count after the new value but before the old value, then the
counters will continue to count up to 4096 before rolling
over.
For this reason one of the following two precautions are
recommended when reprogramming ‘‘on-the-fly’’. The first
recommendation is to reprogram horizontal values during
the horizontal blank interval only and/or vertical values during the vertical blank interval only. Since this would require
delicate timing requirements the second recommendation
may be more appropriate.
The second recommendation is to program a Vectored Restart as the final step of reprogramming. This will ensure
that all registers are set to the newly programmed values
and that all counters restart at the first CLK position. This
will avoid overrunning the counter end times and will maintain the video integrity.
POWERING UP
The ’ACT715/LM1882 default value for Bit 10 of the Status
Register is 0. This means that when the CLEAR pulse is
applied and the registers are initialized by loading the default values the CLOCK is disabled. Before operation can
begin, Bit 10 must be changed to a 1 to enable CLOCK. If
the default values are needed (no other programming is required) then Figure 5 illustrates a hardwired solution to facilitate the enabling of the CLOCK after power-up. Should control signals be difficult to obtain, Figure 6 illustrates a possible solution to automatically enable the CLOCK upon power-up. Use of the ’ACT715-R/LM1882-R eliminates the
need for most of this circuitry. Modifications of the Figure 6
circuit can be made to obtain the lone CLEAR pulse still
needed upon power-up.
Note that, although during a Vectored Restart none of the
preprogrammed registers are affected, some signals are affected for the duration of one frame only. These signals are
the Horizontal and Vertical Drive signals. After a Vectored
Restart the beginning of these signals will occur at the first
CLK. The end of the signals will occur as programmed. At
the completion of the first frame, the signals will resume to
their programmed start and end time.
TL/F/10137 – 10
FIGURE 5. Default RS170 Hardwire Configuration
11
Additional Applications Information (Continued)
TL/F/10137 – 11
Note: A 74HC221A may be substituted for the 74HC423A Pin 6 and Pin 14 must be hardwired to GND
Components
R1: 4.7k
R2: 10k
C1: 10 mF
C2: 50 pF
FIGURE 6. Circuit for Clear and Load Pulse Generation
Ordering Information
The device number is used to form part of a simplified purchasing code where a package type and temperature range are
defined as follows:
74ACT
715
Temperature Range Family
74ACT e Commercial TTL-Compatible
54ACT e Military TTL-Compatible
P
C
QR
Special Variations
X e Devices shipped in 13× reels
QR e Commercial grade device with
burn-in
QB e Military grade device with
environmental and burn-in
processing shipped in tubes.
Device Type
715 e Default: CLOCK Disabled
715-R e Default: CLOCK Enabled
Package Code
P e Plastic DIP
D e Ceramic DIP
L e Leadless Chip Carrier (LCC)
S e Small Outline (SOIC)
Temperature Range
C e Commercial (b40§ C to a 85§ C)
M e Military (b55§ C to a 125§ C)
OR
Default:
CLOCK
Disabled
Default
CLOCK
Enabled
LM1882CM e Commercial Small Outline (SOIC)
LM1882CN e Commercial Plastic DIP
LM1882J/883 e Military Ceramic Dip
LM1882E/883 e Military Leadless Chip Carrier
LM1882-RCM e Commercial Small Outline (SOIC)
LM1882-RCN e Commercial Plastic DIP
LM1882-RJ/883 e Military Ceramic Dip
LM1882-RE/883 e Military Leadless Chip Carrier
12
13
Physical Dimensions inches (millimeters)
20-Terminal Ceramic Leadless Chip Carrier (L)
NS Package Number E20A
14
Physical Dimensions inches (millimeters) (Continued)
20-Lead Ceramic Dual-In-Line Package (D)
NS Package Number J20A
20-Lead Small Outline Integrated Circuit (S)
NS Package Number M20B
15
LM1882 # 54ACT/74ACT715 # LM1882-R # 54ACT/74ACT715-R
Programmable Video Sync Generator
Physical Dimensions inches (millimeters) (Continued)
20-Lead Plastic Dual-In-Line Package (P)
NS Package Number N20B
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
National Semiconductor
Corporation
1111 West Bardin Road
Arlington, TX 76017
Tel: 1(800) 272-9959
Fax: 1(800) 737-7018
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
National Semiconductor
Europe
Fax: (a49) 0-180-530 85 86
Email: cnjwge @ tevm2.nsc.com
Deutsch Tel: (a49) 0-180-530 85 85
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Tel: (852) 2737-1600
Fax: (852) 2736-9960
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Japan Ltd.
Tel: 81-043-299-2309
Fax: 81-043-299-2408
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
LM224/A, LM324/A, LM2902
QUAD OPERATIONAL AMPLIFIER
QUAD OPERATIONAL AMPLIFIERS
14 DIP
The LM224 series consists of four independent, high gain, internally
frequency compensated operational amplifiers which were designed
specifically to operate from a single power supply over a wide voltage
range.
Operation from split power supplies is also possible so long as the
difference between the two supplies is 3 volts to 32 volts.
Application areas include transducer amplifier, DC gain blocks and all
the conventional OP amp circuits which now can be easily implemented
in single power supply systems.
14 SOP
FEATURES
• Internally frequency compensated for unity gain
• Large DC voltage gain: 100dB
• Wide power supply range: LM224/A, LM324/A: 3V ~32V (or ±1.5 ~ 15V)
LM2902: 3V~26V (or ±1.5V ~ 13V)
• Input common-mode voltage range includes ground
• Large output voltage swing: 0V DC to VCC -1.5V DC
• Power drain suitable for battery operation.
ORDERING INFORMATION
BLOCK DIAGRAM
SCHEMATIC DIAGRAM
Device
Package
LM324N
LM324AN
14 DIP
LM324M
LM324AM
14 SOP
LM224N
LM224AN
14 DIP
LM224M
LM224AM
14 SOP
Operating Temperature
0 ~ + 70°C
-25 ~ +85 °C
LM2902N
14 DIP
LM2902M
14 SOP
-40 ~ + 85 °C
(One Section Only)
Rev. B
1999 Fairchild Semiconductor Corporation
LM224/A, LM324/A, LM2902
QUAD OPERATIONAL AMPLIFIER
ABSOLUTE MAXIMUM RATINGS
Characteristic
Power Supply Voltage
Differential Input Voltage
Input Voltage
Symbol
LM224/LM224A
LM324/LM324A
LM2902
Unit
VCC
±18 or 32
±18 or 32
±13 or 26
V
VI(DIFF)
32
32
26
V
VI
-0.3 to + 32
-0.3 to +32
-0.3 to +26
V
Continuous
Continuous
Output Short Circuit to GND
Continuous
VCC≤15V TA=25 °C(One Amp)
PD
570
570
570
mW
Operating Temperature Range
TOPR
-25 ~ +85
0 ~ + 70
-40 ~ + 85
°C
Storage Temperature Range
TSTG
-65 ~ + 150
-65 ~ + 150
-65 ~ + 150
°C
Power Dissipation
ELECTRICAL CHARACTERISTICS
(VCC=5.0V, VEE=GND, TA=25 °C, unless otherwise specified)
Characteristic
Symbol
Input Offset Voltage
VIO
Input Offset Current
Input Bias Current
Input Common-Mode
Voltage Range
IIO
IBIAS
Supply Current
ICC
VI(R)
LM224
Test Conditions
VCM = 0V to VCC = 1.5V
VO(P) = 1.4V, RS = 0Ω
VCC = 30V
(VCC = 26V for KA2902)
0
RL = ∞,VCC = 30V (all Amps)
Large Signal
Voltage Gain
Output Voltage Swing
GV
VO(H)
VO(L)
Common-Mode
Rejection Ratio
Power Supply
Rejection Ratio
Channel Separation
Short Circuit to GND
1.5
7.0
mV
2.0 30
40 150
VCC
-1.5
1.0 3
3.0 50
40 250
VCC
-1.5
1.0 3
3.0 50
40 250
VCC
-1.5
1.0 3
nA
nA
mA
0.7
mA
25 100
26
26
28
5
PSRR
65 100
Output Current
ISINK
VI(DIFF)
f = 1KHz to 20KHz
27
20
85
0
0.7 1.2
50 100
VCC = 5V, RL≥10KΩ
VI(+) = 1V, VI(-) = 0V
VCC = 15V, VO(P) = 2V
VI(+) = 0V, VI(-) = 1V
VCC = 15V, VO(P) = 2V
VI(+) = 0V, VI(-) = 1V
VCC = 15V,VO(R) = 200mV
0
0.7 1.2
27
Unit
1.5 7.0
70
CS
ISC
LM2902
1.5 5.0
CMRR
ISOURCE
Differential Input
Voltage
RL = ∞,VCC = 5V (all Amps)
(VCC = 26V for KA2902)
VCC = 15V, RL≥2KΩ
VO(P) = 1V to 11V
VCC = 30V
RL = 2KΩ
VCC=26V for 2902
RL = 10KΩ
LM324
Min Typ Max Min Typ Max Min Typ Max
100
23
20
75
V
24
5
50
65 100
120
40 60
V/mV
22
28
5
65
1.2
V
V
100
mV
75
dB
50 100
dB
120
40 60
120
40
60
dB
mA
20
40
20
40
20
40
mA
10
13
10
13
10
13
mA
12
45
12
45
VCC
µA
VCC
VCC
V
LM224/A, LM324/A, LM2902
QUAD OPERATIONAL AMPLIFIER
ELECTRICAL CHARACTERISTICS
(VCC = 5.0V, VEE = GND, unless otherwise specified)
The following specification apply over the range of -25 °C ≤ T A ≤ + 85 °C for the LM224; and the 0 °C ≤ T A ≤ +70 °C for the
LM324 ; and the - 40 °C ≤ T A ≤ +85 °C for the LM2902
Characteristic
Symbol
Input Offset Voltage
VIO
Input Offset Voltage
Drift
Input Offset Current
Input Offset Current
Drift
Input Bias Current
Input Common-Mode
Voltage Range
Large Signal Voltage
Gain
∆VIO/∆T
Output Voltage Swing
LM224
VICM = 0V to VCC = 1.5V
VO(P) = 1.4V, RS = 0Ω
7.0
100
IBIAS
GV
VO(H)
ISOURCE
Output Current
ISINK
VI(DIFS)
150
VCC = 15V, RL ≥ 2.0KΩ
VO(P) = 1V to 11V
VCC = 30V
RL = 2KΩ
VCC =26V for 2902 RL = 10KΩ
VCC = 5V, RL≥10KΩ
VI(+) = 1V, VI(-) = 0V
VCC = 15V, VO(P) = 2V
VI(+) = 0V, VI(-) = 1V
VCC = 15V, VO(P) = 2V
0
200
0
25
15
15
26
26
22
27
28
5
27
20
28
5
500
VCC
-2.0
0
23
20
mV
nA
pA/ °C
10
500
VCC
-2.0
Unit
µV/ °C
7.0
10
300
VCC
-2.0
Typ Max
10.0
7.0
10
VCC = 30V
(VCC = 26V for KA2902)
LM2902
9.0
7.0
IIO
VIC(R)
LM324
Min Typ Max Min Typ Max Min
∆IIO/∆T
VO(L)
Differential Input
Voltage
Test Conditions
nA
V
V/mV
V
24
5
V
100
mV
10
20
10
20
10
20
mA
10
13
5
8
5
8
mA
VCC
VCC
VCC
V
LM224/A, LM324/A, LM2902
QUAD OPERATIONAL AMPLIFIER
ELECTRICAL CHARACTERISTICS
(VCC=50V, VEE = GND, TA=25 °C, unless otherwise specified)
Characteristic
Symbol
Input Offset Voltage
VIO
Input Offset Current
Input Bias Current
Input Common-Mode
Voltage Range
IIO
Supply Current (All Amps)
Large Signal Voltage Gain
Output Voltage Swing
VCM = 0V to VCC = 1.5V
VO(P) = 1.4V, RS = 0 Ω
VI(R)
VCC = 30V
ICC
VCC = 30V
VCC = 5V
GV
VO(H)
CMRR
PSRR
CS
ISC
ISOURCE
Output Current
ISINK
Differential Input Voltage
LM224A
Min
IBIAS
VO(L)
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Channel Separation
Short Circuit to GND
Test Conditions
VI(DIFF)
VCC = 15V, RL≥ 2 KΩ
VO(P) = 1V to 11V
VCC = 30V
RL = 2 KΩ
VCC = 26V for 2902 RL = 10 KΩ
1.5
3.0
mV
15
80
VCC
-1.5
3
1.2
3.0
40
30
100
VCC
-1.5
3
1.2
nA
nA
100
0
1.5
0.7
25
100
70
65
85
100
120
40
20
27
20
V
mA
mA
V/mV
26
28
5
V
28
5
V
20
mV
60
dB
dB
dB
mA
65
65
85
100
120
40
40
20
40
mA
10
20
10
20
mA
12
50
12
50
f = 1KHz to 20KHz
VI(+) = 1V, VI(-) = 0V
VCC = 15V
VI(+) = 0V, VI(-) = 1V
VCC = 15V, VO(P) = 2V
VI(+) = 0v, VI(-) = 1V
VCC = 15V, VO(P) = 200mV
3.0
26
VCC = 5V, RL≥ 10 KΩ
Unit
2
40
1.5
0.7
27
Typ Max
1.0
0
50
LM324A
Typ Max Min
60
VCC
µA
VCC
V
LM224/A, LM324/A, LM2902
QUAD OPERATIONAL AMPLIFIER
ELECTRICAL CHARACTERISTICS
(VCC = 5.0V, VEE = GND, unless otherwise specified)
o
The following specification apply over the range of -25 C ≤ T A ≤ + 85 °C for the LM224A; and the 0 °C ≤ T A ≤+70 °C
for the LM324A
Characteristic
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Offset Current Drift
Input Bias Current
Input Common-Mode
Voltage Range
Large Signal Voltage Gain
LM224A
Symbol
VIO
Test Conditions
LM324A
Max
7.0
20
∆IIO/∆T
IBIAS
10
30
200
40
VI(R)
VCC = 30V
0
GV
VCC = 15V, RL≥ 2.0KΩ
25
VO(P-P)
ISOURCE
ISINK
VI(DIFF)
RL = 2KΩ
26
RL = 10KΩ
27
VCC = 5V, RL≥ 10KΩ
VI(+) = 1V, VI(-) = 0V
VCC = 15V
VI(+) = 0V, VI(-) = 1V
VCC = 15V
Min
Typ
4.0
∆VIO/∆T
IIO
Output Current
Differential Input Voltage
Typ
VCM = 0V to VCC = 1.5V
VO(P) = 1.4V, RS = 0Ω
VCC = 30V
Output Voltage Swing
Min
100
VCC
-2.0
Max
Unit
5.0
mV
7.0
30
µV/ °C
nA
10
75
300
40
0
200
VCC
-2.0
15
pA/ °C
nA
V
V/mV
26
28
5
10
20
5
8
27
20
VCC
V
28
5
10
20
5
8
20
mA
mA
mA
VCC
V
LM224/A, LM324/A, LM2902
QUAD OPERATIONAL AMPLIFIER
TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 1 INPUT VOLTAGE RANGE
POWER SUPPLY VOLTAGE (±VDC)
Fig. 2 INPUT CURRENT
o
TEMPERATURE ( C)
Fig. 3 SUPPLY CURRENT
SUPPLY VOLTAGE (V)
Fig. 5 OPEN LOOP FREGUENCY RESPONSE
FREQUENCY (Hz)
Fig. 4 VOLTAGE GAIN
SUPPLY VOLTAGE (V)
Fig. 6 COMMON.MOOE REJECTION RATIO
FREQUENCY (Hz)
LM224/A, LM324/A, LM2902
Fig.7 SLEW RATE
QUAD OPERATIONAL AMPLIFIER
Fig. 8 VOLTAGE FOLLOWER PULSE
Fig. 10 OUTPUT CHARACTERISTICS
Fig. 9 LARGE SIGNAL FREQUECY RESPONSE
CURRENT SOURCING
FREQUENCY (Hz)
Fig. 11 OUTPUT CHARACTERISTICS
CURRENT SINKING
OUTPUT SINK CURRENT (mA)
OUTPUT SOURCE CURRENT (mA)
Fig. 12 CURRENT LIMITING
o
TEMPERATURE ( C)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
LM336-2.5/B/LM236-2.5 (KA336-2.5, KA236-2.5) PROGRAMMABLE SHUNT REGULATOR
PROGRAMMABLE SHUNT REGULATOR
TO-92
The LM336-2.5/B integrated Circuits are precision 2.5V shunt
regulators. The monolithic IC voltage references operates as a low
temperature coefficient 2.5V zener with 0.2Ω dynamic impedance.
A third terminal on the KA336-2.5/B allow the reference voltage and
temperature coefficient to be trimmed easily.
LM3362.5/B are useful as a precision 2.5V low voltage reference for
digital voltmeters, power supplies or op amp circuitry. The 2.5V make
it convenient to obtain a stable reference from low voltage supplies.
Further, since the LM336-2.5/B operate as shunt regulators, they can
be used as either a positive or negative voltage reference.
1: Adj. 2: + 3: -
FEATURES
• Low temperature coefficient
• Guaranteed temperature stability 4mV typical
• 0.2 Ω dynamic impedance
• ±1.0% initial tolerance available.
• Easily trimmed for minimum temperature drift
ORDERING INFORMATION
Device
LM336Z-2.5
LM336Z-2.5B
LM236Z-2.5
Package
TO-92
Operating Temperature
0 ~ +70°C
-25 ~ +85°C
SCHEMATIC DIAGRAM
Rev. B
1999 Fairchild Semiconductor Corporation
LM336-2.5/B/LM236-2.5 (KA336-2.5, KA236-2.5) PROGRAMMABLE SHUNT REGULATOR
ABSOLUTE MAXIMUM RATINGS
Characteristic
Symbol
Value
Unit
Reverse Current
Forward Current
Operating Temperature Range LM336-2.5/B
LM236-2.5
IR
IF
15
10
0 ~ + 70
- 25 ~ +85
mA
mA
TOPR
Storage Temperature Range
TSTG
ELECTRICAL CHARACTERISTICS
Characteristic
Symbol
Reverse Breakdown Voltage
Reverse Breakdown
Change with Current
Reverse Dynamic Impedance
VR
∆VR/∆IR
ZD
Temperature Stability
STT
Reverse Breakdown
Change with Current
∆VR/∆IR
Reverse Dynamic Impedance
ZD
Long Term Stability
ST
LM236: TMIN = -25°C, TMAX = +85°C
LM336: TMIN = 0°C, TMAX = +70°C
°C
°C
°C
- 60 ~ + 150
(TMIN < TA < T MAX, unless otherwise specified)
Test Conditions
TA = +25°C
IR = 1mA
TA = +25°C
400µA ≤IR ≤ 10mA
TA = +25°C
IR = 1mA
IR = 1mA
T MIN ≤ T A ≤ T MAX
T MIN ≤ T A ≤ T MAX
400µA ≤ IR ≤10mA
IR = 1mA
T MIN ≤ T A ≤ T MAX
IR = 1mA
T MIN ≤ T A≤T MAX
LM336/236
LM336B
Min
Typ
Max
Min
Typ
Max
2.44
2.49
2.54
2.465
2.49
2.515
V
2.6
6
2.6
10
mV
0.2
0.6
0.2
1
Ω
1.8
6
1.8
6
mV
3
10
3
12
mV
0.4
1
0.4
1.4
Ω
20
20
ppm
LM336-2.5/B/LM236-2.5 (KA336-2.5, KA236-2.5) PROGRAMMABLE SHUNT REGULATOR
TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 1. Reverse Voltage Change
REVERSE CURRENT (mA)
Fig. 3 Temperature Drift
Fig. 2 Reverse Characteristics
REVERSE VOLTAGE(V)
Fig. 4 Forward Characteristics
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
LM239, LM339, LM2901, LM3302
QUAD DIFFERENTIAL COMPARATOR
QUAD COMPARATOR
14 DIP
The LM239 series consists of four independent voltage comparators designed to operate from single power supply over a wide
voltage range.
FEATURES
• Single or dual supply operation
• Wide range of supply voltage
LM239/A, LM339/A, LM2901: 2 ~ 36V (or ±1 ~ ±18V)
LM3302: 2 ~ 28V (or ±1 ~ ±14V)
• Low supply current drain 800µA Typ
• Open collector outputs for wired and connectors
• Low input bias current 25nA Typ
• Low Input offset current ±2.3nA Typ.
• Low input offset voltage ±1.4mV Typ.
• Common mode input voltage range includes ground.
• Low output saturation voltage
• Output compatible with TTL. DTL and MOS logic
system
BLOCK DIAGRAM
14 SOP
ORDERING INFORMATION
Device
LM339N
LM339AN
LM339M
LM339AM
LM239N
LM239AN
LM239M
LM239AM
LM2901N
LM2901M
LM3302N
LM3302M
Package
Operating Temperature
14 DIP
0 ~ +70°C
14 SOP
14 DIP
-25 ~ + 85°C
14 SOP
14 DIP
14 SOP
14 DIP
14 SOP
-40 ~ + 85°C
Rev. B
1999 Fairchild Semiconductor Corporation
LM239, LM339, LM2901, LM3302
QUAD COMPARATOR
SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Characteristic
Supply Voltage
Supply Voltage Only LM3302
Differential Input Voltage
Differential Input Voltage Only LM3302
Input Voltage
Input Voltage Only LM3302
Output Short Circuit to GND
Power Dissipation
Operating Temperature LM339/LM339A
LM239/LM239A
LM2901/LM3302
Storage Temperature
Symbol
Value
Unit
VCC
VCC
VI(DIFF)
VI(DIFF)
VI
VI
±18 or 36
±14 or 28
36
28
- 0.3 to +36
- 0.3 to +28
Continuous
570
0 ~ + 70
- 25 ~ + 85
- 40 ~ + 85
- 65 ~ + 150
V
V
V
V
V
V
PD
TOPR
TSTG
mW
°C
°C
°C
°C
LM239, LM339, LM2901, LM3302
QUAD COMPARATOR
ELECTRICAL CHARACTERISTICS
(VCC = 5V, TA = 25°C, unless otherwise specified)
Characteristic
Symbol
Input Offset Voltage
VIO
Input Offset Current
IIO
Input Bias Current
IBIAS
Input Common Mode
Voltage Range
Supply Current
VI(R)
Voltage Gain
Large Signal
Response Time
Response Time
Output Sink Current
Output Saturation
Voltage
Output Leakage
Current
Differential Voltage
LM239A/LM339A
Test Conditions
Min Typ
±1
VCM =0V to VCC =1.5V
VO(P) =1.4V, RS =0Ω
RL = ∞
VCC =15V, RL≥15KΩ(for large swing)
VI =TTL Logic Swing
VREF =1.4V, VRL =5V, RL =5.1KΩ
tRES
tRES
VRL =5V, RL =5.1KΩ
ISINK
VI(-)≥1V, VI(+) =0V, VO(P) ≤1.5V
VSAT
IO(LKG)
VI(DIFF)
Note 1.
LM339/A: 0≤T A≤ +70°C
LM239/A: -25≤T A≤ +85°C
LM2901/3302: -40≤T A≤ +85°C
±50
57
±150
250
400
NOTE 1
ICC
VI(-)≥1V, VI(+) =0V
ISINK =4mA
VI(-) = 0V
VI(+) = 1V
±2
±2.3
NOTE 1
GV
LM239/LM339
Min Typ
±1.4
±4.0
NOTE 1
NOTE 1
Max
VCC-1.5
0
0
1.1
50
VCC-2
2.0
200
±2.3
57
0
0
1.1
50
1.4
18
140
NOTE 1
VO(P) = 5V
VO(P) = 30V
NOTE 1
6
400
±50
±150
250
400
VCC-1.5
VCC-2
2.0
Unit
mV
nA
nA
V
mA
200
V/mV
350
ns
1.4
µs
mA
18
140
700
0.1
±5
±9.0
350
6
Max
400
700
0.1
mV
nA
1.0
1.0
36
36
µA
V
LM239, LM339, LM2901, LM3302
QUAD COMPARATOR
ELECTRICAL CHARACTERISTICS
(VCC = 5V, TA = 25°C, unless otherwise specified)
Characteristic
Symbol
Input Offset Voltage
VIO
Input Offset Current
Input Bias Current
Input Common Mode
Voltage Range
IIO
IBIAS
VI(R)
Supply Current
ICC
Voltage Gain
Large Signal
Response Time
Response Time
Output Sink Current
Output Saturation
Voltage
Output Leakage
Current
Differential Voltage
GV
tRES
tRES
ISINK
VSAT
IO(LKG)
VI(DIFF)
Note 1.
LM339/A: 0≤T A≤ +70°C
LM239/A: -25≤T A≤ +85°C
LM2901/3302: -40≤T A≤ +85°C
Test Conditions
VCM =0V to VCC =1.5V
VO(P) =1.4V, RS =0Ω
NOTE 1
LM2901
Min Typ
2
9
2.3
NOTE 1
50
57
200
NOTE 1
NOTE 1
RL =∞
RL =∞, VCC =30V
VCC =15V, RL≥15KΩ(for large swing)
VI =TTL Logic Swing
VREF =1.4V, VRL =5V, RL =5.1KΩ
VRL =5V, RL =5.1KΩ
VI(-)≥1V, VI(+) =0V, VO(P) ≤1.5V
VI(-)≥1V, VI(+) =0V
ISINK =4mA
NOTE 1
VI(-) = 0V
VO(P) = 5V
VI(+) = 1V
VO(P) = 30V
NOTE 1
VCC-1.5
0
0
25
6
LM3302
Max
7
15
50
200
250
500
1.1
1.6
100
VCC-2
2.0
2.5
Min Typ
2
3
57
VCC-1.5
0
0
1.1
2
Max
20
40
100
300
250
1000
VCC-2
2.0
30
Unit
mV
nA
nA
V
mA
V/mV
350
350
ns
1.4
18
140
1.4
18
140
µs
mA
6
400
700
0.1
400
700
mV
1.0
36
nA
µA
V
0.1
1.0
36
LM239, LM339, LM2901, LM3302
TYPICAL PERFORMANCE CHARACTERISTICS
QUAD COMPARATOR
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
LM248, LM348
QUAD OPERATIONAL AMPLIFIER
QUAD OPERATIONAL AMPLIFIERS
The LM248/LM348 is a true quad LM741. It consists of four independent, high-gain, internally compensated, low-power operational amplifiers
which have been designed to provide functional characteristics identical
to those of the familiar LM741 operational amplifier. In addition the total
supply current for all four amplifiers is comparable to the Supply current
of a single LM741 type OP Amp.
Other features include input offset currents and input bias current which
are much less than those of a standard LM741. Also, excellent isolation
between amplifiers has been achieved by independently biasing each
amplifier and using layout techniques which minimize thermal coupling.
14 DIP
14 SOP
FEATURES
•
•
•
•
•
•
•
•
•
•
LM741 OP Amp operating characteristics
Low supply current drain
Class AB output stage-no crossover distortion
Pin compatible with the LM324 & LM3403
Low input offset voltage: 1mV Typ.
Low input offset current: 4nA Typ.
Low input bias current: 30nA Typ.
Gain bandwidth product for LM348 (unity gain): 1.0MHz Typ.
High degree of isolation between amplifiers: 120dB
Overload protection for inputs and outputs
BLOCK DIAGRAM
SCHEMATIC DIAGRAM
ORDERING INFORMATION
Device
Package
LM348N
LM348M
LM248N
LM248M
14 DIP
14 SOP
14 DIP
14 SOP
Operating Temperature
0 ~ +70°C
-25 ~ +85 °C
(One Section Only)
Rev. B
1999 Fairchild Semiconductor Corporation
LM248, LM348
QUAD OPERATIONAL AMPLIFIER
ABSOLUTE MAXIMUM RATINGS (TA = 25°°C)
Characteristic
Supply Voltage
Differential Input Voltage
Symbol
Value
Unit
VCC
±18
V
VI(DIFF)
36
V
±18
V
Input Voltage
VI
Output Short Circuit Duration
Continuous
Operating Temperature KA248
TOPR
- 25 ~ +85
°C
0~ +70
°C
- 65~ +150
°C
KA348
Storage Temperature
TSTG
ELECTRICAL CHARACTERISTICS
(VCC =15V, VEE= -15V, TA=25 °C, unless otherwise specified)
Characteristic
Symbol
Input Offset Voltage
VIO
Input Offset Current
IIO
Input Bias Current
IBIAS
Test Conditions
RS≤10KΩ
6.0
7.5
50
125
200
500
30
NOTE 1
RI
Large Signal Voltage Gain
GV
Channel Separation
Common Mode Input
Voltage Range
Small Signal Bandwidth
Phase Margin
Slew Rate
CS
NOTE 1
f = 1KHz to 20KHz
VI(R)
NOTE 1
BW
MPH
SR
GV = 1
GV = 1
GV = 1
0.8
RL≥2KΩ
25
15
RL≥10KΩ
VO(P.P)
Common Mode Rejection Ratio
CMRR
RS≥10KΩ
Power Supply Rejection Ratio
PSRR
RS≥10KΩ
RL≥2KΩ
2.5
2.4
160
Typ
Max
1
6.0
7.5
50
100
200
400
4
30
0.8
4.5
25
15
2.5
2.4
160
4.5
Unit
mV
nA
nA
MΩ
mA
V/mV
120
dB
1.0
60
0.5
1.0
60
0.5
MHz
Degree
25
25
±12
±12
±12
±13
NOTE 1
±10
70
±12
90
NOTE 1
77
96
NOTE 1
Min
120
ISC
Output Voltage Swing
LM348: 0 ≤ T A ≤ +70°C
LM248: -25 ≤ T A ≤ +85 °C
1
4
ICC
NOTE 1
Max
NOTE 1
Supply Current (all Amplifiers)
LM348
Typ
NOTE 1
Input Resistance
Output Short Circuit Current
LM248
Min
±12
+0
V
±13
V/µs
mA
V
70
±12
90
dB
77
96
dB
LM248, LM348
QUAD OPERATIONAL AMPLIFIER
TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 1 SUPPLY CURRENT
SUPPLY VOLTAGE (±V)
Fig. 3 SOURCE CURRENT LIMIT
OUTPUT SOURCE CURRENT (mA)
Fig. 5 OUTPUT IMPEDANCE
Fig. 2 VOLTAGE SWING
SUPPLY VOLTAGE (±V)
Fig. 4 SINK CURRENT LIMIT
OUTPUT SINK CURRENT (mA)
Fig. 6 COMMON-MODE REJECTION RATIO
LM248, LM348
QUAD OPERATIONAL AMPLIFIER
Fig. 7 OPEN LOOP FREGUENCV RESPONSE
FREQUENCYN (Hz)
Fig. 9 LARGE SIGNAL PULSE RESPONSE
Fig. 11 UNDISTORTED OUTPUT VOLTAGE SWING
FREQUENCY (Hz)
Fig. 8 BODE PLOT
FREQUENCY (MHz)
Fig. 10 SMALL SIGNAL PULSE RESPONSE
Fig. 12 INVERTING LARGE SIGNAL
PULSE RESPONSE
TIME (µs)
LM248, LM348
Fig. 13 INPUT NOISE VOLTAGE AND
NOISE CURRENT
QUAD OPERATIONAL AMPLIFIER
Fig. 14 POSITIVE COMMON MODE INPUT
VOLTAGE LIMIT
FREQUENCY (Hz)
Fig. 15 NEGATIVE COMMON.MODE INPUT
VOLTAGE LIMFY
NEGATIVE SUPPLY VOLTS(V)
POSITIVE SUPPLY (V)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
LM258/A, LM358/A, LM2904
DUAL OPERATIONAL AMPLIFIER
DUAL OPERATIONAL AMPLIFIERS
8 DIP
The LM258 series consists of four independent, high gain, internally
Frequency compensated operational amplifiers which were designed
specifically to operate from a single power supply over a wide range
of voltage.
Operation from split power supplies is also possible and the low power
Supply current drain is independent of the magnitude of the power Supply
voltage. Application areas include transducer amplifier, DC gain blocks and
all the conventional OP amp circuits which now can be easily implemented
in single 8 SOP power supply system.
FEATURES
• Internally frequency compensated for unity gain
• Large DC voltage gain: 100dB
• Wide power supply range: LM258/A, LM358/A: 3V~32V (or ±1.5V~16V)
LM2904: 3V~26V (or ±1.5V~13V)
• Input common-mode voltage range Includes ground
• Large output voltage swing: 0V DC to Vcc - 1.5V DC
• Power drain suitable for battery operation.
9 SIP
BLOCK DIAGRAM
ORDERING INFORMATION
SCHEMATIC DIAGRAM
(One section only)
Device
Package Operating Temperature
LM358N
LM358AN
8 DIP
LM358S
LM358AS
9 SIP
LM358M
LM358AM
8 SOP
LM258N
LM258AN
8 DIP
LM258S
LM258AS
9 SIP
LM258M
LM258AM
8 SOP
LM2904N
8 DIP
LM2904S
9 SIP
LM2904M
8 SOP
0 ~ + 70°C
-25 ~ + 85 °C
-40 ~ + 85 °C
Rev. B
1999 Fairchild Semiconductor Corporation
LM258/A, LM358/A, LM2904
DUAL OPERATIONAL AMPLIFIER
ABSOLUTE MAXIMUM RATINGS
Characteristic
Supply Voltage
Differential Input Voltage
Input Voltage
Symbol
LM258/LM258A
LM358/LM358A
LM2904
Unit
VCC
±16 or 32
±16 or 32
±13 or 26
V
VI(DIFF)
32
32
26
V
VI
-0.3 to +32
-0.3 to +32
-0.3 to +26
V
Continuous
Continuous
Output Short Circuit to GND
VCC≤V, TA = 25 °C(One Amp)
Continuous
Operating Temperature Range
TOPR
-25 ~ + 85
0 ~ + 70
-40 ~ + 85
°C
Storage Temperature Range
TSTG
-65 ~ + 150
-65 ~ + 150
-65 ~ + 150
°C
ELECTRICAL CHARACTERISTICS
(VCC = 5.0V, VEE = GND, T = 25 °C, unless otherwise specified)
Characteristic
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Common-Mode
Voltage Range
Supply Current
Large Signal
Voltage Gain
Output Voltage Swing
Common-Mode
Rejection Ratio
Power Supply
Rejection Ratio
Channel Separation
Short Circuit to GND
Symbol
VIO
Differential Input
Voltage
LM258
LM358
LM2904
Min Typ Max Min Typ Max Min Typ Max
VCM = 0V to VCC -1.5V
VO(P) = 1.4V, RS = 0Ω
2.9
5.0
2.9
7.0
2.9
Unit
7.0
mV
IIO
3
30
5
50
5
50
nA
IBIAS
45
150
VCC
-1.5
45
250
VCC
-1.5
45
250
VCC
-1.5
nA
VI(R)
ICC
GV
VO(H)
VO(L)
VCC = 30V
(KA2904, VCC = 26V)
RL = ∞, VCC = 30V
(KA2902, VCC = 26V)
RL = ∞,over full temperature range
VCC = 15V, RL≥2KΩ
VO(P) = 1V to 11V
VCC = 30V
VCC = 26V for 2904
VCC = 5V, RL≥10KΩ
0
50
RL = 2KΩ
26
RL = 10KΩ
27
0
0
V
0.8
2.0
0.8
2.0
0.8
2.0
mA
0.5
1.2
0.5
1.2
0.5
1.2
mA
100
25
100
25 100
26
28
5
27
20
V/mV
22
28
5
23
20
V
24
5
100
V
mV
CMRR
70
85
65
80
50
80
dB
PSRR
65
100
65
100
50 100
dB
CS
ISC
ISOURCE
Output Current
Test Conditions
ISINK
VI(DIFF)
f = 1KHz to 20KHz
VI(+) = 1V, VI(-) = 0V
VCC = 15V, VO(P) = 2V
VI(+) = 0V, VI(-) = 1V
VCC = 15V, VO(P) = 2V
VI(+) = 0V, VI(-) = 1V
VCC = 15V, VO(P) = 200mA
120
40
120
40
60
120
40
60
60
dB
mA
10
30
10
30
10
30
mA
10
15
10
15
10
15
mA
12
100
12
100
VCC
µA
VCC
VCC
V
LM258/A, LM358/A, LM2904
DUAL OPERATIONAL AMPLIFIER
ELECTRICAL CHARACTERISTICS
(VCC=5.0V, VEE=GND, unless otherwise specified)
The following specification apply over the range of - 25 °C ≤ T A ≤ + 85 °C for the KA258; and the 0 °C ≤ T A ≤ + 70 °C
for the LM358; and the -40 °C ≤ T A ≤ +85 °C for the LM2904
Characteristic
Symbol
Input Offset Voltage
VIO
VCM = 0V to VCC = 1.5V
VO(P) = 1.4V, RS = 0Ω
VIO
RS = 0Ω
Input Offset Voltage
Drift
Input Offset Current
Input Offset Current
Drift
Input Bias Current
Input Common-Mode
Voltage Range
Large Signal Voltage
Gain
Output Voltage Swing
LM258
7.0
10
IBIAS
40
GV
VO(H)
ISOURCE
Output Current
ISINK
VI(DIFF)
VCC = 26V for 2904
VCC = 5V, RL≥10KΩ
VI(+) = 1V, VI(-) = 0V
VCC = 15V, VO(P) = 2V
VI(+) = 0V, VI(-) = 1V
VCC = 15V, VO(P) = 2V
RL = 10KΩ
25
40
VCC
0
5
27
20
200
=2.0
15
5
27
20
nA
nA
V
V/mV
26
28
mV
pA/ °C
500
VCC
0
=2.0
26
28
40
Unit
µV/ °C
10
500
15
26
27
45
10
=2.0
VCC = 15V, RL≥2.0KΩ
VO(P) = 1V to 11V
VCC = 30V
RL = 2KΩ
7.0
150
300
VCC
0
10.0
7.0
100
VCC = 30V
(KA2904,VCC = 26V)
LM2904
9.0
7.0
∆IIO/∆T
VI(R)
LM358
Min Typ Max Min Typ Max Min Typ Max
IIO
VO(L)
Differential Input
Voltage
Test Conditions
V
28
5
V
20
mV
10
30
10
30
10
30
mA
5
8
5
9
5
9
mA
VCC
VCC
VCC
V
LM258/A, LM358/A, LM2904
DUAL OPERATIONAL AMPLIFIER
ELECTRICAL CHARACTERISTICS
(VCC = 5.0V. VEE=GND. TA=25 °C, unless otherwise specified)
Characteristic
Symbol
Input Offset Voltage
VIO
Input Offset Current
Input Bias Current
Input Common-Mode
Voltage Range
IIO
IBIAS
Supply Current
Large Signal Voltage Gain
Output Voltage Swing
VI(R)
ICC
GV
VOH
VO(L)
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Channel Separation
Short Circuit to GND
Output Current
Differential Input Voltage
LM258A
Test Conditions
Min
LM358A
Max
1.0
3.0
2.0
3.0
mV
2
40
5
45
RL = ∞,VCC = 30V
0.8
30
100
VCC
=1.5
2.0
nA
nA
0.8
15
80
VCC
=1.5
2.0
mA
RL = ∞,over full temperature range
0.5
1.2
0.5
1.2
mA
VCM = 0V to VCC = 1.5V
VO(P) = 1.4V, RS = 0Ω
VCC = 30V
VCC = 15V, RL≥2KΩ
VO = 1V to 11V
VCC = 30V
RL = 2KΩ
VCC = 26V for 2904 RL = 10KΩ
0
50
27
100
85
100
120
40
27
20
V
28
5
65
65
60
V
V/mV
26
28
5
70
65
Typ Max
0
25
26
VCC = 5V, RL≥10KΩ
CMRR
PSRR
CS
f = 1KHz to 20KHz
ISC
V = 1V, VI(-) = 0V
ISOURCE I(+)
VCC = 15V, VO(P) = 2V
VI(+) = 1V, VI(-) = 0V
VCC = 15V, VO(P) = 2V
ISINK
Vin + = 0V, Vin - = 1V
VO(P) = 200mV
VI(DIFF)
100
MIn
Unit
Typ
85
100
120
40
V
20
mV
60
dB
dB
dB
mA
20
30
20
30
mA
10
15
10
15
mA
12
100
12
100
µA
VCC
VCC
V
LM258/A, LM358/A, LM2904
ELECTRICAL CHARACTERISTICS
DUAL OPERATIONAL AMPLIFIER
(VCC = 5.0V, VEE = GND. unless otherwise specified)
The following specification apply over the range of -25 °C ≤ T A ≤ +85 °C for the LM258A; and the 0 °C ≤ T A ≤ +70 °C
for the LM358A
Characteristic
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Offset Current Drift
Input Bias Current
Input Common-Mode
Voltage Range
Symbol
VIO
Typ
VCM = 0V to VCC = 1.5V
VO(P) = 1.4V, RS = 0Ω
LM358A
Max
15
∆IIO/∆T
IBIAS
10
30
200
VI(R)
VO(L)
GV
ISOURCE
Output Current
ISINK
VI(DIFF)
40
VCC = 30V
0
VCC = 30V
RL = 2KΩ
26
VCC = 30V
RL = 10KΩ
27
VCC = 5V, RL≥10KΩ
VCC = 15V, RL≥2.0KΩ
VO(P) = 1V to 11V
VI(+) = 1V, VI(-) = 0V
VCC = 15V, VO(P) = 2V
VI(+) = 1V, VI(-) = 0V
VCC = 15V, VO(P) = 2V
Min
Typ
4.0
7.0
VO(H)
Differential Input Voltage
LM258A
Min
∆VIO/∆T
IIO
Output Voltage Swing
Large Signal Voltage Gain
Test Conditions
100
Vcc
=2.0
Max
5.0
mV
7.0
20
µV/ °C
nA
10
75
300
40
0
200
Vcc
=2.0
26
28
5
27
20
25
Unit
pA/ °C
nA
V
V
28
5
V
20
15
mV
V/mV
10
30
10
30
mA
5
9
5
9
mA
VCC
VCC
V
LM258/A, LM358/A, LM2904
DUAL OPERATIONAL AMPLIFIER
TYPICAL PERFORMANCE CHARACTERISTICS
LM258/A, LM358/A, LM2904
DUAL OPERATIONAL AMPLIFIER
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
KA293/A, LM393/A (KA393/A), LM2903 (KA2903)
DUAL COMPARATOR
DUAL DIFFERENTIAL COMPARATOR
8 DIP
The LM/KA293 series consists of two independent voltage comparators
designed to operate from a single power supply over a wide voltage
range.
FEATURES
•
•
•
•
•
•
•
•
Single Supply Operation: 2V to 36V
Dual Supply Operation: ± 1V to ±18V
Allow Comparison of Voltages Near Ground Potential
Low Current Drain 800µA Typ
Compatible with all Forms of Logic
Low Input Bias Current 25nA Typ
Low Input Offset Current ±5nA WP
Low Offset Voltage ±1mV Typ
8 SOP
9 SIP
BLOCK DIAGRAM
ORDERING INFORMATION
Device
LM393N (KA393)
LM393AN (KA393A)
KA393S
KA393AS
LM393M (KA393D)
KA393AD
KA293
KA293A
KA293S
KA293AS
KA293D
KA293AD
KA2903
KA2903D
KA2903S
Package
Operating Temperature
8 DIP
9 SIP
0 ~ + 75°C
8 SOP
8 DIP
9 DIP
-25 ~ + 85°C
8 SOP
8 DIP
8 SOP
9 SIP
-40 ~ + 85°C
Rev. C
1999 Fairchild Semiconductor Corporation
KA293/A, LM393/A (KA393/A), LM2903 (KA2903)
DUAL COMPARATOR
SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Characteristic
Power Supply Voltage
Differential Input Voltage
Input Voltage
Output Short Circuit to GND
Power Dissipation
Operating Temperature
LM393/LM393A
LM293/LM293A
LM2903
Storage Temperature
Symbol
Value
Unit
VCC
±18 or 36
36
- 0.3 to +36
Continuous
570
V
VI(DIFF)
VI
PD
TOPR
TSTG
0 ~ + 70
- 25 ~ + 85
- 40 ~ + 85
- 65 ~ + 150
V
V
mW
°C
°C
KA293/A, LM393/A (KA393/A), LM2903 (KA2903)
DUAL COMPARATOR
ELECTRICAL CHARACTERISTICS (VCC =5V, TA=25°C, unless otherwise specified)
Characteristic
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Common Mode
Voltage Range
VIO
GV
tRES
NOTE 1
Max
LM293/LM393
Min Typ
±2
±1
±4.0
Max
±5
±9.0
±5
±50
±5
±50
65
±150
250
400
65
±150
250
400
VCC-1.5
0
0
VCC-2
VCC-1.5
0
0
VCC-2
RL = ∞
0.6
1
0.6
1
RL = ∞, VCC = 30V
0.8
2.5
0.8
2.5
VCC =15V, RL≥15KΩ (for large VO(P-P)swing)
VI =TTL Logic Swing
VREF =1.4V, VRL =5V, RL =5.1KΩ
tRES
VRL =5V, RL =5.1KΩ
Output Sink Current
ISINK
VI(-)≥1V, VI(+) =0V, VO(P)≤1.5V
Output Saturation Voltage
VSAT
Output Leakage Current
IO(LKG)
NOTE 1
LM393/A: 0≤T A≤ +70°C
LM293/A: -25≤T A≤ +85°C
LM2903: -40≤T A≤ +85°C
±1
NOTE 1
VI(R)
Voltage Gain
Min Typ
NOTE 1
IBIAS
ICC
LM293A/LM393A
VCM =0V to VCC =1.5V
NOTE 1
VO(P) =1.4V, RS =0Ω
IIO
Supply Current
Large Signal Response
Time
Response Time
Test Conditions
Symbol
VI(-)≥1V, VI(+) =0V
ISINK = 4mA
VI(-) = 0V,
VI(+) = 1V
50
200
50
350
1.4
6
18
160
NOTE 1
VO(P) = 5V
VO(P) = 30V
6
400
nA
nA
V
mA
V/mV
350
ns
1.4
µs
mA
18
160
400
700
0.1
1.0
mV
200
700
0.1
Unit
mV
nA
1.0
µA
KA293/A, LM393/A (KA393/A), LM2903 (KA2903)
DUAL COMPARATOR
ELECTRICAL CHARACTERISTICS (VCC =5V, TA=25°C, unless otherwise specified)
Characteristic
Symbol
Input Offset Voltage
VIO
Input Offset Current
IIO
Input Bias Current
IBIAS
Input Common Mode
Voltage Range
VI(R)
Supply Current
ICC
Voltage Gain
GV
Large Signal Response
Time
Response Time
tRES
Test Conditions
VO(P) =1.4V, RS =0Ω
±7
±9
±15
±5
±50
NOTE 1
±50
65
0.6
±200
250
500
VCC-1.5
VCC-2
1
1
2.5
NOTE 1
NOTE 1
RL = ∞, VCC = 30V
VCC =15V, RL≥15KΩ (for large VO(P-P)swing)
VI =TTL Logic Swing
VREF =1.4V, VRL =5V, RL =5.1KΩ
tRES
VRL =5V, RL =5.1KΩ
VI(-)≥1V, VI(+) =0V, VO(P) ≤1.5V
Output Saturation Voltage
VSAT
NOTE 1
LM393/A: 0≤T A≤ +70°C
LM293/A: -25≤T A≤ +85°C
LM2903: -40≤T A≤ +85°C
0
0
RL = ∞
VI(-)≥1V, VI(+) =0V
ISINK = 4mA
VI(-) = 0V,
VI(+) = 1V
Max
±1
ISINK
IO(LKG)
Typ
NOTE 1
VCM =0V to VCC =1.5V
Output Sink Current
Output Leakage Current
LM2903
Min
25
6
mV
nA
nA
V
mA
100
V/mV
350
ns
1.5
µs
mA
16
160
NOTE 1
VO(P) = 5V
VO(P) = 30V
Unit
400
700
0.1
mV
nA
1.0
µA
KA293/A, LM393/A (KA393/A), LM2903 (KA2903)
TYPICAL PERFORMANCE CHARACTERISTICS
DUAL COMPARATOR
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not
intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOS™
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench®
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in any
manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at any
time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has
been discontinued by Fairchild semiconductor. The
datasheet is printed for reference information only.
LM293/A, LM393/A, LM2903
DUAL COMPARATOR
DUAL DIFFERENTIAL COMPARATOR
8 DIP
The LM293 series consists of two independent voltage comparators
designed to operate from a single power supply over a wide voltage
range.
FEATURES
•
•
•
•
•
•
•
•
Single Supply Operation: 2V to 36V
Dual Supply Operation: ± 1V to ±18V
Allow Comparison of Voltages Near Ground Potential
Low Current Drain 800µA Typ
Compatible with all Forms of Logic
Low Input Bias Current 25nA Typ
Low Input Offset Current ±5nA WP
Low Offset Voltage ±1mV Typ
8 SOP
9 SIP
BLOCK DIAGRAM
ORDERING INFORMATION
Device
LM393N
LM393AN
LM393S
LM393AS
LM393M
LM393AM
LM293N
LM293AN
LM293S
LM293AS
LM293M
LM293AM
LM2903N
LM2903M
LM2903S
Package
Operating Temperature
8 DIP
9 SIP
0 ~ + 75°C
8 SOP
8 DIP
9 DIP
-25 ~ + 85°C
8 SOP
8 DIP
8 SOP
9 SIP
-40 ~ + 85°C
Rev. B
1999 Fairchild Semiconductor Corporation
LM293/A, LM393/A, LM2903
DUAL COMPARATOR
SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Characteristic
Power Supply Voltage
Differential Input Voltage
Input Voltage
Output Short Circuit to GND
Power Dissipation
Operating Temperature
LM393/LM393A
LM293/LM293A
LM2903
Storage Temperature
Symbol
Value
Unit
VCC
±18 or 36
36
- 0.3 to +36
Continuous
570
V
VI(DIFF)
VI
PD
TOPR
TSTG
0 ~ + 70
- 25 ~ + 85
- 40 ~ + 85
- 65 ~ + 150
V
V
mW
°C
°C
LM293/A, LM393/A, LM2903
DUAL COMPARATOR
ELECTRICAL CHARACTERISTICS (VCC =5V, TA=25°C, unless otherwise specified)
Characteristic
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Common Mode
Voltage Range
VIO
GV
Output Sink Current
NOTE 1
±5
±9.0
±50
±5
±50
65
±150
250
400
65
±150
250
400
VCC-1.5
VCC-2
VCC-1.5
0
0
VCC-2
0.6
1
0.6
1
0.8
2.5
0.8
2.5
VI(-)≥1V, VI(+) =0V, VO(P)≤1.5V
6
IO(LKG)
±1
RL = ∞, VCC = 30V
ISINK
Output Leakage Current
±2
Max
RL = ∞
tRES
VSAT
LM293/LM393
Min Typ
±5
0
0
50
tRES
Max
±4.0
VCC =15V, RL≥15KΩ (for large VO(P-P)swing)
VI =TTL Logic Swing
VREF =1.4V, VRL =5V, RL =5.1KΩ
VRL =5V, RL =5.1KΩ
Output Saturation Voltage
NOTE 1
LM393/A: 0≤T A≤ +70°C
LM293/A: -25≤T A≤ +85°C
LM2903: -40≤T A≤ +85°C
±1
NOTE 1
VI(R)
Voltage Gain
Min Typ
NOTE 1
IBIAS
ICC
LM293A/LM393A
VCM =0V to VCC =1.5V
NOTE 1
VO(P) =1.4V, RS =0Ω
IIO
Supply Current
Large Signal Response
Time
Response Time
Test Conditions
Symbol
VI(-)≥1V, VI(+) =0V
ISINK = 4mA
VI(-) = 0V,
VI(+) = 1V
200
200
mV
nA
nA
V
mA
V/mV
350
350
ns
1.4
1.4
µs
mA
18
160
NOTE 1
VO(P) = 5V
VO(P) = 30V
50
Unit
6
400
18
160
700
0.1
400
700
0.1
1.0
mV
nA
1.0
µA
LM293/A, LM393/A, LM2903
DUAL COMPARATOR
ELECTRICAL CHARACTERISTICS (VCC =5V, TA=25°C, unless otherwise specified)
Characteristic
Symbol
Input Offset Voltage
VIO
Input Offset Current
IIO
Input Bias Current
IBIAS
Input Common Mode
Voltage Range
VI(R)
Supply Current
ICC
Voltage Gain
GV
Test Conditions
Typ
Max
±1
±7
NOTE 1
±9
±15
±5
±50
NOTE 1
±50
65
0.6
±200
250
500
VCC-1.5
VCC-2
1
1
2.5
VCM =0V to VCC =1.5V
VO(P) =1.4V, RS =0Ω
NOTE 1
NOTE 1
RL = ∞, VCC = 30V
tRES
Output Sink Current
ISINK
VI(-)≥1V, VI(+) =0V, VO(P) ≤1.5V
Output Saturation Voltage
VSAT
Output Leakage Current
NOTE 1
LM393/A: 0≤T A≤ +70°C
LM293/A: -25≤T A≤ +85°C
LM2903: -40≤T A≤ +85°C
tRES
IO(LKG)
0
0
RL = ∞
VCC =15V, RL≥15KΩ (for large VO(P-P)swing)
VI =TTL Logic Swing
VREF =1.4V, VRL =5V, RL =5.1KΩ
VRL =5V, RL =5.1KΩ
Large Signal Response
Time
Response Time
LM2903
Min
VI(-)≥1V, VI(+) =0V
ISINK = 4mA
VI(-) = 0V,
VI(+) = 1V
25
6
mV
nA
nA
V
mA
100
V/mV
350
ns
1.5
µs
mA
16
160
NOTE 1
VO(P) = 5V
VO(P) = 30V
Unit
400
700
0.1
mV
nA
1.0
µA
LM293/A, LM393/A, LM2903
TYPICAL PERFORMANCE CHARACTERISTICS
DUAL COMPARATOR
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
LM311 (KA311)
SINGLE COMPARATOR
8 DIP
VOLTAGE COMPARATOR
The LM311 series is a monolithic, low input current
voltage comparator.
The device is also designed to operate from dual or
single supplies voltage
FEATURE
•
•
•
•
•
•
Low input bias current : 250nA (Max)
Low input offset current : 50nA (Max)
Differential Input Voltage : ±30V.
Power supply voltage : single 5.0V supply to ±15V.
Offset voltage null capability.
Strobe capability.
8 SOP
BLOCK DIAGRAM
ORDERING IN FORMATION
Device
Package
LM311N
8 DIP
LM311M
8 SOP
Operating Temperature
0 ~ +70°C
SCHEMATIC DIAGRAM
Rev. B
1999 Fairchild Semiconductor Corporation
LM311 (KA311)
SINGLE COMPARATOR
ABSOLUTE MAXIMUM RATINGS
Characteristic
Total Supply Voltage
Output to Negative Supply Voltage KA311
Ground to Negative voltage
Differential Input Voltage
Input Voltage
Output Short Circuit Duration
Power Dissipation
Operating Temperature Range
Storage Temperature Range
Symbol
Value
Unit
VCC
VO - VEE
VEE
VI(DIFF)
VI
36
40
-30
30
±15
10
500
0 ~ +70
- 65 ~ +150
V
V
V
V
V
sec
mW
°C
°C
PD
TOPR
TSTG
ELECTRICAL CHARACTERISTICS (VCC = 15V, TA = 25°C, unless otherwise specified)
Characteristic
Symbol
Input Offset Voltage
VIO
Input Offset Current
IIO
Input Bias Current
IBIAS
Voltage Gain
Response Time
GV
tRES
Saturation Voltage
VSAT
Test Conditions
Min
RS≤50KΩ
Max
1.0
7.5
NOTE 1
6
NOTE 1
100
NOTE 1
40
10
50
70
250
300
200
200
0.75
1.5
VCC≥4.5V, VEE = 0V
ISINK =8mA, VI≥-10mV, NOTE 1
0.23
0.4
0.2
NOTE 2
IO =50mA, VI≤-10mV
Strobe “NO” Current
Typ
ISTR(ON)
ISINK
ISTR =3mA, VI≥10mV
VO(P) =35V, VEE =VGND =-5V
Input Voltage Range
VI(R)
NOTE 1
Positive Supply Current
Negative Supply Current
Strobe Current
ICC
IEE
ISTR
-14.5
to 13.0
NOTE 1. 0 ≤ TA ≤ +70°C
2. The response time specified is for a 100mV input step with 5mV over drive.
-14.7
to 13.8
3.0
-2.2
3
mV
nA
nA
V/mV
ns
3
Output Leakage Current
Unit
V
mA
50
nA
V
7.5
-5.0
mA
mA
mA
LM311 (KA311)
SINGLE COMPARATOR
TYPICAL PERFORMANCE CHARACTERISTICS
LM311 (KA311)
SINGLE COMPARATOR
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
LM317L (KA317)
ADJUSTABLE VOLTAGE REGULATOR (POSITIVE)
3-TERMINAL 0.1A POSITIVE ADJUSTABLE
REGULATOR
TO-92
The LM317L is a 3-terminal adjustable positive voltage regulator
capable of supplying in excess of 100mA over an output voltage
range of 1 .2V to 37V. This voltage regulator is exceptionally
easy to use and requires only two external resistors to set the
output voltage.
1:Adj 2:Output 3:Input
ORDERING INFORMATION
FEATURES
• Output current in excess of 100mA
• Output adjustable between 1.2V and 37V
• Internal thermal-overload protection
• Internal short-circuit current-limiting
• Output transistor safe-area compensation
• Floating operation for high-voltage applications
Device
Package
Operating Temperature
LM317LZ
TO-92
0 ~ 125°C
BLOCK DIAGRAM
Vin 3
+
-
Voltage
Reference
Protection
Circuitry
Rlimit
2 Vo
1
Vadj
Rev. B
1999 Fairchild Semiconductor Corporation
LM317L (KA317)
ADJUSTABLE VOLTAGE REGULATOR (POSITIVE)
ABLOLUTE MAXIMUM RATINGS
Characteristic
Input-Output Voltage Differential
Power Dissipation
Operating Temperature Range
Storage Temperature Range
Symbol
Value
Unit
VI - VO
PD
TOPR
TSTG
40
Internally limited
0 ~ +125
-65 ~+125
V
W
°C
°C
ELECTRICAL CHARACTERISTICS
(VI - VO = 5V, IO = 40mA, 0°C ≤ T J ≤ +125°C, PDMAX = 625mW, unless otherwise specified)
Characteristic
*Line Regulation
*Load Regulation
Adjustment Pin Current
Symbol
∆VO
∆VO
Test Conditions
Min
TA = +25°C
3V ≤ VI ≤ VO ≤ 40V
3V ≤ VI ≤ VO ≤ 40V
TA = +25°C
10mA ≤ IO ≤100mA
VO ≤ 5V
VO ≥5V
10mA ≤ IO ≤ 100mA
VO ≤ 5V
VO ≥ 5V
IADJ
Adjustment Pin Current
Change
∆IADJ
Reference Voltage
VREF
Temperature Stability
Minimum Load Current to
Maintain Regulation
STT
IL(MIN)
RMS Noise, % of VOUT
eN
Ripple Rejection
RR
Long-Term Stability
ST
3V ≤ VI - VO ≤ 40V
10mA ≤ IO ≤ 100mA
PD < PDMAX
3V < VI - VO <40V
10mA ≤ IO ≤100mA
PD ≤ PDMAX
1.20
Typ
Max
0.01
0.04
0.02
0.07
5
0.1
25
0.5
mV
%/ VO
20
0.3
70
1.5
mV
%/ VO
50
100
µA
0.2
5
µA
1.25
1.30
V
VI - VO = 5V
PD < PDMAX
VI - VO = 40V
PD < PDMAX, TA = +25°C
TA =+ 25°C
10Hz < f <10KHz
VO = 10V, f = 120Hz
without CADJ
CADJ = 10µF
TJ = +125 °C, 1000 Hours
3.5
100
200
25
50
66
%/V
%
0.7
VI - VO = 40V
Unit
10
mA
0.003
%/ VO
65
80
dB
0.3
%
* Load and Line regulation are specified at constant junction temperature. Change in VO due to heating effects
must be taken into account separately. Pulse testing with low duty cycle is used.
LM317L (KA317)
ADJUSTABLE VOLTAGE REGULATOR (POSITIVE)
TYPICAL APPLICATIONS
Fig. 1 5V Electronic Shutdown Regulator
KA317L
D1 protects the device during an input short circuit.
Fig. 2 Slow Turn-On Regulator
KA317L
LM317L (KA317)
Fig. 3 Current Regulator
KA317L
PACKAGE DIMENSION
ADJUSTABLE VOLTAGE REGULATOR (POSITIVE)
LM317L (KA317)
ADJUSTABLE VOLTAGE REGULATOR (POSITIVE)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
LM337 (KA337) ADJUSTABLE VOLTAGE REGULATOR (NEGATIVE)
3-TERMINAL 1.5A NEGATIVE ADJUSTABLE REGULATOR
TO-220
The LM337 is a 3-terminal negative adjustable regulator.
It supply in excess of 1.5A over an output voltage range of
-1.2V to - 37V. This regulator requires only two external
resistor to set the output voltage. Included on the chip are
current limiting, thermal overload protection and safe area
compensation.
FEATURES
• Output current In excess of 1.5A
• Output voltage adjustable between -1.2V and - 37V
• Internal thermal-overload protection
• Internal short-circuit current limiting
• Output transistor safe-area compensation
• Floating operation for high-voltage applications
• Standard 3-pin TO-220 package
1:Adj 2:Intput 3:Output
ORDERING INFORMATION
Device
Package
Operating Temperature
LM337T
TO-220
0 ~ + 125°C
BLOCK DIAGRAM
Vin 3
+
-
Volta ge
Reference
Protection
Circuitry
Rlimit
2 Vo
1
Vadj
Rev. B
1999 Fairchild Semiconductor Corporation
LM337 (KA337) ADJUSTABLE VOLTAGE REGULATOR (NEGATIVE)
ABSOLUTE MAXIMUM RATINGS
Characteristic
Input-Output Voltage Differential
Power Dissipation
Operating Temperature Range
Storage Temperature Range
Symbol
Value
Unit
VI - VO
PD
T OPR
T STG
40
Internally limited
0 ~ +125
-65 ~+125
V
W
°C
°C
ELECTRICAL CHARACTERISTICS
(VI - VO = 5V, IO = 40mA, 0°C ≤ T J ≤ +125°C, PDMAX = 20W, unless otherwise specified)
Characteristic
Line Regulation
Symbol
VO
Load Regulation
VO
Adjustable Pin Current
IADJ
Adjustable Pin Current
∆IADJ
Reference Voltage
VREF
Temperature Stability
Minimum Load Current
to Maintain Rejection
STT
Test Conditions
Min
T A = +25°C
- 40V ≤VO - VI ≤ -3V
- 40V ≤ VO - VI ≤ -3V
T A = +25°C
10mA ≤ IO ≤0.5A
10mA ≤ IO ≤1.5A
T A =+ 25°C
10mA ≤ IO ≤1.5A
- 40V ≤ VO - VI ≤ -3V
en
Long Term Stability
ST
Thermal Resistance
Junction to Case
REJC
Max
0.01
0.04
0.02
0.07
15
50
15
50
150
100
µA
2
5
µA
T A =+ 25°C
-1.213
-1.250
-1.287
- 40V ≤ VO - V I ≤ -3V
10mA ≤ IO ≤ 1.5A
-1.200
-1.250
-1.300
0.6
2.5
1.5
10
6
- 40V ≤ VO - VI ≤ -3V
- 10V ≤ VO - VI ≤ -3V
Output Noise
Ripple Rejection Ratio
Typ
T A =+25°C 10Hz ≤ f ≤10KHz
VO = -10V, f = 120Hz
CADJ = 10µF
T J = 125°C ,1000Hours
66
3 ×VOUT
60
77
0.3
Unit
%/ V
mV
V
%
mA
6
V/10
1
4
.
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects
must be taken into account separately. Pulse testing with low duty is used
dB
%
°C/ W
LM337 (KA337) ADJUSTABLE VOLTAGE REGULATOR (NEGATIVE)
TYPICAL APPLICATIONS
Fig. 1 Programmable Regulator
IPROG
R2
Ci
0. 1µ
µF
+
+
I adj
R1
Co
1µ
µF
Vadj
-VI
VI
KA337
Vo
-Vo
* Ci is required if regulator is located more then 4
inches from power supply filter.
A 1.0µF solid tantalum or 10µF aluminum electrolytic is recommended.
Co is necessary for stability. A 1.0µF solid tantalum or 10µF aluminum electrolytic
is recommended.
VO = -1.25V (1+ R2/ R 1 )
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
LF353 (LM353, KA353)
DUAL OPERATIONAL AMPLIFIER (JFET)
DUAL OPERATIONAL AMPLIFER
8 DIP
The LF353 is a JFET input operational amplifier with an internally
compensated input offset voltage. The JFET input device provides
with bandwidth, low input bias currents and offset currents.
FEATURES
•
•
•
•
•
Internally trimmed offset voltage: 10mV
Low input bias current: 50pA
Wide gain bandwidth: 4MHz
High slew rate: 13V/µs
12
High Input impedance: 10 Ω
8 SOP
BLOCK DIAGRAM
ORDERING IN FORMATION
i
Device
LF353N
LF353M
LF353S
SCHEMATIC DIAGRAM
Package
Operating Temperature
8 DIP
8 SOP
9 SIP
0 ~ + 70°C
(One Section Only)
Rev. B
1999 Fairchild Semiconductor Corporation
LF353 (LM353, KA353)
DUAL OPERATIONAL AMPLIFIER (JFET)
ABSOLUTE MAXIMUM RATINGS
Characteristics
Symbol
Value
Unit
Power Supply Voltage
Differential Input Voltage
Input Voltage Range
VCC
±18
V
VI(DIFF)
30
V
VI
±15
V
Output Short Circuit Duration
Continuous
PD
500
mW
Operating Temperature Range
TOPR
0 ~ +70
°C
Storage Temperature Range
TSTG
-65 ~ +150
°C
Power Dissipation
ELECTRICAL CHARACTERISTICS
(VCC =+15V, VEE= -15V, TA=25 °C, unless otherwise specified)
Characteristic
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Symbol
VIO
∆VIO/∆T
RS=10KΩ
RS=10KΩ
IIO
Input Bias Current
IBIAS
Input Resistance
RI
Large Signal Voltage Gain
Test Conditions
GV
Output Voltage Swing
VO(P.P)
Input Voltage Range
VI(R)
Min
0 °C ≤T A≤+70 °C
RL = 2KΩ
0 °C ≤T A≤+70 °C
±13.5
V
dB
100
3.6
13
GV = 1
f = 1Hz ~ 20Khz
(Input referenced)
RS = 100Ω
f = 1KHz
f = 1KHz
V
dB
6.5
mA
4
V/µs
MHz
120
120
dB
16
16
nV/√Hz
0.01
0.01
pA/√ Hz
GBM
INI
V/mV
±15/-12
100
70
Equivalent Input Noise Current
Ω
100
15
RS≥10KΩ
VNI
pA
nA
±12
PSRR
Equivalent Input Noise Voltage
200
8
RL = 10KΩ
Power Supply Rejection Ratio
CS
50
12
RS≥10KΩ
Channel Seperation
µV/ °C
pA
nA
10
25
mV
100
4
0 °C ≤T A≤+70 °C
VO(P-P) = ±0V
Unit
25
0 °C ≤T A≤+70 °C
CMRR
Gain-Bandwidth Product
10
10
Common Mode Rejection Ratio
ICC
SR
Max
5.0
0 °C ≤T A≤+70 °C
±11
70
Power Supply Current
Slew Rate
Typ
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
LM442/A
DUAL OPERATIONAL AMPLIFIER (JFET)
DUAL JFET INPUT OPERATIONAL
8 DIP
FEATURES
9 SIP
•
•
•
•
•
Low supply current: 400pA MAX
Low input bias Current: 50pA MAX
Low input offset voltage: 1mV MAX
High slew rate: 1V/µs
High gain bandwidth: 1MHz
BLOCK DIAGRAM
ORDERING INFORMATION
Device
LM442N
LM442AN
LM442S
LM442AS
Package
Operating Temperature
8 DIP
0 ~ +70°C
9 SIP
SCHEMATIC DIAGRAM (One Section Only)
Rev. B
1999 Fairchild Semiconductor Corporation
LM442/A
DUAL OPERATIONAL AMPLIFIER (JFET)
ABSOLUTE MAXIMUM RATINGS
Characteristics
Symbol
Power Supply Voltage LM442
LM442A
Differential Input Voltage
Input Voltage range
Output Short Circuit Duration
Power Dissipation
Operating Temperature Range LM442/A
Storage Temperature Range
Value
Unit
±18
VCC
V
±20
30
VI(DIFF)
VI
V
V
±15
Continuous
670
0 ~ + 70
-65 ~ + 150
PD
TOPR
TSTG
mW
°C
°C
ELECTRICAL CHARACTERISTICS
(TA=25 °C, unless otherwise specified)
LM442A
Characteristic
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Symbol
VIO
∆VIO/∆T
IBIAS
Large Signal Voltage Gain
GV
Output Voltage Swing
VO(P-P)
Input Voltage Range
VI(R)
Min
RS =10KΩ
Max
Typ
Max
0.5
1.0
1.0
5.0
7.5
RS = 10KΩ
7
10
7
5
25
15
50
30
5
Note 1
10
Note 1
RL = 10KΩ
VO(P.P)= ±0V
Note 1
RS = 10KΩ
200
200
±17
±18
+18
-17
±12
±13
+15
-12
V
100
70
95
dB
70
90
dB
RS≤10KΩ
80
12
Supply Current
ICC
300
Slew Rate
SR
Equivalent Input Noise
Current
INI
f = 1KHz
NOTE 1. LM442/A : 0≤T A≤+70 °C
±11
100
10
RS = 100Ω
f = 1KHz
pA
15
PSRR
VNI
pA
25
80
Equivalent Input Noise
Voltage
µV/ °C
50
15
100
30
200
RS≤10KΩ
f = 1Hz-20KHz
(input referenced)
mV
200
±16
Gain Bandwidth Product
10
Unit
25
CMRR
CS
Min
50
RI
Channel Separation
LM442
Typ
Note 1
IIO
Large Signal Voltage Gain
Common-Mode Rejection
Ratio
Power Supply Rejection
Ratio
Input Resistance
Test Conditions
V
12
Ω
10
400
400
0.8
1
0.6
1
0.8
1
0.6
1
120
V/mV
500
µA
V/µS
MHz
120
dB
35
35
nV/
√ Hz
0.01
0.01
pA /
√ Hz
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
LM555/I
SINGLE TIMER
SINGLE TIMER
8 DIP
The LM555/I is a highly stable controller capable of producing accurate
timing pulses. With monostable operation, the time delay is controlled
by one external and one capacitor. With astable operation, the frequency
and duty cycle are accurately controlled with two external resistors and
one capacitor.
FEATURES
•
•
•
•
•
High Current Drive Capability (= 200mA)
Adjustable Duty Cycle
Temperature Stability of 0.005%/°C
Timing From µSec To Hours
Turn Off Time Less Than 2µSec
8 SOP
APPLICATIONS
•
•
•
•
Precision Timing
Pulse Generation
Time Delay Generation
Sequential Timing
BLOCK DIAGRAM
ORDERING INFORMATION
Device
Package
LM555CN
LM555CM
LM555CIN
LM555CIM
8 DIP
8 SOP
8 DIP
8 SOP
Operating Temperature
0 ~ +70°C
-40 ~ +85°C
Rev. B
1999 Fairchild Semiconductor Corporation
LM555/I
SINGLE TIMER
ABSOLUTE MAXIMUM RATINGS
(TA = 25°C)
Characteristic
Supply Voltage
Lead Temperature (soldering 10sec)
Power Dissipation
Operating Temperature Range LM555C
LM555CI
Storage Temperature Range
Symbol
Value
VCC
TLEAD
16
300
PD
600
0 ~ + 70
- 40 ~ + 85
- 65 ~ + 150
TOPR
TSTG
Unit
V
°C
mW
°C
°C
°C
ELECTRICAL CHARACTERISTICS
(TA = 25°C, VCC = 5 ~ 15V, unless otherwise specified)
Characteristic
Supply Voltage
Supply Current
∗ (low stable)
1
Symbol
ICC
∗Timing Error
(Monostable)
2
Initial Accuracy
Drift with Temperature
Drift with Supply Voltage
ACCUR
∆t/∆T
∆t/∆VCC
∗Timing Error
(astable)
2
Intial Accuracy
Drift with Temperature
Drift with Supply Voltage
ACCUR
∆t/∆T
∆t/∆VCC
Control Voltage
VC
Threshold Voltage
VTH
∗ Threshold Current
Trigger Voltage
Trigger Voltage
Trigger Current
VTR
VTR
ITR
Reset Voltage
Reset Current
VRST
IRST
3
Test Conditions
Typ
Max
Unit
VCC = 5V, RL = ∞
3
16
6
V
mA
VCC = 15V, RL = ∞
7.5
15
mA
RA = 1KΩ to
100KΩ
C = 0.1µF
1.0
50
0.1
3.0
%
ppm/°C
%/V
VCC
Min
4.5
RA = 1KΩ to 100KΩ
C = 0.1µF
0.5
%
ppm/°C
%/V
2.25
150
0.3
10.0
3.33
10.0
3.33
0.1
11.0
4.0
V
V
V
V
0.25
µA
V
V
VCC = 15V
VCC = 5V
VCC = 15 V
VCC = 5V
9.0
2.6
VCC = 5V
VCC = 15V
VTR = 0V
1.1
4.5
1.67
5
0.01
2.2
5.6
2.0
0.4
0.7
0.1
1.0
0.4
ITH
µA
V
mA
LM555/I
SINGLE TIMER
ELECTRICAL CHARACTERISTICS
(TA = 25°C, VCC = 5 ~ 15V, unless otherwise specified)
Characteristic
Low Output Voltage
High Output Voltage
Rise Time of Output
Fall Time of Output
Discharge Leakage Current
Symbol
VOL
VOH
tR
tF
ILKG
Test
Conditions
VCC = 15V
ISINK = 10mA
ISINK = 50mA
VCC = 5V
ISINK = 5mA
VCC = 15V
ISOURCE = 200mA
ISOURCE = 100mA
VCC = 5V
ISOURCE = 100mA
Min
12.75
2.75
Typ
Max
Unit
0.06
0.3
0.25
0.75
V
V
0.05
0.35
V
12.5
13.3
V
V
3.3
100
100
20
V
ns
ns
nA
100
Notes:
1. Supply current when output is high is typically 1mA less at VCC = 5V
2. Tested at VCC = 5.0V and VCC = 15V
3. This will determine maximum value of RA + RB for 15V operation, the max. total R = 20MΩ, and for 5V operation the
max. total R = 6.7MΩ
APPLICATION CIRCUIT
LM555/I
SINGLE TIMER
APPLICATION NOTE
The application circuit shows astable mode.
Pin 6 (threshold) is tied to Pin 2 (trigger) and Pin 4 (reset) is tied to VCC (Pin 8).
The external capacitor C1 of Pin 6 and Pin 2 charges through RA, RB and discharges through RB only.
In the internal circuit of the LM555 one input of the upper comparator is the 2/3 VCC (∗R1 =R2=R3, another input if it
If it is connected Pin 6.
As soon as charging C1 is higher than 2/3 Vcc, discharge transistor Q1 turns on and C1 discharges to collector of
transistor Q1.
Therefore, the flip-flop circuit is reset and output is low.
One input of lower comparator is the 1/3 VCC, discharge transistor Q1 turn off and C1 charges through RA and RB.
Therefore, the flip-flop circuit is set and output is high.
So to say, when C1 charges through RA and R1 output is high and when C1 discharges through RB output is low.
The charge time (output is high) T1 is 0.693 (RA+RB) C1 and the discharge time (output is low) T2 is 0.693 (RB C1).
CC
(In VCC-1/3V
= 0.693)
VCC-2/3VCC
Thus the total period time T is given by
T=T1 +T2 = 0.693 (RA +2RB) C1.
Then the frequency of astable mode is given by
f=
=1
T
1.44
(RA + 2RB)C1
The duty cycle is given by
D.C =
T
=2
T
RB
RA + 2RB
If you make use of the LM556 you can make two astable modes.
LM555/I
SINGLE TIMER
Astable Operation
The LM555 can free run as a mulitivibrator by triggering itself; refer to Fig.2. The output can swing from VDD to GND and have
50 duty cycle square wave. Less than 1% frequency deviation can be observed, over a voltage range of 2 to 5V. f-1/1.4RC
Ο VCC
10KΩ
GND
1
8
2
7
TRIGGER
///
Ο VCC
DISCHARGE
•
Ο
ALTERNATE
OUTPUT
LM555C
Ο
OUTPUT
•
THRESHOLD
3
6
4
5
Ο
VCC
RESET
•
•
Fig. 1. Astable Operation
C
///
Monostable Operation
The LM555 can be used as a one-short, i.e. monostable multivibrator. Initially, because the inside discharge transistor is on
state, external timing capacitor is held to GND potential. Upon application of a negative TRIGGER pulse pin 2, the intern
discharge transistor is off state and the voltage across the capacitor increases with time constant T = RAC and OUTPUT
goes to high state. When the voltage across the capacitor equals 2/3VCC the inner comparator is reset by THRESHOLD
input and the discharge transistor goes to on state, which in turn discharges the capacitor rapidly and drives the OUTPUT
to its low state.
VCC ( 18V)
Ο
RA
8
1
///
TRIGGER
Ο
OUTPUT
RESET
Ο
2
7
•
DISCHARGE
LM555C
3
6
4
5
THRESHOLD
•
CONTROL
VOLTAGE
OPTION
CAPACITOR
C
///
Fig. 2. Monostable Operation
•
///
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
LM556/I
DUAL TIMER
DUAL TIMER
14 DIP
The LM556/I series dual monolithic timing circuits are a highly stable
controller capable of producing accurate time delays or oscillation.
The LM556 is a dual LM555. Timing is provided an external resistor
and capacitor for each timing function.
The two timers operate independently of each other, sharing only
VCC and ground.
The circuits may be triggered and reset on falling wave forms. The
output structures may sink or source 200mA.
FEATURES
•
•
•
•
•
•
•
Replaces Two LM555C Timers
Operates in Both Astable and Monostable Modes
High Output Current
TTL Compatible
Timing From Microsecond to Hours
Adjustable Duty Cycle
Temperature Stability Of 0.005% Per °C
ORDERING INFORMATION
Device
APPLICATIONS
•
•
•
•
•
•
•
•
•
•
Precision Timing
Pulse Shaping
Pulse Width Modulation
Frequency Division
Traffic Light Control
Sequential Timing
Pulse Generator
Time Delay Generator
Touch Tone Encoder
Tone Burst Generator
Package
Operating Temperature
LM556CN
14 DIP
0 ~ + 70°C
LM556ICN
14 DIP
-40 ~ + 85°C
BLOCK DIAGRAM
Rev. B
1999 Fairchild Semiconductor Corporation
LM556/I
DUAL TIMER
ABSOLUTE MAXIMUM RATINGS (TA = 25°°C)
Characteristic
Supply Voltage
Lead Temperature (soldering 10sec)
Power Dissipation
Operating Temperature Range LM556
LM556I
Storage Temperature Range
Symbol
Value
VCC
TLEAD
16
300
PD
600
0 ~ + 70
- 40 ~ + 85
TOPR
TSTG
Unit
V
°C
mW
°C
°C
°C
- 65 ~ + 150
ELECTRICAL CHARACTERISTICS
(TA = 25°C, VCC = 5 ~ 15V, unless otherwise specified)
Characteristic
Symbol
Supply Voltage
VCC
∗1 Supply Current (two timers)
(low state)
ICC
∗2 Timing Error (monostable)
Initial Accuracy
Drift with Temperature
Drift with Supply Voltage
ACCUR
∆t/∆T
∆t/∆VCC
Control Voltage
VC
Threshold Voltage
VTH
∗3 Threshold Voltage
ITH
Trigger Voltage
Trigger Current
∗5 Reset Voltage
Reset Current
Low Output Voltage
VTR
ITR
Test Conditions
Typ
Max
Unit
5
16
16
12
30
V
mA
mA
4.5
VCC = 5V, RL = ∞
VCC = 15V, RL = ∞
RA = 2kΩ to 100kΩ
C = 0.1µF
T = 1.1RC
%
ppm/°C
%/V
0.75
50
0.1
10.0
3.33
10.0
3.33
30
11.0
4.0
11.2
4.2
250
V
V
V
V
nA
V
V
VCC = 15V
VCC = 5V
VCC = 15V
VCC = 5V
9.0
2.6
8.8
2.4
VCC = 15V
VCC = 5V
VTH = 0V
4.5
1.1
5.0
1.6
0.01
5.6
2.2
2.0
0.4
0.6
1.0
µA
V
0.03
0.6
mA
0.1
0.4
2.0
2.5
0.25
0.75
3.2
V
V
V
V
0.25
0.15
0.35
0.25
V
V
VRST
IRST
VOL
Min
VCC = 15V
ISINK = 10mA
ISINK = 50mA
ISINK = 100mA
ISINK = 200mA
VCC = 5V
ISINK = 8mA
ISINK = 5mA
LM556/I
DUAL TIMER
ELECTRICAL CHARACTERISTICS
(TA = 25°C, VCC = 5 ~ 15V, unless otherwise specified)
Characteristic
High Output Voltage
Symbol
VOH
Test Conditions
VCC = 15V
ISOURCE = 200mA
ISOURCE = 100mA
VCC = 5V
ISOURCE = 100mA
Min
Typ
12.75
12.5
13.3
Rise Time of Output
Fall Time of Output
Discharge Leakage Current
ILKG
3.3
100
100
10
∗4 Matching Characteristics
Initial Accuracy
Drift with Temperature
Drfit with Supply Voltage
ACCUR
∆t/∆T
∆t/∆VCC
1.0
10
0.2
∗2 Timing Error (astable)
Initial Accuracy
Drift with Temperature
Drift with Supply Voltage
tR
tF
ACCUR
∆t/∆T
RA,RB = 1kΩ to 100kΩ
C = 0.1µF
VCC = 15V
2.75
Max
Unit
V
V
300
300
100
2.0
0.5
2.25
150
0.3
Notes:
∗1. Supply current when output is high is typically 1.0mA less at VCC = 5V
∗2. Tested at VCC = 5V and VCC = 15V
∗3. This will determine the maximum value of RA + RB for 15V operation.
The maximum total R = 20MΩ, and for 5V operation the maximum total R = 6.6MΩ.
∗4. Matching characteristics refer to the difference between performance characteristics of each timer section in
the monostable mode.
∗5. As reset voltage lowers, timing is inhibited and then the output goes low.
V
ns
ns
nA
%
ppm/°C
%/V
%
ppm/°C
%/V
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
LM710/I
SINGLE COMPARATOR
HIGH SPEED VOLTAGE COMPARATOR
14 DIP
The LM710/I is a high speed voltage comparator intended for use as an
accurate, low-level digital level sensor or as a replacement for operational amplifiers in comparator applications where speed is of prime
importance.
The output of the comparator is compatible with all integrated logic
forms.
The LM710/I is useful as pulse height discriminators. a variable threshold
Schmitt trigger, voltage comparator in high-speed A/D converters, a
memory sense amplifier or a high noise immunity line receiver.
14SOP
FEATURES
l Low offset voltage: 5mV
l High gain: 1000 V/V
l High speed: 40ns Typ
BLOCK DIAGRAM
ORDERING INFORMATION
Package
Operating Temperature
LM710N
Device
14 DIP
0 ~ 70°C
LM710M
14 SOP
LM710IN
14 DIP
LM710IM
14 SOP
-25 ~ 85°C
SCHEMATIC DIAGRM
Rev. B
1999 Fairchild Semiconductor Corporation
LM710/I
SINGLE COMPARATOR
ABSOLUTE MAXIMUM RATINGS
Characteristic
Symbol
Value
Unit
VCC
VEE
IPK
+14
-7
10
10
5
±7
500
0 ~ + 70
- 25 ~ + 85
- 65 ~ + 150
V
V
mA
Sec
V
V
mW
°C
°C
°C
Positive Supply Voltage
Negative Supply Voltage
Peak Output Current
Output Short Circuit Duration
Differential Input Voltage
Input Voltage
Power Dissipation
Operating Temperature Range LM710
LM710I
Storage Temperature Range
VI(DIFF)
VI
PD
T STG
TSTG
ELECTRICAL CHARACTERISTICS
Characteristics
Symbol
(VCC = +12V, VEE= -6V, T = 25°C, unless otherwise specified)
Test Conditions
LM710I
Min
Input Offset voltage
VIO
RS≤200Ω,
Note1
Max
0.6
2.0
Note 2
Input Offset Current
(Note 1)
Input Bias Current
IIO
NOTE 1
1250
0.75
1.8
5.0
27
1800
± 5.0
80
95
Note 2
IBIAS
Note 2
Large Signal Voltage Gain
Gv
LM710
Typ
Min
3.0
3.0
7.0
20
45
UNIT
Typ
Max
1.6
5.0
1.8
1000
7.0
25
1700
± 5.0
70
94
6.5
5.0
7.5
25
40
mV
nA
nA
V/V
Note 2
Input Voltage Range
Common Mode Rejection Ratio
VI(R)
VCC = -7V
CMRR RS≤200Ω, NOTE 2
VID(R)
V
dB
Positive Output Level
VO(H)
0 ≤ IO ≤5mA, VI ≥ 5mV
± 5.0
2.5
2.9
4.0
± 5.0
2.5
2.9
4.0
Negative Output Level
VO(L)
VI≥5mV
-1.0
-0.5
0
-1.0
-0.5
0
Output Sink Current
ISINK
VO(P) =0V, VI ≥ 5mV
2.0
2.2
1.6
2.2
Positive Supply Current
ICC
Negative Supply Current
Power Consumption
Response Time
IEE
PD
tRES
VO(P) ≤ 0V
VO(P) = 0V, VI = 5mV
VO(P) = 0V, VI =10mV
(Note 3)
Differential Input Voltage Range
V
V
V
mA
4.7
9.0
4.7
9.0
mA
4.0
80
40
7.0
150
4.0
7.0
150
mA
mV
ns
40
Note 1. The input offset voltage and input offset current are specified for a logic threshold voltage as follows:
For 710I, 1.65V at -25°C, 1.4V at +25°C, 1.15V at +85°C. For 710, 1.5V at 0°C, 1.4V at +25°C, 1.2V at +70°C.
Note 2. LM710: 0≤ TA≤ +70°C
LM710I:-25≤ TA≤ +85°C
Note 3. The response time specified is a 100mV input step with 5mV overdrive (LM710).
LM710/I
TYPICAL PERFORMANCE CHARACTERISTICS
SINGLE COMPARATOR
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
LM711/I
DUAL COMPARATOR
DUAL HIGH-SPEED DIFFERENT
COMPARATOR
14 DIP
The LM711/l consists of two voltage comparators with the
separate differential inputs, a common output and provision
for strobing each side independently. The device features
high accuracy, fast response, low offset voltage, a large input
voltage range, low power consumption and compatibility with
practically all integrated logic forrns.
The LM711/I can be used as a sense amplifier for memories,
and a dual comparator with OR'ed outputs is required, such
as a double-ended limit detector.
14 SOP
FEATURES
•
•
•
•
Fast response time: 40ns (Typ)
Output compatible with most TTL circuits
Independent strobing of each comparator
Low offset voltage
ORDERING INFORMATION
BLOCK DIAGRAM
Device
Package
LM711N
14 DIP
LM711M
14 SOP
LM711IN
14 DIP
LM711IM
14 SOP
Operating Temperature
0 ~ + 70°C
-25 ~ + 85°C
SCHEMATIC DIAGRAM
Rev. B
1999 Fairchild Semiconductor Corporation
LM711/I
DUAL COMPARATOR
ABSOLUTE MAXIMUM RATINGS
(TA=25°C)
Characteristic
Symbol
Value
Unit
VCC
VEE
VI(DIFF)
VI
VSTR
IO(P)
PD
+14
-7
5
±7
0~6
50
500
0 ~ + 70
-65 ~ + 150
-25 ~ + 85
V
V
V
V
V
mA
mW
Positive Supply Voltage
Negative Supply Voltage
Differential Input Voltage
Input Voltage
Storbe Voltage
Peak Output Current
Continuous Total Power Dissipation
Operating Temperature Range LM711
LM711I
Storage Temperature Range
TOPR
TSTG
°C
°C
ELECTRICAL CHARACTERISTICS
(VCC = +12V, VEE = -6V, TA=25°C, unless otherwise specified)
Characteristic
Symbol
Input Offset Voltage
VIO
Input Offset Current
(Note 1)
IIO
Input Bias Current
IBIAS
Large Signal Voltage Gain
GV
Input Voltage Range
VI(R)
Differential Input Voltage Range
VID(R)
Output Resistance
Test Conditions
LM711I
Min
LM711
Typ
Max
RS≤200Ω, VCH =0V
1.0
VO(P)=1.4V
VO(P)=1.4V
0.5
3.5
4.5
10.0
20
75
150
Note 2
Note 2
25
Note 2
Note 2
VEE = -7.0V
750
500
1500
Min
700
500
±5.0
±5.0
200
VO(H)
VI≥10mV
Output Voltage (Low)
VO(L)
VI≤10mV
-1.0
Loaded Output High Level
VOH
VI≥5mV, IO = 5mA
2.5
Strobed Output Level
VSTR
VSTROBE≥3V
-1.0
Output Sink Current
ISINK
0.5
Positive Supply Current
Negative Supply Current
Strobe Current
Power Consumption
ICC
IEE
ISTR
PD
VI≥10mV, VO(P) ≥0V
VO(P) =0V, VI = 10mV
VO(P) =0V, VI =5mV
VSTROBE = 100mV
Response Time
Strobe Release Time
tRES
TRE
VO(P) =0V, VI≥10mV
(NOTE 1)
4.5
5.0
3.5
0
0.8
40
12
5.0
6.0
15
25
100
150
1500
2.5
200
mV
µA
µA
V
V
4.5
5.0
-1.0
-0.5
0
2.5
3.5
-1.0
0.5
Unit
V/V
200
0
8.6
3.9
1.2
130
1.0
25
±5.0
Output Voltage (High)
Max
0.5
±5.0
RO
Typ
Ω
V
V
mA
0
V
0.8
mA
8.6
3.9
1.2
130
mA
mA
mA
mW
2.5
230
40
12
Note: 1. The response time specified is for a 100mV input step with 10mV overdrive
2. LM711: 0≤T A≤ +70°C
LM711I: -25≤T A≤ +85°C
3. The input offset voltage and input offset current are specified for a logic threshold voltage of 711I, 1.65V
at -25°C, 1.4V at +25°C, 1.15V at +85°C, for 711, 1.5V at 0°C, 1.4V at +25°C, 1.2V at +70°C.
ns
ns
LM711/I
TYPICAL APPLICATIONS
DUAL COMPARATOR
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
LM741/E/I
SINGLE OPERATIONAL AMPLIFIER
SINGLE OPERATIONAL AMPLIFIERS
8 DIP
The LM741 series are general purpose operational amplifiers which
feature improved performance over industry standards like the LM709.
It is intended for a wide range of analog applications.
The high gain and wide range of operating voltage provide superior
performance in integrator, summing amplifier, and general feedback
applications.
8 SOP
FEATURES
•
•
•
•
•
Short circuit protection
Excellent temperature stability
Internal frequency compensation
High Input voltage range
Null of offset
BLOCK DIAGRAM
ORDERING INFORMATION
Device
LM741N
Package
8 DIP
LM741EN
LM741M
Operating Temperature
0 ~ + 70°C
8 SOP
LM741EM
LM741IN
8 DIP
LM741EIN
LM741IM
-40 ~ +85 °C
8 SOP
LM741EIM
SCHEMATIC DIAGRAM
Rev. B
1999 Fairchild Semiconductor Corporation
LM741/E/I
SINGLE OPERATIONAL AMPLIFIER
ABSOLUTE MAXIMUM RATINGS (TA=25 ° C)
Characteristic
Symbol
LM741
LM741E
LM741I
Unit
VCC
±18
±22
±18
V
VI(DIFF)
30
30
30
V
VI
±15
±15
±15
V
Indefinite
Indefinite
Indefinite
Supply Voltage
Differential Input Voltage
Input Voltage
Output Short Circuit Duration
PD
500
500
500
mW
Operating Temperature Range
TOPR
0 ~ + 70
0 ~ + 70
-40 ~ + 85
°C
Storage Temperature Range
TSTG
-65 ~ + 150
-65 ~ + 150
-65 ~ + 150
°C
Power Dissipation
ELECTRICAL CHARACTERISTICS
(VCC = 15V, VEE = - 15V. TA = 25 °C, unless otherwise specified)
Characteristic
Symbol
Input Offset Voltage
VIO
Input Offset Voltage
Adjustment Range
VIO(R)
Input Offset Current
Test Conditions
Min
LM741E
Typ Max
RS≤10KΩ
RS≤50Ω
0.8
VCC = ±20V
LM741/LM741I
Min Typ Max
2.0
6.0
mV
3.0
±10
±15
mV
IIO
3.0
30
20
200
Input Bias Current
IBIAS
30
80
80
500
Input Resistance
RI
Input Voltage Range
VCC =±20V
VI(R)
Unit
nA
nA
1.0
6.0
0.3
2.0
MΩ
±12
±13
±12
±13
V
20
200
VCC =±20V,
Large Signal Voltage Gain
GV
RL≥2KΩ
VO(P.P) =±15V
50
V/mV
VCC =±15V,
VO(P.P) =±10V
Output Short Circuit Current
ISC
10
VCC = ±20V
Output Voltage Swing
VO(P.P)
VCC = ±15V
Common Mode Rejection Ratio CMRR
Power Supply Rejection Ratio
RL≥10KΩ
±16
RL≥10KΩ
±15
25
mA
V
±12
±14
RL≥10KΩ
±10
±13
70
90
RS≤10KΩ, VCM = ±12V
RS≤50KΩ, VCM = ±12V
80
95
VCC = ±15V to VCC = ±15V
86
96
VCC = ±15V to VCC = ±15V
RS≤10KΩ
35
RL≥10KΩ
RS≤50Ω
PSRR
25
dB
dB
77
96
LM741/E/I
SINGLE OPERATIONAL AMPLIFIER
ELECTRICAL CHARACTERISTICS
Characteristic
Symbol
Transient
Rise Time
tR
Response
Overshoot
OS
(Continued)
Test Conditions
Unity Gain
Bandwidth
BW
Slew Rate
SR
Unity Gain
Supply Current
ICC
RL= ∞Ω
Power Consumption
Min
6.0
0.43
1.5
0.3
0.7
VCC = ±20V
PC
LM741E
Typ Max
0.25
0.8
80
LM741/LM741I
Min Typ Max
0.3
20
10
Unit
µs
%
MHz
0.5
V/µs
1.5
2.8
50
85
150
VCC = ±15V
mA
mW
ELECTRICAL CHARACTERISTICS
( -40 °C ≤TA≤85 °C for the KA741I °C ≤T A≤70 °C for the LM741 and LM741E. VCC = ±15V, unless otherwise specified)
Characteristic
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Offset Current Drift
Symbol
VIO
RS≤50Ω
0.5
±12
VO(P.P)
±16
RS≥2KΩ
±15
PSRR
10
GV
40
RS≤10KΩ, VCM = ±12V
80
95
VCC = ±20V RS≤50Ω
86
96
to ±5V
RS≥2KΩ
0.8
RS≤10KΩ
±13
V
±12
±14
V
±10
±13
10
40
mA
90
dB
77
96
dB
32
VCC = ±15V,
VO(P.P) = ±10V
VCC = ±15V,
VO(P-P) = ±2V
µA
±12
70
RS≤50KΩ, VCM = ±12V
VCC = ±20V,
VO(P-P) = ±15V
Large Signal Voltage Gain
±13
RS≥2KΩ
ISC
nA
MΩ
RS≥10KΩ
VCC =±15V
Power Supply Rejection Ratio
RS≥10KΩ
mV
nA/ °C
0.5
VI(R)
CMRR
300
0.21
VCC = ±20V
Unit
µV/ °C
15
VCC =±20V
Common Mode Rejection Ratio
7.5
∆IIO/∆T
RI
LM741/LM741I
Min Typ Max
RS≤10KΩ
70
IBIAS
Output Short Circuit Current
LM741E
Typ Max
4.0
IIO
Input Resistance
Output Voltage Swing
Min
∆VIO/∆T
Input Bias Current
Input Voltage Range
Test Conditions
15
10
V/mV
LM741/E/I
SINGLE OPERATIONAL AMPLIFIER
TYPICAL PERFORMANCE CHARACTERISTICS
LM741/E/I
SINGLE OPERATIONAL AMPLIFIER
LM741/E/I
SINGLE OPERATIONAL AMPLIFIER
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
3-TERMINAL 1A POSITIVE
VOLTAGE REGULATORS
TO-220
The LM78XX series of three-terminal positive regulators are available in
the TO-220/D-PAK package and with several fixed output voltages, making
them useful in a wide range of applications. Each type employs internal
current limiting, thermal shut-down and safe area protection, making it
essentially indestructible. If adequate heat sinking is provided, they can
deliver over 1A output current. Although designed primarily as fixed voltage
regulators, these devices can be used with external components to obtain
adjustable voltages and currents.
D-PAK
1
FEATURES
•
•
•
•
•
1: Input 2: GND 3: Output
Output Current up to 1A
Output Voltages of 5, 6, 8, 9, 10, 11, 12, 15, 18, 24V
Thermal Overload Protection
Short Circuit Protection
Output Transistor SOA Protection
ORDERING INFORMATION
Device
Output Voltage
Tolerance
KA78XXCT
± 4%
KA78XXAT
± 2%
KA78XXIT
KA78XXR
Packag
e
TO-220
± 2%
KA78XXIR
± 4%
0 ~ +125 °C
-40 ~ +125 °C
± 4%
KA78XXAR
Operating Temperature
D-PAK
0 ~ +125 °C
-40 ~ +125 °C
BLOCK DIAGRAM
Rev. B
1999 Fairchild Semiconductor Corporation
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
ABSOLUTE MAXIMUM RATINGS (TA = +25°C, unless otherwise specified)
Characteristic
Symbol
Value
Unit
VI
VI
35
40
V
V
Input Voltage (for VO = 5V to 18V)
(for VO = 24V)
Thermal Resistance Junction-Cases
RθJC
5
°C/W
Thermal Resistance Junction-Air
RθJA
65
Operating Temperature Range KA78XX/A/R/RA
KA78XXI/RI
TOPR
0 ~ +125
-40 ~ +125
°C/W
°C
°C
Storage Temperature Range
TSTG
-65 ~ +150
°C
LM7805/I/R/RI ELECTRICAL CHARACTERISTICS
(Refer to test circuit, TMIN < TJ < TMAX, IO = 500mA, VI = 10V, CI= 0.33µF, CO= 0.1µF, unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
Line Regulation
Load Regulation
Quiescent Current
Quiescent Current Change
Output Voltage Drift
VO
∆VO
∆VO
IQ
∆IQ
∆VO/∆T
VN
5.0mA ≤ IO ≤1.0A, PO ≤ 15W
VI = 7V to 20V
VI = 8V to 20V
VO = 7V to 25V
TJ=+25°C
VI = 8V to 12V
TJ=+25°C
4.0
100
50
1.6
50
IO = 5.0mA to1.5A
9
100
9
100
IO =250mA to 750mA
4
50
4
50
5.0
8
5.0
8
TJ =+25 °C
IO = 5mA to 1.0A
VI= 7V to 25V
0.03 0.5
VI= 8V to 25V
IO= 5mA
0.3
-0.8
Short Circuit Current
ISC
Peak Current
IPK
VO
4.75 5.0 5.25
100
RO
RR
V
1.6
Output Resistance
Ripple
Rejection
Dropout Voltage
Unit
4.75 5.0 5.25
4.0
f = 10Hz to 100Khz, TA=+25 °C
f = 120Hz
VO = 8 to 18V
IO = 1A, TJ =+25 °C
f = 1KHz
Output Noise Voltage
LM7805I
LM7805
Min Typ Max Min Typ Max
4.8 5.0 5.2 4.8 5.0 5.2
0.03 0.5
0.3 1.3
73
mV
mA
mA
1.3
42
62
mV
62
-0.8
mV/ °C
42
µV/Vo
73
dB
2
2
V
15
15
VI = 35V, TA =+25 °C
230
230
mΩ
mA
TJ =+25 °C
2.2
2.2
A
* TMIN <TJ <TMAX
LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C
LM78XX/R: TMIN= 0 °C, TMAX= +125 °C
* Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects
must be taken into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM7806/I/R/RI ELECTRICAL CHARACTERISTICS
(Refer to test circuit, TMIN <TJ <TMAX, IO=500mA, VI= 11V CI= 0.33µF, CO= 0.1µF, unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
Quiescent Current Change
Output Voltage Drift
Output Noise Voltage
Ripple
Rejection
Dropout Voltage
IQ
∆IQ
∆VO/∆T
VN
RR
5.0mA ≤ IO ≤1.0A, PD ≤ 15W
VI = 8.0V to 21V
VI = 9.0V to 21V
VI = 8V to 25V
TJ=+25 °C
VI = 9V to 13V
IO =5mA to 1.5A
TJ=+25 °C
IO =250mA to750A
Min
5.75
Min
5.75
LM7806
Typ
Max
6.0
6.25
Unit
V
5.7
5.7
TJ =+25 °C
IO = 5mA to 1A
VI = 8V to 25V
6.0
6.3
5
1.5
9
3
5.0
120
60
120
60
8
6.0
6.3
5
1.5
9
3
5.0
120
60
120
60
8
0.5
VI = 9V to 25V
IO = 5mA
f = 10Hz to 100Khz, TA =+25 °C
f = 120Hz
VI = 9V to 19V
LM7806I
Typ Max
6.0
6.25
0.5
1.3
mV
mV
mA
mA
1.3
59
-0.8
-0.8
mV/ °C
45
45
µV/VO
75
dB
75
59
Output Resistance
RD
IO = 1A, TJ =+25 °C
f = 1KHz
Short Circuit Current
ISC
VI= 35V, TA=+25°C
250
250
mΩ
mA
Peak Current
IPK
TJ =+25 °C
2.2
2.2
A
VD
2
2
V
19
19
* T MIN <TJ <TMAX
LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C
LM78XX/R: TMIN= 0 °C, TMAX= +125 °C
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM7808/I/R/RI ELECTRICAL CHARACTERISTICS
(Refer to test Circuit, TMIN <TJ< TMAX, IO = 500mA, VI = 14V, CI = 0.33µF, CO= 0.1µF, unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
Quiescent Current Change
Output Voltage Drift
Output Noise Voltage
Ripple
Rejection
Dropout Voltage
IQ
∆IQ
∆VO/∆T
VN
5.0mA ≤ IO ≤ 1.0A, PO ≤ 15W
VI = 10.5V to 23V
VI = 11.5V to 23V
TJ =+ 25°C VI = 10.5V to 25V
VI = 11.5V to 17V
I = 5.0mA to 1.5A
TJ = +25°C O
IO= 250mA to 750mA
LM7808I
Min Typ Max
7.7 8.0
8.3
Min
7.7
LM7808
Typ
Max
8.0
8.3
Unit
V
7.6
7.6
8.0
8.4
8.0
8.4
TJ =+25 °C
IO = 5mA to 1.0A
VI = 10.5A to 25V
5.0
2.0
10
5.0
5.0
160
80
160
80
8
5.0
2.0
10
5.0
5.0
160
80
160
80
8
mA
0.05
0.5
0.05
0.5
0.5
1.0
mA
VI = 11.5V to 25V
IO = 5mA
0.5
-0.8
1.0
f = 10Hz to 100Khz, TA =+25 °C
RR
f = 120Hz, VI= 11.5V to 21.5
VD
52
56
73
56
mV
mV
-0.8
mV/ °C
52
µV/Vo
73
dB
2
V
RO
IO = 1A, TJ=+25 °C
f = 1KHz
2
Output Resistance
17
17
Short Circuit Current
ISC
VI= 35V, TA =+25 °C
230
230
mΩ
mA
Peak Current
IPK
TJ =+25 °C
2.2
2.2
A
* T MIN <TJ <TMAX
LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C
LM78XX/R: TMIN= 0 °C, TMAX= +125 °C
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM7809/I/R/RI ELECTRICAL CHARACTERISTICS
(Refer to test circuit. TMIN < TJ <TMAX, IO= 500mA, VI= 15V, CI = 0.33µF, CO = 0.1µF. unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
Quiescent Current Change
Output Voltage Drift
Output Noise Voltage
Ripple
Rejection
Dropout Voltage
IQ
∆IQ
∆VO/∆T
VN
RR
5.0mA ≤ IO ≤1.0A, PD ≤15W
VI= 11.5V to 24V
VI = 12.5V to 24V
VI = 11.5V to 25V
TJ=+25 °C
VI = 12V to 25v
IO = 5mA to 1.5A
TJ=+25 °C
IO = 250mA to 750mA
LM7809I
LM7809
Min Typ Max Min Typ Max
8.65
9.35 8.65
9
9.35
8.6
9
9.4
6
2
12
4
5.0
180
90
180
90
8
V
8.6
TJ=+25 °C
IO = 5mA to 1.0A
VI = 11.5V to 26V
9
9.4
6
2
12
4
5.0
180
90
180
90
8
0.5
VI = 12.5V to 26V
IO = 5mA
f = 10Hz to 100Khz, TA =+25 °C
f = 120Hz
VI = 13V to 23V
9
Unit
0.5
1.3
mV
mV
mA
mA
1.3
56
-1
-1
mV/ °C
58
58
µV/VO
71
dB
71
56
2
V
RO
IO = 1A, TJ=+25 °C
f = 1KHz
2
Output Resistance
17
17
Short Circuit Current
ISC
VI= 35V, TA =+25 °C
250
250
mΩ
mA
Peak Current
IPK
TJ= +25 °C
2.2
2.2
A
VD
* T MIN <TJ <TMAX
LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C
LM78XX/R: TMIN= 0 °C, TMAX= +125 °C
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM7810/I/R/RI ELECTRICAL CHARACTERISTICS
(Refer to test circuit, TMIN <TJ <TMAX, IO= 500mA, VI =16V, CI = 0.33µF, CO= 0.1µF, unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
IQ
Quiescent Current Change
Output Voltage Drift
Output Noise Voltage
Ripple
Rejection
Dropout Voltage
∆IQ
∆VO/∆T
VN
RR
5.0mA ≤ IO≤1.0A, PD ≤15W
VI = 12.5V to 25V
VI= 13.5V to 25V
VI = 12.5V to 25V
TJ =+25°C
VI = 13V to 25V
I = 5mA to 1.5A
TJ =+25°C O
IO = 250mA to 750mA
LM7810I
Min Typ Max
9.6 10
10.4
Unit
V
9.5
9.5
TJ =+25 °C
IO = 5mA to 1.0A
VI = 12.5V to 29V
10
10.5
10
3
12
4
5.1
200
100
200
400
8
10
10.5
10
3
12
4
5.1
200
100
200
400
8
mA
0.5
1.0
mA
0.5
VI = 13.5V to 29V
IO = 5mA
f = 10Hz to 100Khz, TA =+25 °C
f = 120Hz
VI = 13V to 23V
LM7810
Min Typ Max
9.6 10
10.4
mV
mV
1.0
56
-1
-1
mV/ °C
58
58
µV/Vo
71
dB
71
56
Output Resistance
RO
IO = 1A, TJ=+25 °C
f = 1KHz
17
17
Short Circuit Current
ISC
VI = 35V, TA=+25 °C
250
250
mΩ
mA
Peak Current
IPK
TJ =+25 °C
2.2
2.2
A
VD
2
2
V
* T MIN <TJ <TMAX
LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C
LM78XX/R: TMIN= 0 °C, TMAX= +125 °C
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM7811/I/R/RI ELECTRICAL CHARACTERISTICS
(Refer to test circuit, TMIN<TJ<TMAX, IO = 500mA, VI=18V, CI=0.33µF, CO = 0.IµF, unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
IQ
Quiescent Current Change
Output Voltage Drift
Output Noise Voltage
Ripple
Rejection
Dropout Voltage
∆IQ
∆VO/∆T
VN
RR
5.0mA ≤ IO ≤1.0A, PD ≤15W
VI = 13.5V to 26V
VI= 14.5V to 26V
V = 13.5V to 25V
TJ =+25°C I
VI = 14V to 21V
I = 5.0mA to 1.5A
TJ =+25°C O
IO = 250mA to 750mA
LM7811I
Min Typ Max
10.6 11
11.4
Unit
V
10.5
10.5
TJ =+25 °C
IO = 5mA to 1.0A
VI = 13.5V to 29V
11
11.5
10
3.0
12
4
5.1
220
110
220
110
8
11
11.5
10
3
12
4
5.1
220
110
220
110
8
mA
0.5
1.0
mA
0.5
VI = 14.5V to 29V
IO = 5mA
f = 10Hz to 100Khz, TA =+25 °C
f = 120Hz
VI = 14V to 24V
LM7811
Min Typ Max
10.6 11
11.4
mV
mV
1.0
55
-1
-1
mV/ °C
70
70
µV/VO
71
dB
71
55
2
V
RO
IO = 1A, TJ=+25 °C
f = 1KHz
2
Output Resistance
18
18
Short Circuit Current
ISC
VI = 35V, TA=+25 °C
250
250
mΩ
mA
Peak Current
IPK
TJ =+25 °C
2.2
2.2
A
VD
* T MIN <TJ <TMAX
LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C
LM78XX/R: TMIN= 0 °C, TMAX= +125 °C
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM7812/I/R/RI ELECTRICAL CHARACTERISTICS
(Refer to test circuit, TMIN <TJ <TMAX, IO=500mA, VI=19V, CI= 0.33µF, CO= 0.1.µF, unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
IQ
Quiescent Current Change
Output Voltage Drift
Output Noise Voltage
Ripple
Rejection
Dropout Voltage
∆IQ
∆VO/∆T
VN
RR
5.0mA ≤ IO≤1.0A, PD≤15W
VI = 14.5V to 27V
VI= 15.5V to 27V
VI = 14.5V to 30V
TJ =+25°C
VI = 16V to 22V
I = 5mA to 1.5A
TJ =+25°C O
IO = 250mA to 750mA
LM7812I
Min Typ Max
11.5 12
12.5
f = 10Hz to 100Khz, TA =+25 °C
f = 120Hz
VI = 15V to 25V
Unit
V
11.4
11.4
TJ =+25 °C
IO = 5mA to 1.0A
VI = 14.5V to 30V
VI = 15V to 30V
IO = 5mA
LM7812
Min Typ Max
11.5 12
12.5
12
12.6
12
12.6
10
3.0
11
5.0
5.1
240
120
240
120
8
10
3.0
11
5.0
5.1
240
120
240
120
8
mA
0.1
0.5
0.1
0.5
0.5
1.0
mA
mV
mV
1.0
0.5
55
-1
-1
76
76
mV/ °C
mV/VO
71
dB
71
55
Output Resistance
RO
IO = 1A, TJ=+25 °C
f = 1KHz
18
18
Short Circuit Current
ISC
VI = 35V, TA=+25 °C
230
230
mΩ
mA
Peak Current
IPK
TJ = +25 °C
2.2
2.2
A
VD
2
2
V
T MIN <TJ <TMAX
LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C
LM78XX/R: TMIN= 0 °C, TMAX= +125 °C
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM7815/I/R/RI ELECTRICAL CHARACTERISTICS
(Refer to test circuit, TMIN<TJ<TMAX, IO =500mA, VI =23V, CI =0.33µF, CO =0.1µF, unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
IQ
Quiescent Current Change
Output Voltage Drift
Output Noise Voltage
Ripple
Rejection
Dropout Voltage
∆IQ
∆VO/∆T
VN
RR
LM7815I
Min Typ Max
14.4 15
15.6
5.0mA ≤ IO≤1.0A, PD≤15W
14.2
VI = 17.5V to 30V
5
VI= 18.5V to 30V
VI = 17.5V to 30V
TJ =+25°C
VI = 20V to 26V
IO = 5mA to 1.5A
TJ =+25°C IO = 250mA to 750mA
TJ =+25 °C
IO = 5mA to 1.0A
VI = 17.5V to 30V
LM7815
Typ Max
15
15.6
Unit
V
15
11
3
12
4
5.2
15.75 14.25
300
150
300
150
8
15
15.75
11
3
12
4
5.2
300
150
300
150
8
0.5
VI = 18.5V to 30V
IO = 5mA
f = 10Hz to 100Khz, TA =+25 °C
f = 120Hz
VI = 18.5V to 28.5V
Min
14.4
0.5
1.0
mV
mV
mA
mA
1.0
54
-1
-1
mV/ °C
90
90
µV/VO
70
dB
70
54
2
V
RO
IO = 1A, TJ=+25 °C
f = 1KHz
2
Output Resistance
19
19
Short Circuit Current
ISC
VI = 35V, TA=+25 °C
250
250
mΩ
mA
Peak Current
IPK
TJ =+25 °C
2.2
2.2
A
VD
* T MIN <TJ <TMAX
LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C
LM78XX/R: TMIN= 0 °C, TMAX= +125 °C
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM7818/I/R/RI ELECTRICAL CHARACTERISTICS
(Refer to test circuit, TMIN<TJ<TMAX, IO =500mA, VI =27V, CI =0.33µF, CO =0.1µF, unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
IQ
Quiescent Current Change
Output Voltage Drift
Output Noise Voltage
Ripple
Rejection
Dropout Voltage
∆IQ
∆VO/∆T
VN
RR
5.0mA ≤ IO ≤1.0A, PD ≤15W
VI = 21V to 33V
VI= 22V to 33V
VI = 21V to 33V
TJ =+25°C
VI = 24V to 30V
IO = 5mA to 1.5A
TJ =+25°C
IO = 250mA to 750mA
LM7818I
Min Typ Max
17.3 18
18.7
Unit
V
17.1
17.1
TJ =+25 °C
IO = 5mA to 1.0A
VI = 21V to 33V
18
18.9
15
5
15
5.0
5.2
360
180
360
180
8
18
18.9
15
5
15
5.0
5.2
360
180
360
180
8
mA
0.5
1
mA
0.5
VI = 22V to 33V
IO = 5mA
f = 10Hz to 100Khz, TA =+25 °C
f = 120Hz
VI = 22V to 32V
LM7818
Min Typ Max
17.3 18
18.7
mV
mV
1.0
53
-1
-1
mV/ °C
110
110
µV/VO
69
dB
69
53
2
V
RO
IO = 1A, TJ=+25 °C
f = 1KHz
2
Output Resistance
22
22
Short Circuit Current
ISC
VI = 35V, TA=+25 °C
250
250
mΩ
mA
Peak Current
IPK
TJ =+25 °C
2.2
2.2
A
VD
* T MIN <TJ <TMAX
LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C
LM78XX/R: TMIN= 0 °C, TMAX= +125 °C
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM7824/I/R/RI ELECTRICAL CHARACTERISTICS
(Refer to test circuit, TMIN<TJ<TMAX, IO = 500mA, VI = 33V, CI = 0.33µF, CO = 0.1µF, unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
IQ
Quiescent Current Change
Output Voltage Drift
Output Noise Voltage
Ripple
Rejection
Dropout Voltage
∆IQ
∆VO/∆T
VN
RR
5.0mA ≤ IO ≤ 1.0A, PD ≤ 15W
VI = 27V to 38V
VI= 28V to 38V
VI = 27V to 38V
TJ =+25°C
VI = 30V to 36V
I = 5mA to 1.5A
TJ =+25°C O
IO = 250mA to 750mA
LM7824I
Min Typ Max
23 24
25
LM7824
Min Typ Max
23 24
25
Unit
V
22.8
22.8
24
25.25
24
25.2
17
6
15
5.0
5.2
480
240
480
240
8
17
6
15
5.0
5.2
480
240
480
240
8
mA
0.1
0.5
0.1
0.5
0.5
1
mA
VI = 28V to 38V
IO = 5mA
0.5
-1.5
1
f = 10Hz to 100KHz, TA =+25 °C
f = 120Hz
VI = 28V to 38V
160
TJ =+25 °C
IO = 5mA to 1.0A
VI = 27V to 38V
50
67
50
mV
mV
-1.5
mV/ °C
60
µV/VO
67
dB
2
V
RO
IO = 1A, TJ=+25 °C
f = 1KHz
2
Output Resistance
28
28
Short Circuit Current
ISC
VI = 35V, TA=+25 °C
230
230
mΩ
mA
Peak Current
IPK
TJ =+25 °C
2.2
2.2
A
VD
* T MIN <TJ <TMAX
LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C
LM78XX/R: TMIN= 0 °C, TMAX= +125 °C
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM7805A/RA ELECTRICAL CHARACTERISTICS
(Refer to the test circuits. TJ = 0 to +I25 °C, IO = 1A, V I = 10V, C I= 0.33µF, C O= 0.1µF, unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
Line Regulation
VO
∆VO
IO = 5mA to 1A, PD ≤ 5W
VI = 7.5 to 20V
VI = 7.5 to 25V
IO = 500mA
VI = 8V to 12V
TJ =+25 °C
Load Regulation
∆VO
Quiescent Current
IQ
Quiescent Current Change
∆IQ
VI= 7.3V to 25V
VI= 8V to 12V
TJ =+25 °C
IO = 5mA to 1.5A
IO = 5mA to 1A
IO = 250 to 750mA
TJ =+25 °C
IO = 5mA to 1A
VI = 8 V to 25V, IO = 500mA
Min
Typ
Max
4.9
5
5.1
4.8
5
5.2
5
50
3
50
5
1.5
9
50
25
100
9
4
5.0
100
50
6
mA
0.5
0.8
mA
VI = 7.5V to 20V, TJ =+25 °C
Output Voltage Drift
Output Noise Voltage
Ripple Rejection
∆V/∆T
VN
RR
IO = 5mA
f = 10Hz to 100KHz
TA =+25 °C
f = 120Hz, IO = 500mA
VI = 8V to 18V
Unit
V
V
V
0.8
-0.8
mV/ °C
10
µV/VO
68
dB
2
V
RO
IO = 1A, TJ =+25 °C
f = 1KHz
17
Short Circuit Current
ISC
VI= 35V, TA =+25 °C
250
mΩ
mA
Peak Current
IPK
TJ= +25 °C
2.2
A
Dropout Voltage
VD
Output Resistance
*Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM7806A/RA ELECTRICAL CHARACTERISTICS
(Refer to the test circuits. TJ = 0 to+150 °C, IO = 1A, V I = 11V, C I= 0.33µF, C O= 0.1µF, unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
Line Regulation
VO
∆VO
IO = 5mA to 1A, PD ≤ 15W
VI = 8.6 to 21V
VI= 8.6 to 25V
IO = 500mA
VI= 9V to 13V
TJ =+25 °C
Load Regulation
∆VO
Quiescent Current
IQ
Quiescent Current Change
Output Voltage Drift
VI= 8.3V to 21V
VI= 9V to 13V
TJ =+25 °C
IO = 5mA to 1.5A
IO = 5mA to 1A
IO = 250 to 750mA
∆IQ
TJ =+25 °C
IO = 5mA to 1A
VI = 9V to 25V, IO = 500mA
∆V/∆T
VI= 8.5V to 21V, TJ =+25 °C
IO = 5mA
Output Noise Voltage
VN
Ripple Rejection
RR
f = 10Hz to 100KHz
TA =+25 °C
f = 120Hz, IO = 500mA
VI = 9V to 19V
Min
Typ
Max
5.58
6
6.12
Unit
5.76
6
6.24
5
60
3
60
5
60
1.5
30
9
100
4
5.0
4.3
100
50
6
mA
0.5
0.8
mA
V
mV
mV
0.8
-0.8
mV/ °C
10
µ V/VO
65
dB
Dropout Voltage
VD
V
RO
IO = 1A, TJ =+25 °C
f = 1KHz
2
Output Resistance
17
Short Circuit Current
ISC
VI= 35V, TA =+25 °C
250
mΩ
mA
Peak Current
IPK
TJ=+25 °C
2.2
A
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM7808A/RA ELECTRICAL CHARACTERISTICS
(Refer to the test circuits. TJ = 0 to+150 °C, IO = 1A, V I = 14V, C I = 0.33µF, C O=0.1µF, unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
Line Regulation
VO
∆VO
IO = 5mA to 1A, PD ≤15W
VI = 8.6 to 21V
VI= 10.6 to 25V
IO = 500mA
VI= 11to 17V
TJ =+25 °C
Load Regulation
∆VO
Quiescent Current
IQ
Quiescent Current Change
∆IQ
VI= 10.4V to 23V
VI= 11V to 17V
TJ =+25 °C
IO = 5mA to 1.5A
IO = 5mA to 1A
IO = 250 to 750mA
TJ =+25 °C
IO = 5mA to 1A
VI = 11V to 25V, IO = 500mA
Min
Typ
Max
7.84
8
8.16
7.7
8
8.3
6
80
3
80
6
2
80
40
12
100
12
5
5.0
100
50
6
mA
0.5
0.8
mA
VI= 10.6V to 23V, TJ =+25 °C
Output Voltage Drift
∆V/∆T
Output Noise Voltage
VN
Ripple Rejection
RR
IO = 5mA
f = 10Hz to 100KHz
TA =+25 °C
f = 120Hz, IO = 500mA
VI = 11.5V to 21.5V
Unit
V
mV
mV
0.8
-0.8
mV /°C
10
µV/VO
62
dB
IO = 1A, TJ =+25 °C
f = 1KHz
2
V
18
ISC
VI= 35V, TA =+25°C
250
mΩ
mA
IPK
TJ=+25 °C
2.2
A
Dropout Voltage
VD
Output Resistance
RO
Short Circuit Current
Peak Current
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM7809A/RA ELECTRICAL CHARACTERISTICS
(Refer to the test circuits. TJ = 0 to +125 °C, IO = 1A, V I = 15V, C I = 0.33µF, C O = 0.1µF, unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
Line Regulation
VO
∆VO
IO = 5mA to 1A, PD ≤15W
VI = 11.2 to 24V
VI= 11.7 to 25V
IO = 500mA
VI= 12.5 to 19V
TJ =+25 °C
Load Regulation
∆VO
Quiescent Current
IQ
Quiescent Current Change
Output Voltage Drift
∆IQ
∆V/∆T
Output Noise Voltage
VN
Ripple Rejection
RR
Min
Typ
Max
8.82
9.0
9.18
8.65
9.0
9.35
6
90
4
45
VI= 11.5V to 24V
6
90
VI= 12.5V to 19V
2
45
12
100
12
5
5.0
100
50
6.0
TJ =+25 °C
IO = 5mA to 1.0A
IO = 5mA to 1.0A
IO = 250 to 750mA
TJ =+25 °C
VI = 11.7V to 25V, TJ=+25 °C
VI = 12V to 25V, IO = 500mA
0.8
IO = 5mA to 1.0A
0.5
IO = 5mA
f = 10Hz to 100KHz
TA =+25 °C
f = 120Hz, IO = 500mA
VI = 12V to 22V
0.8
Unit
V
mV
mV
mA
mA
-1.0
mV/ °C
10
µV/VO
62
dB
Dropout Voltage
VD
V
RO
IO = 1A, TJ =+25 °C
f = 1KHz
2.0
Output Resistance
17
Short Circuit Current
ISC
VI= 35V, TA =+25 °C
250
mΩ
mA
Peak Current
IPK
TJ=+25 °C
2.2
A
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM7810A/RA ELECTRICAL CHARACTERISTICS
(Refer to the test circuits. TJ = 0 to+125 °C, IO = 1A, V I = 16V, C I = 0.33µF, CO = 0.1µF, unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
Line Regulation
VO
∆VO
IO = 5mA to 1A, PD ≤ 15W
VI =12.8 to 25V
VI= 12.8 to 26V
IO = 500mA
VI= 13to 20V
TJ =+25 °C
Load Regulation
Quiescent Current
Quiescent Current Change
Output Voltage Drift
∆VO
IQ
∆IQ
∆V/∆T
Output Noise Voltage
VN
Ripple Rejection
RR
VI= 12.5V to 25V
VI= 13V to 20V
TJ =+25 °C
IO = 5mA to 1.5A
IO = 5mA to 1.0A
IO = 250 to 750mA
TJ =+25 °C
Min
Typ
Max
9.8
10
10.2
9.6
10
10.4
8
100
4
50
8
3
100
50
12
100
12
5
5.0
100
50
6.0
VI = 13V to 26V, TJ=+25 °C
VI = 12.8V to 25V, IO = 500mA
0.5
IO = 5mA to 1.0A
0.5
0.8
IO = 5mA
f = 10Hz to 100KHz
TA =+25 °C
f = 120Hz, IO = 500mA
VI = 14V to 24V
-1.0
Unit
V
mV
mV
mA
mA
mV °C
10
µV/VO
62
dB
Dropout Voltage
VD
V
RO
IO = 1A, TJ =+25 °C
f = 1KHz
2.0
Output Resistance
17
Short Circuit Current
ISC
VI= 35V, TA =+25 °C
250
mΩ
mA
Peak Current
IPK
TJ=+25 °C
2.2
A
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM7811A/RA ELECTRICAL CHARACTERISTICS
(Refer to the test circuits. TJ = 0 to +125 °C, IO = 1A, V I = 18V, C I = 0.33µF, C O = 0.1µF, unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
Line Regulation
VO
∆VO
IO = 5mA to 1A, PD ≤15W
VI = 13.8 to 26V
VI= 12.8 to 26V
IO = 500mA
VI= 15 to 21V
TJ =+25 °C
Load Regulation
∆VO
Quiescent Current
IQ
Quiescent Current Change
Output Voltage Drift
∆IQ
∆VO/∆T
Output Noise Voltage
VN
Ripple Rejection
RR
VI= 13.5V to 26V
VI= 15V to 21V
TJ =+25 °C
IO = 5mA to 1.5A
IO = 5mA to 1.0A
IO = 250 to 750mA
TJ =+25 °C
Min
Typ
Max
10.8
11.0
11.2
10.6
11.0
11.4
10
110
4
55
10
3
110
55
12
100
12
5
5.1
100
50
6.0
VI = 13.8V to 26V, TJ=+25 °C
VI = 14V to 27V, IO = 500mA
0.8
IO = 5mA to 1.0A
IO = 5mA
0.5
f = 10Hz to 100KHz
TA =+25 °C
f = 120Hz, IO = 500mA
VI = 14V to 24V
0.8
Unit
V
mV
mV
mA
mA
-1.0
mV /°C
10
µV/VO
61
dB
Dropout Voltage
VD
V
RO
IO = 1A, TJ =+25 °C
f = 1KHz
2.0
Output Resistance
18
Short Circuit Current
ISC
VI= 35V, TA =+25 °C
250
mΩ
mA
Peak Current
IPK
TJ=+25 °C
2.2
A
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM7812A/RA ELECTRICAL CHARACTERISTICS
(Refer to the test circuits. TJ = 0 to +125 °C, IO = 1A, V I = 19V, C I = 0.33µF, C O= 0.1µF, unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
Line Regulation
VO
∆VO
IO = 5mA to 1A, PD ≤15W
VI = 14.8 to 27V
VI= 14.8 to 30V
IO = 500mA
VI= 16 to 22V
TJ =+25°C
Load Regulation
∆VO
Quiescent Current
IQ
Quiescent Current Change
Output Voltage Drift
∆IQ
∆VO/∆T
Output Noise Voltage
VN
Ripple Rejection
RR
VI= 14.5V to 27V
VI= 16V to 22V
TJ =+25°C
IO = 5mA to 1.5A
IO = 5mA to 1.0A
IO = 250 to 750mA
TJ =+25 °C
Min
Typ
Max
11.75
12
12.25
11.5
12
12.5
10
120
4
120
10
3
120
60
12
100
12
5
5.1
100
50
6.0
VI = 15V to 30V, TJ=+25 °C
VI = 14V to 27V, IO = 500mA
0.5
IO = 5mA to 1.0A
IO = 5mA
0.8
f = 10Hz to 100KHz
TA =+25 °C
f = 120Hz, IO = 500mA
VI = 14V to 24V
0.8
Unit
V
mV
mV
mA
mA
-1.0
mV/ °C
10
µV/VO
60
dB
Dropout Voltage
VD
V
RO
IO = 1A, TJ =+25 °C
f = 1KHz
2.0
Output Resistance
18
Short Circuit Current
ISC
VI= 35V, TA =+25 °C
250
mΩ
mA
Peak Current
IPK
TJ=+25 °C
2.2
A
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM7815A/RA ELECTRICAL CHARACTERISTICS
(Refer to the test circuits. TJ = 0 to +150 °C, IO =1A, V I=23V, C I = 0.33µF, C O=0.1µF, unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
Line Regulation
VO
∆VO
IO = 5mA to 1A, PD ≤15W
VI = 17.7 to 30V
VI= 17.9 to 30V
IO = 500mA
VI= 20 to 26V
TJ =+25 °C
Load Regulation
∆VO
Quiescent Current
IQ
Quiescent Current Change
Output Voltage Drift
∆IQ
∆VO/∆T
Output Noise Voltage
VN
Ripple Rejection
RR
VI= 17.5V to 30V
VI= 20V to 26V
TJ =+25 °C
IO = 5mA to 1.5A
IO = 5mA to 1.0A
IO = 250 to 750mA
TJ =+25 °C
Min
Typ
Max
14.7
15
15.3
14.4
15
15.6
10
150
5
150
11
3
150
75
12
100
12
5
5.2
100
50
6.0
VI = 17.5V to 30V, TJ =+25 °C
VI = 17.5V to 30V, IO = 500mA
0.5
IO = 5mA to 1.0A
IO = 5mA
0.8
f = 10Hz to 100KHz
TA =+25 °C
f = 120Hz, IO = 500mA
VI = 18.5V to 28.5V
0.8
Unit
V
mV
mV
mA
mA
-1.0
mV/ °C
10
µV/VO
58
dB
Dropout Voltage
VD
V
RO
IO = 1A, TJ =+25 °C
f = 1KHz
2.0
Output Resistance
19
Short Circuit Current
ISC
VI= 35V, TA =+25 °C
250
mΩ
mA
Peak Current
IPK
TJ=+25 °C
2.2
A
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM7818A/RA ELECTRICAL CHARACTERISTICS
(Refer to the test circuits. TJ = 0 to +150 °C, IO=1A, V I = 27V, C I= 0.33µF, C O = 0.1µF, unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
Line Regulation
VO
∆VO
IO = 5mA to 1A, PD ≤15W
VI = 21 to 33V
VI= 21 to 33V
IO = 500mA
VI= 21 to 33V
TJ =+25 °C
Load Regulation
∆VO
Quiescent Current
IQ
Quiescent Current Change
Output Voltage Drift
∆IQ
∆VO/∆T
Output Noise Voltage
VN
Ripple Rejection
RR
Dropout Voltage
VD
Output Resistance
RO
Short Circuit Current
Peak Current
Min
Typ
Max
17.64
18
18.36
17.3
18
18.7
15
180
5
180
VI= 20.6V to 33V
15
180
VI= 24V to 30V
5
90
15
100
15
7
5.2
100
50
6.0
TJ =+25 °C
IO = 5mA to 1.5A
IO = 5mA to 1.0A
IO = 250 to 750mA
TJ =+25 °C
VI = 21V to 33V, TJ=+25 °C
VI = 21V to 33V, IO = 500mA
0.5
IO = 5mA to 1.0A
IO = 5mA
0.8
f = 10Hz to 100KHz
TA =+25 °C
f = 120Hz, IO = 500mA
VI = 18.5V to 28.5V
0.8
Unit
V
mV
mV
mA
mA
-1.0
mV/ °C
10
µV/VO
57
dB
IO = 1A, TJ =+25 °C
f = 1KHz
2.0
V
19
ISC
VI= 35V, TA =+25 °C
250
mΩ
mA
IPK
TJ=+25 °C
2.2
A
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM7824A/RA ELECTRICAL CHARACTERISTICS
(Refer to the test circuits. TJ = 0 to +150 °C, IO =1A, V I = 33V, C I= 0.33µF, C O=0.1µF, unless otherwise specified)
Characteristic
Symbol
Test Conditions
TJ =+25 °C
Output Voltage
Line Regulation
VO
∆VO
IO = 5mA to 1A, PD ≤15W
VI = 27.3 to 38V
VI= 27 to 38V
IO = 500mA
VI= 21 to 33V
o
TJ =+25 C
Load Regulation
Quiescent Current
Quiescent Current Change
Output Voltage Drift
∆VO
IQ
∆IQ
∆VO/∆T
Output Noise Voltage
VN
Ripple Rejection
RR
VI= 26.7V to 38V
VI= 30V to 36V
TJ =+25 °C
IO = 5mA to 1.5A
IO = 5mA to 1.0A
IO = 250 to 750mA
TJ =+25 °C
Min
Typ
Max
23.5
24
24.5
23
24
25
18
240
6
240
18
6
240
120
15
100
15
7
5.2
100
50
6.0
VI = 27.3V to 38V, TJ =+25 °C
VI = 27.3V to 38V, IO = 500mA
0.5
IO = 5mA to 1.0A
IO = 5mA
0.8
f = 10Hz to 100KHz
TA = 25 °C
f = 120Hz, IO = 500mA
VI = 18.5V to 28.5V
0.8
Unit
V
mV
mV
mA
mA
-1.5
mV/ °C
10
µV/VO
54
dB
Dropout Voltage
VD
V
RO
IO = 1A, TJ =+25°C
f = 1KHz
2.0
Output Resistance
20
Short Circuit Current
ISC
VI= 35V, TA =+25 °C
250
mΩ
mA
Peak Current
IPK
TJ=+25 °C
2.2
A
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 1 Quiescent Current
Fig. 3 Output Voltage
Fig. 2 Peak Output Current
Fig. 4 Quiescent Current
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
TYPICAL APPLICATIONS
Fig. 5 DC Parameters
Fig. 6 Load Regulation
Fig. 7 Ripple Rejection
TYPICAL APPLICATIONS (Continued)
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
Fig. 8 Fixed Output Regulator
Fig. 9 Constant Current Regulator
Notes:
(1) To specify an output voltage. substitute voltage value for "XX."
A common ground is required between the input and the Output
voltage. The input voltage must remain typically 2.0V above the output
voltage even during the low point on the input ripple voltage.
(2) CI is required if regulator is located an appreciable distance from
power Supply filter.
(3) CO improves stability and transient response.
Fig. 10 Circuit for Increasing Output Voltage
IRI ≥ 5 IQ
VO = VXX (1+R2/R1)+IQR2
Fig. 11 Adjustable Output Regulator (7 to 30V)
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
TYPICAL APPLICATIONS (Continued)
Fig. 12 High Current Voltage Regulator
Fig. 13 High Output Current with
Short Circuit Protection
Fig. 14 Tracking Voltage Regulator
Fig. 15 Split Power Supply ( ± 15V-1A)
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
TYPICAL APPLICATIONS (Continued)
Fig. 16 Negative Output Voltage Circuit
Fig. 17 switching Regulator
LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
LM78LXX (KA78LXX, MC78LXX) FIXED VOLTAGE REGULATOR (POSITIVE)
3-TERMINAL 0.1A POSITIVE VOLTAGE
REGULATORS
TO-92
The LM78LXX series of fixed voltage monolithic integrated circuit
voltage regulators are suitable for application that required supply
up to 100mA.
1: Output 2: GND 3: Input
8 SOP
FEATURES
• Maximum Output Current of 100mA
• Output Voltage of 5V, 6V, 8V, 9V, 10V, 12V, 15V, 18V and 24V
• Thermal Overload Protection
• Short Circuit Current Limiting
• Output Voltage Offered in ± 5% Tolerance
1: Output 2: GND 3: GND 4: NC
5: NC 6: GND 7: GND 8: Input
ORDERING INFORMATION
Device
Package
Operating Temperature
LM78LXXACZ
TO-92
- 45 ~ + 125°C °
LM78LXXM
8 SOP
0 ~ + 125°C
BLOCK DIAGRAM
VI
3
THERMAL SHUTDOWN
CIRCUIT
I
REFERENCE VOLTAGE
+
-
SHORT CIRCUIT
PROTECTION
GND
2
RSC
V0
1
Rev. B
1999 Fairchild Semiconductor Corporation
LM78LXX (KA78LXX, MC78LXX) FIXED VOLTAGE REGULATOR (POSITIVE)
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise specified)
Characteristic
Input Voltage (for VO = 5V, 8V)
(for VO = 12V, 15V)
Operating Junction Temperature Range
Storage Temperature Range
Symbol
Value
Unit
VI
30
35
V
V
TJ
0 ~ +150
°C
TSTG
-65 ~ +150
°C
LM78L05 ELECTRICAL CHARACTERISTICS
(VI = 10V, IO = 40mA, 0 °C ≤ T J ≤ 125 °C, CI = 0.33 µF, CO = 0.1µF, unless otherwise specified. (Note 1)
Characteristic
Output Voltage
Symbol
VO
∆VO
Line Regulation
∆VO
Load Regulation
Test Conditions
Min
Typ
Max
4.8
5.0
5.2
V
8
150
mV
8V ≤ VI ≤ 20V
6
100
mV
1mA ≤ IO ≤ 100mA
11
60
mV
1mA ≤ IO ≤ 40mA
1mA ≤ IO ≤ 40mA
5.0
30
5.25
mV
V
5.25
V
TJ = 25 °C
TJ = 25°C
TJ = 25 °C
7V ≤ VI ≤ 20V
IQ
7V ≤VI ≤ 0V
7V ≤VI ≤ VMAX
(Note 2)
TJ = 25 °C
Quiescent Current
with line
∆IQ
8V ≤VI ≤ 20V
Change
with load
∆IQ
1mA ≤ IO ≤ 40 mA
VN
TA = 25 °C, 10Hz ≤ f ≤ 100KHz
Output Voltage
VO
Quiescent Current
Output Noise Voltage
Temperature Coefficient of VO
1mA ≤ IO ≤ 70mA
4.75
2.0
Ripple Rejection
RR
f = 120Hz, 8V ≤ VI ≤ 18V, TJ = 25 °C
Dropout Voltage
VD
TJ = 25 °C
5.5
mA
1.5
mA
0.1
∆VO/∆T IO = 5mA
41
Unit
mA
40
µV/VO
-0.65
mV/ °C
80
dB
1.7
V
LM78LXX (KA78LXX, MC78LXX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM78L06 ELECTRICAL CHARACTERISTICS
(VI = 12V, IO = 40mA, 0 °C ≤ T J ≤ 125 °C , CI = 0.33µF, CO = 0.1µF, unless otherwise specified. (Note 1)
Characteristic
Output Voltage
Symbol
VO
∆VO
Line Regulation
∆VO
Load Regulation
Output Voltage
VO
Quiescent Current
IQ
Test Conditions
TJ = 25 °C
Min
Typ
Max
5.75
6.0
6.25
V
64
175
mV
8.5V < VI < 20V
TJ =25 °C
9V ≥ VI ≥ 20V
1mA < IO < 100mA
TJ =25 °C
1mA < IO < 70mA
8.5 < VI < 20V, 1mA < IO < 40mA
8.5 < VI < VMAX(Note), 1mA < IO < 70mA
54
125
mV
12.8
80
mV
5.8
40
6.3
6.3
mV
5.7
5.7
TJ = 25 °C
3.9
6.0
TJ = 125 °C
5.5
Quiescent Current
with line
∆IQ
9 < VI < 20V
1.5
Change
with load
∆IQ
1mA < IO< 40mA
0.1
VN
TA = 25 °C, 10Hz < f < 100KHz
Output Noise Voltage
Temperature Coefficient of VO
∆VO/∆T IO = 5mA
Ripple Rejection
RR
f = 120Hz, 10V < VI < 20V, TJ = 25 °C
Dropout Voltage
VD
TJ = 25 °C
40
Unit
V
mA
mA
40
µV/VO
0.75
mV/ °C
46
dB
1.7
V
LM78L08 ELECTRICAL CHARACTERISTICS
(VI = 14V, IO = 40mA, 0 °C ≤ T J ≤ 125 °C, CI = 0.33 µF, CO = 0.1µF, unless otherwise specified. (Note 1)
Characteristic
Output Voltage
Symbol
VO
∆VO
Line Regulation
∆VO
Load Regulation
Output Voltage
VO
Quiescent Current
IQ
Test Conditions
Min
Typ
Max
7.7
8.0
8.3
V
10
175
mV
11V ≤ VI ≤ 23V
8
125
mV
1mA ≤ IO ≤ 100mA
15
80
mV
40
mV
8.4
V
TJ = 25 °C
TJ =25 °C
TJ =25 °C
10.5V ≤ VI ≤ 23V
10.5V ≤ VI ≤ VMAX
(Note 2)
TJ = 25 °C
10.5V ≤ VI ≤ 23V
1mA ≤ IO ≤ 40mA
8.0
1mA ≤ IO ≤ 40mA
7.6
1mA ≤ IO ≤ 70mA
7.6
2.0
8.4
V
5.5
mA
mA
Quiescent Current
with line
∆IQ
11V ≤ VI ≤ 23V
1.5
Change
with load
∆IQ
1mA ≤ IO ≤ 40mA
0.1
VN
TA = 25 °C, 10Hz ≤ f ≤100KHz
Output Noise Voltage
Temperature Coefficient of VO
∆VO/∆T IO = 5mA
Ripple Rejection
RR
f = 120Hz, 11V ≤ VI ≤ 21V, TJ = 25 °C
Dropout Voltage
VD
TJ = 25 °C
39
Unit
mA
60
µV/VO
-0.8
mV/°C
70
dB
1.7
V
LM78LXX (KA78LXX, MC78LXX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM78L09 ELECTRICAL CHARACTERISTICS
(VI = 15V, IO = 40mA, 0 °C ≤ T J ≤ 125 °C, CI = 0.33 µF, CO = 0.1µF, unless otherwise specified. (Note 1)
Characteristic
Output Voltage
Symbol
VO
∆VO
Line Regulation
∆VO
Load Regulation
Output Voltage
Test Conditions
Min
Typ
Max
8.64
9.0
9.36
V
11.5V ≤ VI ≤ 24V
90
200
mV
13V ≤ VI ≤ 24V
100
150
mV
1mA ≤ IO ≤ 100mA
20
90
mV
TJ = 25 °C
TJ =25 °C
TJ =25 °C
1mA ≤ IO ≤ 40mA
45
mV
11.5V ≤ VI ≤ 24V
1mA ≤ IO ≤ 40mA
8.55
9.45
V
VO
11.5V ≤ VI ≤ VMAX
(Note 2)
1mA ≤ IO ≤ 70mA
8.55
9.45
V
IQ
TJ = 25 °C
Quiescent Current
10
Unit
6.0
mA
Quiescent Current
with line
∆IQ
13V ≤ VI ≤ 24V
1.5
mA
Change
with load
∆IQ
1mA ≤ IO ≤ 40mA
0.1
VN
TA = 25 °C, 10Hz ≤ f ≤ 100KHz
Output Noise Voltage
Temperature Coefficient of VO
∆VO/∆T
2.1
IO = 5mA
-0.9
Ripple Rejection
RR
f = 120Hz, 12V ≤ VI ≤ 22V, TJ = 25 °C
Dropout Voltage
VD
TJ = 25 °C
38
mA
µV/VO
70
mV/°C
44
dB
1.7
V
LM78L10 ELECTRICAL CHARACTERISTICS
(VI = 16V, IO = 40mA, 0 °C < T J < 125 °C, CI = 0.33 µF, CO = 0.1µF, unless otherwise specified. (Note 1)
Characteristic
Output Voltage
Symbol
VO
∆VO
Line Regulation
∆VO
Load Regulation
Output Voltage
VO
IQ
Quiescent Current
Test Conditions
Min
Typ
Max
9.6
10.0
10.4
V
12.5 < VI < 25V
100
220
mV
14V ≥ VI ≥ 25V
100
170
mV
1mA < IO< 100mA
20
94
mV
10
47
10.5
10.5
mV
4.2
6.5
TJ = 25 °C
TJ =25 °C
TJ =25 °C
1mA < IO < 70mA
12.5 < VI < 25V, 1mA < IO < 40mA
12.5 < VI < VMAX(Note), 1mA < IO < 70mA
9.5
9.5
TJ = 25 °C
TJ = 125 °C
6.0
Quiescent Current
with line
∆IQ
12.5 < VI < 25V
1.5
Change
with load
∆IQ
1mA < IO < 40mA
0.1
VN
TA = 25 °C, 10Hz < f < 100KHz
Output Noise Voltage
Temperature Coefficient of VO
∆VO/∆T IO = 5mA
Ripple Rejection
RR
f = 120Hz, 15V < VI < 25V, TJ = 25 °C
Dropout Voltage
VD
TJ = 25 °C
38
Unit
V
mA
mA
74
µV/VO
0.95
mV/ °C
43
dB
1.7
V
LM78LXX (KA78LXX, MC78LXX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM78L12 ELECTRICAL CHARACTERISTICS
(VI = 19V, IO = 40mA, 0 °C ≤T J ≤ 125 °C, CI = 0.33 µF, CO = 0.1µF, unless otherwise specified. (Note 1)
Characteristic
Output Voltage
Symbol
VO
∆VO
Line Regulation
∆VO
Load Regulation
Output Voltage
Quiescent Current
Test Conditions
Min
Typ
Max
11.5
12
12.5
V
14.5V ≤ VI ≤ 27V
20
250
mV
16V ≤ VI ≤ 27V
15
200
mV
1mA ≤ IO ≤ 100mA
20
100
mV
1mA ≤ IO ≤ 40mA
10
50
mV
TJ = 25 °C
TJ =25 °C
TJ =25 °C
Unit
14.5V ≤ VI ≤ 27V
1mA ≤ IO ≤ 40mA
11.4
12.6
V
VO
14.5V ≤ VI ≤ VMAX
(Note 2)
1mA ≤ IO ≤ 70mA
11.4
12.6
V
IQ
TJ = 25 °C
6.0
mA
Quiescent Current
with line
∆IQ
16V ≤ VI ≤ 27V
1.5
mA
Change
with load
∆IQ
1mA ≤ IO ≤ 40mA
0.1
VN
TA = 25 °C, 10Hz ≤ f ≤ 100KHz
Output Noise Voltage
Temperature Coefficient of VO
2.1
∆VO/∆T IO = 5mA
mV/ °C
-1.0
Ripple Rejection
RR
f = 120Hz, 15V ≤ VI ≤ 25V, TJ = 25 °C
Dropout Voltage
VD
TJ = 25 °C
37
mA
µV/VO
80
65
dB
1.7
V
LM78L15 ELECTRICAL CHARACTERISTICS
(VI = 23V, IO = 40mA, 0 °C ≤ T J ≤ 125°C, CI = 0.33 µF, CO = 0.1µF, unless otherwise specified. (Note 1)
Characteristic
Output Voltage
Symbol
VO
∆VO
Line Regulation
∆VO
Load Regulation
Output Voltage
Test Conditions
Min
Typ
Max
14.4
15
15.6
V
17.5V ≤ VI ≤ 30V
25
300
mV
20V ≤ VI ≤ 30V
20
250
mV
1mA ≤ IO ≤ 100mA
25
150
mV
1mA ≤ IO ≤ 40mA
12
75
mV
TJ = 25 °C
TJ =25 °C
TJ =25 °C
Unit
17.5V ≤ VI ≤ 30V
1mA ≤ IO ≤ 40mA
14.25
15.75
V
VO
17.5V ≤ VI ≤ VMAX
(Note 2)
1mA ≤ IO ≤ 70mA
14.25
15.75
V
IQ
TJ = 25 °C
6.0
mA
Quiescent Current
with line
∆IQ
20V ≤ VI ≤ 30V
1.5
mA
Change
with load
∆IQ
1mA ≤ IO ≤ 40mA
0.1
VN
TA = 25 °C, 10Hz ≤ f ≤ 100KHz
Quiescent Current
Output Noise Voltage
Temperature Coefficient of VO
2.1
∆VO/∆T IO = 5mA
Ripple Rejection
RR
f = 120Hz, 18.5V ≤ VI ≤ 28.5V, TJ = 25 °C
Dropout Voltage
VD
TJ = 25 °C
34
mA
90
µV/VO
-1.3
mV/ °C
60
dB
1.7
V
LM78LXX (KA78LXX, MC78LXX) FIXED VOLTAGE REGULATOR (POSITIVE)
LM78L18 ELECTRICAL CHARACTERISTICS
(VI = 27V, IO = 40mA, 0 °C ≤ T J ≤ 125 °C, CI = 0.33 µF, CO = 0.1µF, unless otherwise specified. (Note 1)
Characteristic
Output Voltage
Symbol
VO
∆VO
Line Regulation
∆VO
Load Regulation
Output Voltage
VO
Quiescent Current
IQ
Test Conditions
Min
Typ
Max
17.3
18
18.7
V
21V ≤ VI ≤ 33V
145
300
mV
22V ≤ VI ≤ 33V
135
250
mV
1mA ≤ IO≤100mA
30
170
mV
TJ = 25 °C
TJ =25 °C
TJ =25 °C
1mA ≤ IO ≤ 40mA
15
Unit
85
mV
21V ≤ VI ≤ 33V
1mA ≤ IO ≤ 40mA
17.1
18.9
V
21V ≤ VI ≤ VMAX
(Note 2)
1mA ≤ IO ≤ 70mA
17.1
18.9
V
TJ = 25 °C
6.0
mA
Quiescent Current
with line
∆IQ
21V ≤ VI ≤ 33V
1.5
mA
Change
with load
∆IQ
1mA ≤ IO ≤ 40mA
0.1
VN
TA = 25 °C, 10Hz ≤ f ≤ 100KHz
Output Noise Voltage
Temperature Coefficient of VO
2.2
∆VO/∆T IO = 5mA
Ripple Rejection
RR
f = 120Hz, 23V ≤ VI ≤ 33V, TJ = 25 °C
Dropout Voltage
VD
TJ = 25 °C
34
mA
150
µV/VO
-1.8
mV/ °C
48
dB
1.7
V
LM78L24 ELECTRICAL CHARACTERISTICS
(VI = 33V, IO = 40mA, 0 °C ≤ T J ≤ 125 °C, CI = 0.33 µF, CO = 0.1µF, unless otherwise specified. (Note 1)
Characteristic
Output Voltage
Symbol
VO
Line Regulation
∆VO
Load Regulation
∆VO
Output Voltage
VO
Quiescent Current
Quiescent Current
with line
Change
with load
Output Noise Voltage
∆IQ
∆IQ
VN
Temperature Coefficient of VO
IQ
Test Conditions
TJ = 25 °C
TJ =25 °C
TJ =25 °C
27V ≤ VI ≤ 38V
28V ≤ VI ≤ 38V
1mA ≤ IO ≤ 100mA
1mA ≤ IO ≤ 40mA
1mA ≤ IO ≤ 40mA
27V ≤ VI ≤ 38V
27V ≤ VI ≤ VMAX
1mA ≤ IO ≤ 70mA
(Note 2)
TJ = 2 5°C
28V ≤ VI ≤ 38V
1mA ≤ IO ≤ 40mA
TA = 25 °C, 10Hz ≤ f ≤ 100KHz
∆VO/∆T IO = 5mA
Min
Typ
Max
Unit
23
24
160
150
40
20
22.8
25
300
250
200
100
25.2
V
mV
mV
mV
mV
V
22.8
25.2
V
6.0
1.5
0.1
mA
mA
mA
2.2
200
µV/VO
-2.0
mV/ °C
Ripple Rejection
RR
34
45
dB
f = 120Hz, 28V ≤ VI ≤ 38V, TJ = 25 °C
1.7
V
Dropout Voltage
VD
TJ = 25 °C
Notes
1. The maximum steady state usable output current and input voltage are very dependent on the heat sinking and/or lead
length of the package. The data above represent pulse test conditions with junction temperature as indicated at the initiation
of tests.
2. Power dissipation ≤ 0.75W.
LM78LXX (KA78LXX, MC78LXX) FIXED VOLTAGE REGULATOR (POSITIVE)
TYPICAL APPLICATION
3(8)
INPUT
C1
0.33 µF
NOTE 2
KA78LXXA
NOTE 1
2(2,3,6,7)
1(1)
OUTPUT
0. 1 µF
NOTE 2
’( )’ : 8SOP Type
Notes
1. To specify an output voltage, substitute voltage value for “XX”.
2. Bypass Capacitors are recommend for optimum stability and transient response and should be located as close as
possible to the regulator
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
www.fairchildsemi.com
MC78MXX (LM78MXX) (KA78MXX)
3-Terminal 0.5A Positive Voltage Regulators
Description
•
•
•
•
•
•
The MC78MXX (LM78MXX) (KA78MXX) series of threeterminal positive regulators are available in the TO-220/
D-PAK package with several fixed output voltages making it
useful in a wide range of applications.
Output Current up to 0.5A
Output Voltages of 5, 6, 8, 10, 12, 15, 18, 20, 24V
Thermal Overload Protection
Short Circuit Protection
Output Transistor SOA Protection
Industrial and commercial temperature range
TO-220
D-PAK
1. Input 2. GND 3. Output
Rev. 1.0.0
©2000 Fairchild Semiconductor Corporation
Fixed Voltage Regulator (Positive)
Features
MC78MXX (LM78MXX) (KA78MXX)
Fixed Voltage Regulator (Positive)
Internal Block Diagram
2
MC78MXX (LM78MXX) (KA78MXX)
Absolute Maximum Ratings (Ta=+25°C, Unless otherwise specified)
Parameter
Symbol
Value
Unit
VI
VI
35
40
V
V
Thermal Resistance Junction-Cases
RθJC
5
°C/W
Thermal Resistance Junction-Air
RθJA
65
°C/W
Operating Temperature Range KA78MXXI/RI
KA78MXX/R
TOPR
-40~ + 125
0~ + 125
°C
°C
Storage Temperature Range
TSTG
-65~ + 150
°C
Input Voltage (for VO = 5V to 18V)
(for VO = 24V)
(Refer to the test circuits, TMIN ≤ TJ ≤ +125°C, IO=350mA, VI=10V, unless otherwise specified, CI = 0.33mF, CO=0.1mF)
Parameter
Output Voltage
Symbol
VO
Min.
Typ.
Max.
Units
TJ=+25°C
Conditions
4.8
5
5.2
V
IO = 5 to 350mA
VI= 7 to 20V
4.75
5
5.25
-
-
100
Line Regulation
∆VO
IO = 200mA
TJ =+25°C
VI = 8 to 25V
-
-
50
Load Regulation
∆VO
IO = 5mA to 0.5A, TJ =+25°C
-
-
100
IO = 5mA to 200mA, TJ =+25 °C
-
-
50
TJ=+25°C
-
4.0
6
mA
IO = 5mA to 350mA
-
-
0.5
mA
IO = 200mA
VI = 8 to 25V
-
-
0.8
IO = 5mA
TJ = 0 to +125°C
-
- 0.5
-
mV/°C
-
40
-
mV/VO
Quiescent Current
IQ
Quiescent Current
Change
∆IQ
Output Voltage Drift
∆V/∆T
VI= 7 to 25V
mV
mV
Output Noise Voltage
VN
f = 10Hz to 100KHz
Ripple Rejection
RR
f = 120Hz, IO = 300mA
VI = 8 to 18V
62
-
-
dB
Dropout Voltage
VD
TJ =+25°C, IO = 500mA
-
2
-
V
Short Circuit Current
ISC
TJ=+25°C, VI= 35V
-
300
-
mA
Peak Current
IPK
TJ =+25°C
-
700
-
mA
NOTE:
1. TMIN<TJ<TMAX
KA78MXX/Rl: TMIN= -40°C, TMAX = +125°C
KA78MXX/R: TMIN= 0°C, TMAX = +125°C
2. Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
3
Fixed Voltage Regulator (Positive)
KA78M05/I/R/RI Electrical Characteristics
MC78MXX (LM78MXX) (KA78MXX)
KA78M06/I/R/RI Electrical Characteristics
(Refer to the test circuits, TMIN ≤TJ ≤ +125°C, IO=350mA, VI =11V, unless otherwise specified, CI = 0.33mF, CO=0.1mF)(
Parameter
Output Voltage
Fixed Voltage Regulator (Positive)
Line Regulation
Load Regulation
Quiescent Current
Quiescent Current Change
Output Voltage Drift
Symbol
VO
∆VO
∆VO
IQ
∆IQ
∆V/∆T
Conditions
Min.
Typ.
Max.
Units
TJ=+25°C
5.75
6
6.25
V
IO = 5 to 350mA
VI= 8 to 21V
5.7
6
6.3
VI= 8 to 25V
-
-
100
VI = 9 to 25V
-
-
50
IO = 5mA to 0.5A, TJ =+25°C
-
-
120
IO = 5mA to 200mA, TJ =+25°C
-
-
60
TJ=+25°C
-
4.0
6
mA
IO = 5mA to 350mA
-
-
0.5
mA
IO = 200mA
VI = 9 to 25V
-
-
0.8
IO = 5mA
TJ = 0 to +125°C
-
- 0.5
-
mV/°C
-
45
-
mV/VO
IO = 200mA
TJ =+25°C
mV
mV
Output Noise Voltage
VN
f = 10Hz to 100KHz
Ripple Rejection
RR
f = 120Hz, IO = 300mA
VI = 9 to 19V
59
-
-
dB
Dropout Voltage
VD
TJ =+25°C, IO = 500mA
-
2
-
V
Short Circuit Current
ISC
TJ= +25°C, VI= 35V
-
300
-
mA
Peak Current
IPK
TJ =+25°C
-
700
-
mA
NOTE:
1. TMIN:
KA78MXX/RI: TMIN = -40°C
KA78MXX/R: TMIN = 0°C
2. Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
4
MC78MXX (LM78MXX) (KA78MXX)
KA78M08/I/R/RI ELECTRICAL CHARACTERISTICS
(Refer to the test circuits, TMIN ≤TJ≤ +125°C, IO=350mA, VI=14V, unless otherwise specified, CI =0.33mF, CO=0.1mF)
Parameter
Output Voltage
Line Regulation
Quiescent Current
Quiescent Current Change
VO
∆VO
∆VO
IQ
∆IQ
Conditions
Min.
Typ.
Max.
Units
TJ=+25 °C
7.7
8
8.3
V
IO = 5 to 350mA
VI= 10.5 to 23V
7.6
8
8.4
VI= 10.5 to 25V
-
-
100
VI = 11 to 25V
-
-
50
IO = 5mA to 0.5A, TJ =+25°C
-
-
160
IO = 5mA to 200mA, TJ =+25°C
-
-
80
TJ=+25°C
-
4.0
6
mA
IO = 5mA to 350mA
-
-
0.5
mA
IO = 200mA
VI = 10.5 to 25V
-
-
0.8
IO = 200mA
TJ =+25°C
mV
mV
Output Voltage Drift
RR
IO = 5mA
TJ = 0 to +125°C
-
- 0.5
-
mV/°C
Output Noise Voltage
VN
f = 10Hz to 100KHz
-
52
-
mV/VO
Ripple Rejection
RR
f = 120Hz, IO = 300mA
VI = 9 to 19V
56
-
-
dB
Dropout Voltage
VD
TJ =+25°C,IO = 500mA
-
2
-
V
Short Circuit Current
ISC
TJ =+25°C, VI= 35V
-
300
-
mA
Peak Current
IPK
TJ =+25°C
-
700
-
mA
NOTE:
1. TMIN:
KA78MXX/RI: TMIN = -40°C
KA78MXX/R: TMIN = 0°C
2. Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
5
Fixed Voltage Regulator (Positive)
Load Regulation
Symbol
MC78MXX (LM78MXX) (KA78MXX)
KA78M10/I/R/RI Electrical Characteristics
(Refer to the test circuits, TMIN ≤TJ ≤ +125°C, IO=350mA, VI=17V, unless otherwise specified, CI = 0.33mF, CO=0.1mF)
Parameter
Output Voltage
Fixed Voltage Regulator (Positive)
Line Regulation
Load Regulation
Quiescent Current
Quiescent Current Change
Output Voltage Drift
Symbol
VO
∆VO
∆VO
IQ
∆IQ
∆V/∆T
Conditions
Min.
Typ.
Max.
Units
TJ= +25°C
9.6
10
10.4
V
IO = 5 to 350mA
VI= 12.5 to 25V
9.5
10
10.5
VI= 12.5 to 25V
-
-
100
VI = 13 to 25V
-
-
50
IO = 5mA to 0.5A, TJ =+25°C
-
-
200
IO = 5mA to 200mA, TJ =+25°C
-
-
100
TJ=+25°C
-
4.1
6
mA
IO = 5mA to 350mA
-
-
0.5
mA
IO = 200mA
VI = 12.5 to 25V
-
-
0.8
IO = 5mA
TJ = 0 to +125°C
-
- 0.5
-
mV/°C
-
65
-
mV/VO
IO = 200mA
TJ =+25°C
mV
mV
Output Noise Voltage
VN
f = 10Hz to 100KHz
Ripple Rejection
RR
f = 120Hz, IO = 300mA
VI = 13 to 23V
55
-
-
dB
Dropout Voltage
VD
TJ =+25°C, IO = 500mA
-
2
-
V
Short Circuit Current
ISC
TJ= +25°C, VI= 35V
-
300
-
mA
Peak Current
IPK
TJ =+25°C
-
700
-
mA
NOTE:
1. TMIN:
KA78MXX/RI: TMIN = -40°C
KA78MXX/R: TMIN = 0°C
2. Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
6
MC78MXX (LM78MXX) (KA78MXX)
KA78M12/I/R/RI Electrical Characteristics
(Refer to the test circuits, TMIN ≤TJ ≤125°C, IO=350mA, VI =19V, unless otherwise specified, CI =0.33mF, CO =0.1mF)
Parameter
Output Voltage
Symbol
VO
∆VO
Load Regulation
∆V
Quiescent Current
Quiescent Current Change
Output Voltage Drift
O
IQ
∆IQ
∆V/∆T
Min.
Typ.
Max.
Units
TJ=+25°C
11.5
12
12.5
V
IO = 5 to 350mA
VI= 14.5 to 27V
11.5
12
12.6
VI= 14.5 to 30V
-
-
100
VI = 16 to 30V
-
-
50
IO = 5mA to 0.5A, TJ =+25°C
-
-
240
IO = 5mA to 200mA, TJ =+25°C
-
-
120
TJ=+25°C
-
4.1
IO = 5mA to 350mA
-
IO = 200mA
VI = 14.5 to 30V
-
-
0.8
IO = 5mA
TJ = 0 to +125°C
-
- 0.5
-
mV/°C
-
75
-
mV/VO
-
dB
-
V
IO = 200mA
TJ =+25°C
mV
mV
6
mA
0.5
mA
Output Noise Voltage
VN
f = 10Hz to 100KHz
Ripple Rejection
RR
f = 120Hz, IO = 300mA
VI = 15 to 25V
55
Dropout Voltage
VD
TJ =+25°C, IO = 500mA
-
Short Circuit Current
ISC
TJ= +25°C, VI= 35V
-
300
-
mA
Peak Current
IPK
TJ = +25°C
-
700
-
mA
2
NOTE:
1. TMIN:
KA78MXX/RI: TMIN = -40°C
KA78MXX/R: TMIN = 0°C
2. Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
7
Fixed Voltage Regulator (Positive)
Line Regulation
Conditions
MC78MXX (LM78MXX) (KA78MXX)
KA78M15/I/R/RI ELECTRICAL CHARACTERISTICS
(Refer to the test circuits, TMIN ≤TJ ≤ +125°C, IO=350mA, VI =23V, unless otherwise specified, CI = 0.33mF, CO=0.1mF)
Parameter
Output Voltage
Fixed Voltage Regulator (Positive)
Line Regulation
Load Regulation
Quiescent Current
Quiescent Current Change
Output Voltage Drift
Symbol
VO
∆VO
∆VO
IQ
∆IQ
∆V/∆T
Conditions
Min.
Typ.
Max.
Units
TJ=+25°C
14.4
15
15.6
V
IO = 5 to 350mA
VI= 17.5 to 30V
14.25
15
15.75
VI= 17.5 to 30V
-
-
100
VI = 20 to 30V
-
-
50
IO = 5mA to 0.5A, TJ =+25°C
-
-
300
IO = 5mA to 200mA, TJ =+25°C
-
-
150
TJ=+25°C
-
4.1
6
mA
IO = 5mA to 350mA
-
-
0.5
mA
IO = 200mA
VI = 17.5 to 30V
-
-
0.8
IO = 5mA
TJ = 0 to +125°C
-
-1
-
mV/°C
-
100
-
mV/VO
IO = 200mA
TJ =+25°C
mV
mV
Output Noise Voltage
VN
f = 10Hz to 100KHz
Ripple Rejection
RR
f = 120Hz, IO = 300mA
VI = 18.5 to 28.5V
54
Dropout Voltage
VD
TJ =+25°C, IO = 500mA
-
Short Circuit Current
ISC
TJ= +25°C, VI= 35V
-
300
-
mA
Peak Current
IPK
TJ = + 25°C
-
700
-
mA
dB
2
-
V
NOTE:
1. TMIN:
KA78MXX/RI: TMIN = -40°C
KA78MXX/R: TMIN = 0°C
2. Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
8
MC78MXX (LM78MXX) (KA78MXX)
KA78M18/I/R/RI Electrical Characteristics
(Refer to the test circuits, TMIN ≤TJ ≤ +125°C, IO=350mA, VI =26V, unless otherwise specified, CI = 0.33mF, CO=0.1mF)
Parameter
Output Voltage
Line Regulation
Quiescent Current
Quiescent Current Change
Output Voltage Drift
VO
∆VO
∆VΟ
IQ
∆IQ
∆V/∆T
Conditions
Min.
Typ.
Max.
Units
TJ=+25°C
17.3
18
18.7
V
IO = 5 to 350mA
VI= 20.5 to 33V
17.1
18
18.9
IO = 200mA VI= 21 to 33V
-
-
100
TJ =+25°C
-
-
50
IO = 5mA to 0.5A, TJ =+25°C
-
-
360
IO = 5mA to 200mA, TJ =+25°C
-
-
180
TJ =+25°C
-
4.2
6
mA
IO = 5mA to 350mA
-
-
0.5
mA
IO = 200mA
VI = 21 to 33V
-
-
0.8
IO =5mA
TJ =0 to 125°C
-
-1.1
-
mV/°C
100
-
µV/VO
-
dB
VI = 24 to 33V
mV
mV
Output Noise Voltage
VN
f=10Hz to 100KHz
Ripple Rejection
RR
f=120Hz, IO=300mA
Dropout Voltage
VD
TJ =+25°C, IO=500mA
-
2
-
V
Short Circuit Current
ISC
TJ =+25°C, VI=35V
-
300
-
mA
Peak Current
IPK
TJ =+25°C
-
700
-
mA
53
NOTE:
1. TMIN:
KA78MXX/R: TMIN = -40°C
KA78MXX/R: TMIN = 0°C
2. Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
9
Fixed Voltage Regulator (Positive)
Load Regulation
Symbol
MC78MXX (LM78MXX) (KA78MXX)
KA78M20/I/R/RI Electrical Characteristics
(Refer to the test circuits, TMIN ≤TJ≤ +125°C, IO=350mA, VI =29V, unless otherwise specified, CI = 0.33mF, CO=0.1mF)
Parameter
Output Voltage
Symbol
VO
Conditions
Min.
Typ.
Max.
Units
19.2
20
20.8
V
19
20
21
IO = 200mA VI= 23 to 35V
TJ =+25°C VI = 24 to 35V
-
-
100
-
-
50
IO = 5mA to 0.5A, TJ =+25°C
-
-
400
IO = 5mA to 200mA, TJ =+25°C
-
-
200
TJ=+25°C
-
4.2
6
mA
IO = 5mA to 350mA
-
-
0.5
mA
IO = 200mA
VI = 23 to 35V
-
-
0.8
IO = 5mA
TJ = 0 to +125°C
-
-1.1
-
mV/°C
-
110
-
mV/VO
TJ= +25°C
IO = 5 to 350mA
VI= 23 to 35V
Fixed Voltage Regulator (Positive)
Line Regulation
Load Regulation
Quiescent Current
Quiescent Current Change
Output Voltage Drift
∆VO
∆VO
IQ
∆IQ
∆V/∆T
mV
mV
Output Noise Voltage
VN
f = 10Hz to 100KHz
Ripple Rejection
RR
f = 120Hz, IO = 300mA
VI = 24 to 34V
53
-
-
dB
Dropout Voltage
VD
TJ =+25°C, IO = 500mA
-
2
-
V
Short Circuit Current
ISC
TJ = +25°C, VI= 35V
-
300
-
mA
Peak Current
IPK
TJ = +25°C
-
700
-
mA
NOTE:
1. TMIN:
KA78MXX/RI: TMIN = -40°C
KA78MXX/R: TMIN = 0°C
2. Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
10
MC78MXX (LM78MXX) (KA78MXX)
KA78M24/I/R/RI Electrical Characteristics
(Refer to the test circuits, TMIN ≤TJ ≤ +125°C, IO=350mA, VI=33V, unless otherwise specified, CI = 0.33mF, CO=0.1mF)
Parameter
Output Voltage
Symbol
VO
Conditions
Min.
Typ.
Max.
Units
23
24
25
V
22.8
24
25.2
IO = 200mA VI= 27 to 38V
TJ =+25°C VI = 28 to 38V
-
-
100
-
-
50
IO = 5mA to 0.5A, TJ =+25°C
-
-
480
IO = 5mA to 200mA, TJ =+25°C
-
-
240
TJ=+25°C
-
4.2
6
mA
IO = 5mA to 350mA
-
-
0.5
mA
IO = 200mA
VI = 27 to 38V
-
-
0.8
IO = 5mA
TJ = 0 to +125°C
-
- 1.2
-
mV/°C
-
170
-
mV/VO
TJ=+25°C
IO = 5 to 350mA
VI= 27 to 38V
Line Regulation
Quiescent Current
Quiescent Current Change
Output Voltage Drift
∆VO
IQ
∆IQ
∆V/∆T
mV
mV
Output Noise Voltage
VN
f = 10Hz to 100KHz
Ripple Rejection
RR
f = 120Hz, IO = 300mA
VI = 28 to 38V
50
-
-
dB
Dropout Voltage
VD
TJ =+25°C, IO = 500mA
-
2
-
V
Short Circuit Current
ISC
TJ= +25 °C, VI= 35V
-
300
-
mA
Peak Current
IPK
TJ =+25°C
-
700
-
mA
NOTE:
1. TMIN:
KA78MXX/RI: TMIN = -40°C
KA78MXX/R: TMIN = 0°C
2. Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
11
Fixed Voltage Regulator (Positive)
Load Regulation
∆VO
MC78MXX (LM78MXX) (KA78MXX)
Typical Applications
Fixed Voltage Regulator (Positive)
Figure 1. Fixed Output Regulator
Figure 2. Constant Current Regulator
Notes:
1. To specify an output voltage, substitute voltage value for "XX"
2. Although no output capacitor is needed for stability, it does improve transient response.
3. Required if regulator is located an appreciable distance from power Supply filter
Figure 3. Circuit for Increasing Output Voltage
12
MC78MXX (LM78MXX) (KA78MXX)
Fixed Voltage Regulator (Positive)
Figure 4. Adjustable Output Regulator (7 to 30V)
Figure 5. 0.5 to 10V Regulator
13
MC78MXX (LM78MXX) (KA78MXX)
Ordering Information
Device
Package
MC78MXXCT (LM78XXCT) (KA78MXX)
TO-220
KA78MXXI
MC78MXXCDT (KA78MXXR)
Fixed Voltage Regulator (Positive)
KA78MXXRI
14
Operating Temperature
0 ~ + 125°C
-40 ~ +125°C
D-PAK
0 ~ + 125°C
-40 ~ + 125°C
MC78MXX (LM78MXX) (KA78MXX)
Package Dimensions
Fixed Voltage Regulator (Positive)
15
MC78MXX (LM78MXX) (KA78MXX)
Fixed Voltage Regulator (Positive)
Package Dimensions (Continued)
16
MC78MXX (LM78MXX) (KA78MXX)
Fixed Voltage Regulator (Positive)
17
Fixed Voltage Regulator (Positive)
MC78MXX (LM78MXX) (KA78MXX)
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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 1999 Fairchild Semiconductor Corporation
LM78MXX/I
FIXED VOLTAGE REGULATOR (POSITIVE)
3-TERMINAL 0.5A POSITIVE
VOLTAGE REGULATORS
TO-220
The LM78MXXC/I series of three-terminal positive regulators are available in the TO-220 package with several fixed output voltages making
it useful in a wide range of applications.
FEATURES
•
•
•
•
•
•
Output Current up to 0.5A
Output Voltages of 5; 6; 8; 10; 12; 15; 18; 20; 24V
Thermal Overload Protection
Short Circuit Protection
Output Transistor SOA Protection
lndustrial and commercial temperature range
1:Input 2: GND 3: Output
ORDERING INFORMATION
Device
Package
LM78MXXT
TO-220
Operating Temperature
0 ~ + 125°C
LM78MXXlT
TO-220
- 40 ~ +125°C
BLOCK DIAGRAM
Rev. B
1999 Fairchild Semiconductor Corporation
ABSOLUTE MAXIMUM RATINGS (TA=25°C, unless otherwise specified)
LM78MXX/I
FIXED VOLTAGE REGULATOR (POSITIVE)
Characteristic
Symbol
Value
Unit
VI
VI
REJC
REJA
35
40
5
65
-40~ + 125
0~ + 125
-65~ + 150
V
V
°C /W
°C /W
°C
°C
Input Voltage (for VO = 5V to 18V)
(for VO = 24V)
Thermal Resistance Junction-Cases
Thermal Resistance Junction-Air
Operating Temperature Range KA78XXI
KA78XX
Storage Temperature Range
T OPR
T STG
°C
LM78M05/I ELECTRICAL CHARACTERISTICS
(Refer to the test circuits, TMIN T J 125°C, IO=350mA, VI=10V, unless otherwise specified, CI = 0.33µF, CO=0.1µF)
Characteristic
Symbol
Output Voltage
VO
Line Regulation
∆VO
Test Conditions
T J= 25°C
IO = 5 to 350mA
VI= 7 to 20V
IO = 200mA
T J = 25°C
Load Regulation
Quiescent Current
∆VO
IQ
Quiescent Current Change
∆IQ
Output Voltage Drift
∆VO
∆T
Output Noise Voltage
VN
Min
Typ
Max
4.8
5
5.2
4.75
5
5.25
VI= 7 to 25V
VI = 8 to 25V
100
50
IO = 5mA to 0.5A, TJ = 25°C
100
IO = 5mA to 200mA, TJ = 25°C
50
4.0
T J= 25°C
IO = 5mA to 350mA
IO = 200mA
VI = 8 to 25V
IO = 5mA
T J = 0 to 125°C
f = 10Hz to 100KHz
Ripple Rejection
RR
f = 120Hz, IO = 300mA
VI = 8 to 18V
Dropout Voltage
VD
T J = 25°C, IO = 500mA
Short Circuit Current
ISC
Peak Current
IPK
6
Unit
V
mV
mV
mA
0.5
0.8
mA
- 0.5
mV/°C
40
µV
62
dB
2
V
T J= 25°C, VI= 35V
300
mA
T J = 25°C
700
mA
* T MIN T J T MAX
LM78MXXl:TMIN=-40°C, TMAX = +125°C
LM78MXX: TMIN=0°C, TMAX = +125°C
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects
must be taken into account separately. Pulse testing with low duty is used.
LM78MXX/I
FIXED VOLTAGE REGULATOR (POSITIVE)
LM78M06/I ELECTRICAL CHARACTERISTICS
(Refer to the test circuits, TMIN T J 125°C, IO=350mA, VI=11V, unless otherwise specified, CI = 0.33µF, CO=0.1µF)
Characteristic
Symbol
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
Quiescent Current
∆VO
IQ
Quiescent Current Change
∆IQ
Output Voltage Drift
∆VO
∆T
Output Noise Voltage
VN
Test Conditions
T J= 25°C
IO = 5 to 350mA
VI= 8 to 21V
IO = 200mA
T J = 25°C
Min
Typ
Max
5.75
6
6.25
5.7
6
6.3
VI= 8 to 25V
VI = 9 to 25V
100
50
IO = 5mA to 0.5A, TJ = 25°C
120
IO = 5mA to 200mA, TJ = 25°C
60
4.0
T J= 25°C
IO = 5mA to 350mA
IO = 200mA
VI = 9 to 25V
IO = 5mA
T J = 0 to 125°C
f = 10Hz to 100KHz
Ripple Rejection
RR
f = 120Hz, IO = 300mA
VI = 9 to 19V
Dropout Voltage
VD
T J = 25°C, IO = 500mA
Short Circuit Current
ISC
T J= 25°C, VI= 35V
6
Unit
V
mV
mV
mA
0.5
0.8
mA
- 0.5
mV/°C
45
µV
59
dB
2
V
300
mA
700
mA
Peak Current
IPK
T J = 25°C
*TMIN
LM78MXXI:TMIN=-40°C
LM78MXX:TMIN=0°C
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78MXX/I
FIXED VOLTAGE REGULATOR (POSITIVE)
LM78M08/I ELECTRICAL CHARACTERISTICS
(Refer to the test circuits, TMIN T J 125°C, IO=350mA, VI=14V, unless otherwise specified, CI = 0.33µF, CO=0.1µF)
Characteristic
Output Voltage
Line Regulation
Load Regulation
Quiescent Current
Quiescent Current Change
Output Voltage Drift
Output Noise Voltage
Symbol
VO
∆VO
∆VO
IQ
∆IQ
∆VO
∆T
VN
Test Conditions
Min
Typ
Max
7.7
8
8.3
7.6
8
8.4
T J= 25°C
IO = 5 to 350mA
VI= 10.5 to 23V
IO = 200mA
VI= 10.5 to 25V
100
T J = 25°C
VI = 11 to 25V
50
IO = 5mA to 0.5A, TJ = 25°C
160
IO = 5mA to 200mA, TJ = 25°C
80
4.0
T J= 25°C
IO = 5mA to 350mA
IO = 200mA
VI = 10.5 to 25V
IO = 5mA
T J = 0 to 125°C
f = 10Hz to 100KHz
Ripple Rejection
RR
f = 120Hz, IO = 300mA
VI = 9 to 19V
Dropout Voltage
VD
T J = 25°C, IO = 500mA
Short Circuit Current
ISC
T J= 25°C, VI= 35V
Unit
V
mV
mV
6
mA
0.5
0.8
mA
- 0.5
mV/°C
52
µV
56
dB
2
V
300
mA
700
mA
Peak Current
IPK
T J = 25°C
*TMIN
LM78MXXI:TMIN=-40°C
LM78MXX:TMIN=0°C
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78MXX/I
FIXED VOLTAGE REGULATOR (POSITIVE)
LM78M10/I ELECTRICAL CHARACTERISTICS
(Refer to the test circuits, TMIN T J 125°C, IO=350mA, VI=17V, unless otherwise specified, CI = 0.33µF, CO=0.1µF)
Characteristic
Symbol
Output Voltage
VO
Line Regulation
∆VO
Test Conditions
T J= 25°C
IO = 5 to 350mA
VI= 12.5 to 25V
IO = 200mA
T J = 25°C
Load Regulation
Quiescent Current
Quiescent Current Change
Output Voltage Drift
Output Noise Voltage
∆VO
IQ
∆IQ
∆VO
∆T
VN
Min
Typ
Max
9.6
10
10.4
9.5
10
10.5
VI= 12.5 to 25V
VI = 13 to 25V
100
50
IO = 5mA to 0.5A, TJ = 25°C
200
IO = 5mA to 200mA, TJ = 25°C
100
4.1
T J= 25°C
IO = 5mA to 350mA
IO = 200mA
VI = 12.5 to 25V
IO = 5mA
T J = 0 to 125°C
Ripple Rejection
RR
Dropout Voltage
VD
T J = 25°C, IO = 500mA
Short Circuit Current
ISC
T J= 25°C, VI= 35V
V
mV
mV
mA
0.5
0.8
f = 10Hz to 100KHz
f = 120Hz, IO = 300mA
VI = 13 to 23V
6
Unit
mA
- 0.5
mV/°C
65
µV
55
dB
2
V
300
mA
700
mA
Peak Current
IPK
T J = 25°C
*TMIN
LM78MXXI:TMIN=-40°C
LM78MXX:TMIN=0°C
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78MXX/I
FIXED VOLTAGE REGULATOR (POSITIVE)
LM78M12/I ELECTRICAL CHARACTERISTICS
(Refer to the test circuits, TMIN T J 125°C, IO=350mA, VI=19V, unless otherwise specified, CI = 0.33µF, CO=0.1µF)
Characteristic
Symbol
Output Voltage
VO
Lines Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
Quiescent Current Change
Output Voltage Drift
Output Noise Voltage
Ripple Rejection
IQ
∆IQ
∆VO
∆T
VN
RR
Test Conditions
T J= 25°C
IO = 5 to 350mA
VI= 14.5 to 27V
IO = 200mA
VI= 14.5 to 30V
VI = 16 to 30V
T J = 25°C
Min
Typ
Max
11.5
12
12.5
11.5
12
12.6
100
50
IO = 5mA to 0.5A, TJ = 25°C
240
IO = 5mA to 200mA, TJ = 25°C
120
4.1
T J= 25°C
IO = 5mA to 350mA
IO = 200mA
VI = 14.5 to 30V
IO = 5mA
T J = 0 to 125°C
Dropout Voltage
VD
T J = 25°C, IO = 500mA
Short Circuit Current
ISC
T J= 25°C, VI= 35V
V
mV
mV
mA
0.5
0.8
f = 10Hz to 100KHz
f = 120Hz, IO = 300mA
VI = 15 to 25V
6
Unit
mA
- 0.5
mV/°C
75
µV
55
dB
2
V
300
mA
700
mA
Peak Current
IPK
T J = 25°C
*TMIN
LM78MXXI:TMIN=-40°C
LM78MXX:TMIN=0°C
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78MXX/I
FIXED VOLTAGE REGULATOR (POSITIVE)
LM78M15/I ELECTRICAL CHARACTERISTICS
(Refer to the test circuits, TMIN T J 125°C, IO=350mA, VI=23V, unless otherwise specified, CI = 0.33µF, CO=0.1µF)
Characteristic
Symbol
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
Quiescent Current Change
IQ
∆IQ
Test Conditions
T J= 25°C
IO = 5 to 350mA
VI= 17.5 to 30V
IO = 200mA
VI= 17.5 to 30V
VI = 20 to 30V
T J = 25°C
Typ
Max
14.4
15
15.6
14.25
15
15.75
100
50
IO = 5mA to 0.5A, TJ = 25°C
300
IO = 5mA to 200mA, TJ = 25°C
150
4.1
T J= 25°C
IO = 5mA to 350mA
IO = 200mA
VI = 17.5 to 30V
IO = 5mA
T J = 0 to 125°C
Output Noise Voltage
∆VO
∆T
VN
Ripple Rejection
RR
f = 120Hz, IO = 300mA
VI = 18.5 to 28.5V
Dropout Voltage
VD
T J = 25°C, IO = 500mA
Short Circuit Current
ISC
T J= 25°C, VI= 35V
Output Voltage Drift
Min
6
Unit
V
mV
mV
mA
0.5
0.8
f = 10Hz to 100KHz
mA
-1
mV/°C
100
µV
54
dB
2
V
300
mA
700
mA
Peak Current
IPK
T J = 25°C
*TMIN
LM78MXXI:TMIN=-40°C
LM78MXX:TMIN=0°C
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78MXX/I
FIXED VOLTAGE REGULATOR (POSITIVE)
LM78M18/I ELECTRICAL CHARACTERISTICS
(Refer to the test circuits, TMIN T J 125°C, IO=350mA, VI=26V, unless otherwise specified, CI = 0.33µF, CO=0.1µF)
Characteristic
Symbol
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
Quiescent Current
Quiescent Current Change
∆VO
IQ
∆IQ
Test Conditions
T J= 25°C
IO = 5 to 350mA
VI= 20.5 to 33V
IO = 200mA
T J = 25°C
Typ
Max
18
18.7
17.1
18
18.9
VI= 21 to 33V
VI = 24 to 33V
100
50
IO = 5mA to 0.5A, TJ = 25°C
360
IO = 5mA to 200mA, TJ = 25°C
180
4.2
T J= 25°C
IO = 5mA to 350mA
IO = 200mA
VI = 21 to 33V
IO = 5mA
T J = 0 to 125°C
Output Noise Voltage
∆VO
∆T
VN
Ripple Rejection
RR
f = 120Hz, IO = 300mA
VI = 22 to 32V
Dropout Voltage
VD
T J = 25°C, IO = 500mA
Short Circuit Current
ISC
T J= 25°C, VI= 35V
Output Voltage Drift
Min
17.3
6
Unit
V
mV
mV
mA
0.5
0.8
f = 10Hz to 100KHz
mA
- 1.1
mV/°C
100
µV
53
dB
2
V
300
mA
700
mA
Peak Current
IPK
T J = 25°C
*TMIN
LM78MXXI:TMIN=-40°C
LM78MXX:TMIN=0°C
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78MXX/I
FIXED VOLTAGE REGULATOR (POSITIVE)
LM78M20/I ELECTRICAL CHARACTERISTICS
(Refer to the test circuits, TMIN T J 125°C, IO=350mA, VI=29V, unless otherwise specified, CI = 0.33µF, CO=0.1µF)
Characteristic
Symbol
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
Quiescent Current Change
Test Conditions
T J= 25°C
IO = 5 to 350mA
VI= 23 to 35V
IO = 200mA
T J = 25°C
IQ
∆IQ
Typ
Max
19.2
20
20.8
19
20
21
VI= 23 to 35V
VI = 24 to 35V
100
50
IO = 5mA to 0.5A, TJ = 25°C
400
IO = 5mA to 200mA, TJ = 25°C
200
4.2
T J= 25°C
IO = 5mA to 350mA
IO = 200mA
VI = 23 to 35V
IO = 5mA
T J = 0 to 125°C
Output Noise Voltage
∆VO
∆T
VN
Ripple Rejection
RR
f = 120Hz, IO = 300mA
VI = 24 to 34V
Dropout Voltage
VD
T J = 25°C, IO = 500mA
Short Circuit Current
ISC
T J= 25°C, VI= 35V
Output Voltage Drift
Min
6
Unit
V
mV
mV
mA
0.5
0.8
f = 10Hz to 100KHz
mA
- 1.1
mV/°C
110
µV
53
dB
2
V
300
mA
700
mA
Peak Current
IPK
T J = 25°C
*TMIN
LM78MXXI:TMIN=-40°C
LM78MXX:TMIN=0°C
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78MXX/I
FIXED VOLTAGE REGULATOR (POSITIVE)
LM78M24/I ELECTRICAL CHARACTERISTICS
(Refer to the test circuits, TMIN T J 125°C, IO=350mA, VI=33V, unless otherwise specified, CI = 0.33µF, CO=0.1µF)
Characteristic
Output Voltage
Line Regulation
Symbol
VO
∆VO
Test Conditions
T J= 25°C
IO = 5 to 350mA
VI= 27 to 38V
IO = 200mA
T J = 25°C
Load Regulation
Quiescent Current
Quiescent Current Change
∆VO
IQ
∆IQ
Typ
Max
23
24
25
22.8
24
25.2
VI= 27 to 38V
VI = 28 to 38V
100
50
IO = 5mA to 0.5A, TJ = 25°C
480
IO = 5mA to 200mA, TJ = 25°C
240
4.2
T J= 25°C
IO = 5mA to 350mA
IO = 200mA
VI = 27 to 38V
IO = 5mA
T J = 0 to 125°C
Output Noise Voltage
∆VO
∆T
VN
Ripple Rejection
RR
f = 120Hz, IO = 300mA
VI = 28 to 38V
Dropout Voltage
VD
T J = 25°C, IO = 500mA
Short Circuit Current
ISC
T J= 25°C, VI= 35V
Output Voltage Drift
Min
- 1.2
f = 10Hz to 100KHz
170
50
Unit
V
mV
mV
6
mA
0.5
0.8
mA
mV/°C
µV
dB
2
V
300
mA
700
mA
Peak Current
IPK
T J = 25°C
*TMIN
LM78MXXI:TMIN=-40°C
LM78MXX:TMIN=0°C
* Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM78MXX/I
FIXED VOLTAGE REGULATOR (POSITIVE)
APPLICATION CIRCUIT
Fig. 1 Fixed output regulator
Fig. 2 Constant current regulator
Notes:
(1) To specify an output voltage, substitute voltage value for "XX".
(2) Although no output capacitor is needed for stability, it does
improve transient response.
(3) Required if regulator is located an appreciable distance from
power Supply filter.
Fig. 3 Circuit for Increasing output voltage
Fig. 5 0.5 to 10V Regulator
Fig. 4 Adjustable output regulator (7 to 30V)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
LM79XX/A (KA79XX, MC79XX) FIXED VOLTAGE REGULATOR (NEGATIVE)
3-TERMINAL 1A NEGATIVE VOLTAGE REGULATORS
The LM79XX series of three-terminal negative regulators are available in
TO-220 package and with several fixed output voltages, making them useful
in a wide range of applications. Each type employs internal current limiting,
thermal shut-down and safe area protection, making it essentially indestructible.
TO-220
FEATURES
•
•
•
•
•
Output Current in Excess of 1A
Output Voltages of -5, -6, -8, -12, -15, -18, -24V
Internal Thermal Overload Protection
Short Circuit Protection
Output Transistor Safe-Area Compensation
1: GND 2: Input 3: Output
ORDERING INFORMATION
Device
Output Voltage
Tolerance
LM79XXCT
± 4%
LM79XXAT
± 2%
Package
Operating Temperature
TO-220
0 ~ +125 °C
BLOCK DIAGRAM
GND
R1
VOLTAGE
REFERENCE
R2
Out
+
Q1
Q2
I1
I2
PROTECTION
CIRCUITRY
Rsc
In
Rev. B
1999 Fairchild Semiconductor Corporation
LM79XX/A (KA79XX, MC79XX) FIXED VOLTAGE REGULATOR (NEGATIVE)
ABSOLUTE MAXIMUM RATINGS (TA=+25°C, unless otherwise specified)
Characteristic
Symbol
Value
Unit
VI
-35
Thermal Resistance Junction-Cases
Junction-Air
Input Voltage
RθJC
5
65
V
°C / W
°C /W
Operating Temperature Range
TOPR
0 ~ +125
°C
Storage Temperature Range
TSTG
- 65 ~ +150
°C
RθJA
LM7905 ELECTRICAL CHARACTERISTICS
(VI = 10V, lO = 500mA, 0°C ≤T J ≤ +125°C, CI =2.2µF, CO =1µF, unless otherwise specified.)
Characteristic
Output Voltage
Line Regulation
Symbol
VO
∆VO
Test Conditions
TJ =+25°C
IO = 5mA to 1A, PO 15W
VI = -7 to -20V
VI = -7 to -20V
IO=1A
TJ =25°C
VI = -8 to -12V
IO=1A
VI = -7.5 to -25V
Min
Typ
- 4.8
- 5.0
- 5.2
- 4.75
-5.0
- 5.25
5
50
2
25
7
50
7
50
10
100
3
50
mV
3
6
mA
0.05
0.1
- 0.4
0.5
0.8
mA
VI= -8 to -12V
IO=1A
IO = 5mA to 1.5A
Load Regulation
Quiescent Current
Quiescent Current Change
Temperature Coefficient of VD
∆VO
IQ
∆IQ
∆VO/∆T
TJ =+25°C
IO = 250 to 750mA
TJ =+25°C
IO = 5mA to 1A
VI = -8 to -25V
IO = 5mA
Output Noise Voltage
VN
Ripple Rejection
RR
Dropout Voltage
VD
Short Circuit Current
ISC
f = 10Hz to 100KHz
TA =+25°C
f = 120Hz, IO = -35V
∆VI = 10V
TJ=+25°C
IO = 1A
TJ =+25°C, VI = -35V
Peak Current
IPK
TJ =+25°C
54
Max
Unit
V
mV
mV/°C
40
µV
60
dB
2
V
300
mA
2.2
A
* Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be
taken into account separately. Pulse testing with low duty is used.
LM79XX/A (KA79XX, MC79XX) FIXED VOLTAGE REGULATOR (NEGATIVE)
LM7906 ELECTRICAL CHARACTERISTICS
(VI = 11V, lO = 500mA, 0°C ≤T J≤ +125°C, CI =2.2µF, CO = 1µF, unless otherwise specified.)
Characteristic
Symbol
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
Quiescent Current
Quiescent Current Change
Temperature Coefficient of VD
∆VO
IQ
∆IQ
∆VO/∆T
Test Conditions
TJ = +25°C
IO = 5mA to 1A, PO 15W
VI = - 9 to - 21V
VI = - 8 to - 25V
TJ = 25°C
VI= - 9 to -12V
Min
Typ
Max
- 5.75
-6
- 6.25
- 5.7
-6
- 6.3
10
5
120
60
10
120
3
60
TJ =+ 25°C
IO = 5mA to 1.5A
TJ =+ 25°C
IO = 250 to 750mA
TJ =+ 25°C
IO = 5mA to 1A
VI = -9 to -25V
IO = 5mA
Output Noise Voltage
VN
Ripple Rejection
RR
Dropout Voltage
VD
Short Circuit Current
ISC
f = 10Hz to 100KHz
TA =+ 25°C
f = 120Hz
∆VI = 10V
TJ=+ 25°C
IO = 1A
TJ= +25°C, VI = -35V
Peak Current
IPK
TJ= +25°C
Unit
V
mV
mV
3
54
6
mA
0.5
1.3
mA
-0.5
mV/°C
130
µV
60
dB
2
V
300
mA
2.2
A
* Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be
taken into account separately. Pulse testing with low duty is used.
LM79XX/A (KA79XX, MC79XX) FIXED VOLTAGE REGULATOR (NEGATIVE)
LM7908 ELECTRICAL CHARACTERISTICS
(VI = 14V, lO = 500mA, 0°C ≤T J ≤ +125°C, CI =2.2µF, CO = 1µF, unless otherwise specified.)
Characteristic
Output Voltage
Line Regulation
Load Regulation
Symbol
VO
∆VO
∆VO
Quiescent Current
IQ
Quiescent Current Change
∆IQ
Temperature Coefficient of VD
∆VO/∆T
Test Conditions
TJ =+ 25°C
IO = 5mA to 1A, PO 15W
VI = -1.5 to -23V
VI = -10.5 to -25V
TJ = 25°C
VI= -11 to -17V
Min
Typ
Max
- 7.7
-8
- 8.3
- 7.6
-8
- 8.4
10
5
100
80
12
160
4
80
TJ =+ 25°C
IO = 5mA to 1.5A
TJ =+ 25°C
IO = 250 to 750mA
TJ =+ 25°C
IO = 5mA to 1A
VI = -11.5 to -25V
IO = 5mA
Output Noise Voltage
VN
Ripple Rejection
RR
Dropout Voltage
VD
Short Circuit Current
ISC
f = 10Hz to 100KHz
TA =+ 25°C
f = 120Hz
∆VI = 10V
TJ=+ 25°C
IO = 1A
TJ=+ 25°C, VI = -35V
Peak Current
IPK
TJ=+ 25°C
Unit
V
mV
mV
54
3
6
mA
0.05
0.1
-0.6
0.5
1
mA
mV/°C
175
µV
60
dB
2
V
300
mA
2.2
A
* Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM79XX/A (KA79XX, MC79XX) FIXED VOLTAGE REGULATOR (NEGATIVE)
LM7909 ELECTRICAL CHARACTERISTICS
(VI = 14V, lO = 500mA, 0°C ≤T J ≤+ 125°C, CI =2.2µF, CO = 1µF, unless otherwise specified)
Characteristic
Output Voltage
Line Regulation
Load Regulation
Symbol
VO
∆VO
∆VO
Quiescent Current
IQ
Quiescent Current Change
∆IQ
Temperature Coefficient of VD
∆VO/∆T
Test Conditions
Min
Typ
Max
- 8.7
- 9.0
- 9.3
- 8.6
- 9.0
- 9.4
10
5
180
90
TJ =+ 25°C
IO = 5mA to 1.5A
12
180
TJ =+ 25°C
IO = 250 to 750mA
4
90
TJ =+ 25°C
IO = 5mA to 1A, PO 15W
VI = -1.5 to -23V
VI = -10.5 to -25V
TJ = 25°C
VI= -11 to -17V
V
mV
mV
TJ =+ 25°C
IO = 5mA to 1A
VI = -11.5 to -25V
IO = 5mA
f = 10Hz to 100KHz
TA =+ 25°C
f = 120Hz
∆VI = 10V
Unit
3
6
mA
0.05
0.1
-0.6
0.5
1
mA
mV/°C
175
µV
60
dB
2
V
TJ= +25°C, VI = -35V
300
mA
TJ =+25°C
2.2
A
Output Noise Voltage
VN
Ripple Rejection
RR
Dropout Voltage
VD
TJ=+ 25°C
IO = 1A
Short Circuit Current
ISC
Peak Current
IPK
54
* Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM79XX/A (KA79XX, MC79XX) FIXED VOLTAGE REGULATOR (NEGATIVE)
LM7912 ELECTRICAL CHARACTERISTICS
(VI= 18V, lO =500mA, 0°C ≤T J≤ +125°C, CI =2.2µF, CO = 1µF, unless otherwise specified.)
Characteristic
Output Voltage
Symbol
VO
Line Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
Quiescent Current Change
Temperature Coefficient of VD
IQ
∆IQ
∆VO/∆T
Output Noise Voltage
VN
Ripple Rejection
RR
Dropout Voltage
VD
Short Circuit Current
Peak Current
ISC
IPK
Test Conditions
TJ = +25°C
IO = 5mA to 1A, PO 15W
VI = -15.5 to -27V
V = -14.5 to -30V
TJ = 25°C I
VI= -16 to -22V
TJ =+ 25°C
IO = 5mA to 1.5A
TJ =+ 25°C
IO = 250 to 750mA
TJ =+ 25°C
IO = 5mA to 1A
VI = -15 to -30V
IO = 5mA
f = 10Hz to 100KHz
TA =+ 25°C
f = 120Hz
∆VI = 10V
TJ= +25°C
IO = 1A
TJ=+ 25°C, VI = -35V
TJ=+ 25°C
Min
Typ
Max
-11.5
-12
-12.5
-11.4
-12
-12.6
12
6
240
120
12
240
4
120
3
0.05
0.1
-0.8
6
0.5
1
Unit
V
mV
mV
54
mA
mA
mV/°C
200
µV
60
dB
2
V
300
2.2
mA
A
* Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM79XX/A (KA79XX, MC79XX) FIXED VOLTAGE REGULATOR (NEGATIVE)
LM7915 ELECTRICAL CHARACTERISTICS
(VI = 23V, IO = 500mA, 0°C ≤T J +125°C, CI =2.2µF, CO = 1µF, unless otherwise specified.)
Characteristic
Symbol
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
IQ
Quiescent Current Change
∆IQ
Temperature Coefficient of VD
∆VO/∆T
Output Noise Voltage
VN
Ripple Rejection
RR
Dropout Voltage
VD
Short Circuit Current
Peak Current
ISC
IPK
Test Conditions
TJ =+ 25°C
IO = 5mA to 1A, PO 15W
VI = -18 to -30V
VI = -17.5 to -30V
TJ = 25°C
VI= -20 to -26V
TJ =+ 25°C
IO = 5mA to 1.5A
TJ =+ 25°C
IO = 250 to 750mA
TJ =+ 25°C
IO = 5mA to 1A
VI = -18.5 to -30V
IO = 5mA
f = 10Hz to 100Khz
TA =+ 25°C
f = 120Hz
∆VI = 10V
TJ=+25°C
IO = 1A
TJ=+ 25°C, VI = -35V
TJ=+ 25°C
Min
Typ
Max
-14.4
-15
-15.6
-14.25
-15
-15.75
12
6
300
150
12
300
4
150
3
0.05
0.1
-0.9
6
0.5
1
Unit
V
mV
mV
54
mA
mA
mV/°C
250
µV
60
dB
2
V
300
2.2
mA
A
* Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM79XX/A (KA79XX, MC79XX) FIXED VOLTAGE REGULATOR (NEGATIVE)
LM7918 ELECTRICAL CHARACTERISTICS
(VI = 27V, lO = 500mA, 0°C ≤T J ≤+125°C, CI =2.2µF, CO = 1µF, unless otherwise specified.)
Characteristic
Output Voltage
Symbol
VO
Line Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
Quiescent Current Change
Temperature Coefficient of VD
IQ
∆IQ
∆VO/∆T
Output Noise Voltage
VN
Ripple Rejection
RR
Dropout Voltage
VD
Short Circuit Current
Peak Current
ISC
IPK
Test Conditions
TJ =+ 25°C
IO = 5mA to 1A, PO 15W
VI = -22.5 to -33V
TJ = 25°C VI= -21 to -33V
VI= -24 to -30V
TJ =+ 25°C
IO = 5mA to 1.5A
TJ =+ 25°C
IO = 250 to 750mA
TJ =+ 25°C
IO = 5mA to 1A
VI = -22 to -33V
IO = 5mA
f = 10Hz to 100KHz
TA =+ 25°C
f = 120Hz
∆VI = 10V
TJ=+ 25°C
IO = 1A
TJ=+ 25°C, VI = -35V
TJ=+ 25°C
Min
Typ
Max
-17.3
-18
-18.7
-17.1
-18
-18.9
15
8
360
180
15
360
5
180
3
6
0.5
1
Unit
V
mV
mV
54
mA
mA
-1
mV/°C
300
µV
60
dB
2
V
300
2.2
mA
A
* Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM79XX/A (KA79XX, MC79XX) FIXED VOLTAGE REGULATOR (NEGATIVE)
LM7924 ELECTRICAL CHARACTERISTICS
(VI = 33V, lO = 500mA, 0°C ≤T J ≤+125°C, CI =2.2µF, CO = 1µF, unless otherwise specified.)
Characteristic
Symbol
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
Quiescent Current Change
Temperature Coefficient of VD
IQ
∆IQ
∆VO/∆T
Output Noise Voltage
VN
Ripple Rejection
RR
Dropout Voltage
VD
Short Circuit Current
Peak Current
ISC
IPK
Test Conditions
TJ =+25°C
IO = 5mA to 1A, PO ≤15W
VI = -27 to -38V
VI = - 27 to - 38V
TJ = 25°C
VI= - 30 to - 36V
TJ = +25°C
IO = 5mA to 1.5A
TJ =+ 25°C
IO = 250 to 750mA
TJ =+ 25°C
IO = 5mA to 1A
VI = -27 to -38V
IO = 5mA
f = 10Hz to 100KHz
TA =+ 25°C
f = 120Hz
∆VI = 10V
TJ= +25°C
IO = 1A
TJ=+ 25°C, VI = -35V
TJ=+25°C
Min
Typ
Max
- 23
- 24
- 25
- 22.8
- 24
- 25.2
15
8
480
180
15
480
5
240
3
6
0.5
1
Unit
V
mV
mV
54
mA
mA
-1
mV/°C
400
µV
60
dB
2
V
300
2.2
mA
A
* Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM79XX/A (KA79XX, MC79XX) FIXED VOLTAGE REGULATOR (NEGATIVE)
LM7905A ELECTRICAL CHARACTERISTICS
(VI = 10V, lO = 500mA, 0°C ≤T J ≤ +125°C, CI =2.2µF, CO =1µF, unless otherwise specified.)
Characteristic
Output Voltage
Line Regulation
Symbol
VO
∆VO
Test Conditions
TJ =+ 25°C
IO = 5mA to 1A, PO 15W
VI = -7 to -20V
VI = -7 to -20V
IO=1A
TJ =+25°C
VI = -8 to -12V
IO=1A
VI = -7.5 to -25V
Min
Typ
Max
- 4.9
- 5.0
- 5.1
- 4.8
-5.0
- 5.2
5
50
2
25
7
50
7
50
10
100
3
50
mV
3
6
mA
0.05
0.1
- 0.4
0.5
0.8
mA
VI= -8 to -12V
IO=1A
IO = 5mA to 1.5A
Load Regulation
∆VO
Quiescent Current
IQ
Quiescent Current Change
∆IQ
Temperature Coefficient of VD
∆VO/∆T
TJ =+ 25°C
IO = 250 to 750mA
TJ = +25°C
IO = 5mA to 1A
VI = -8 to -25V
IO = 5mA
Output Noise Voltage
VN
Ripple Rejection
RR
Dropout Voltage
VD
Short Circuit Current
ISC
f = 10Hz to 100KHz
TA =+ 25°C
f = 120Hz, IO = -35V
∆VI = 10V
TJ=+ 25°C
IO = 1A
TJ =+ 25°C, VI = -35V
Peak Current
IPK
TJ =+ 25°C
54
Unit
V
mV
mV/°C
40
µV
60
dB
2
V
300
mA
2.2
A
* Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be
taken into account separately. Pulse testing with low duty is used.
LM7912A ELECTRICAL CHARACTERISTICS
LM79XX/A (KA79XX, MC79XX) FIXED VOLTAGE REGULATOR (NEGATIVE)
(VI= 18V, lO =500mA, 0°C ≤T J≤ +125°C, CI =2.2µF, CO = 1µF, unless otherwise specified.)
Characteristic
Output Voltage
Symbol
VO
Line Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
Quiescent Current Change
Temperature Coefficient of VD
IQ
∆IQ
∆VO/∆T
Output Noise Voltage
VN
Ripple Rejection
RR
Dropout Voltage
VD
Short Circuit Current
Peak Current
ISC
IPK
Test Conditions
TJ =+ 25°C
IO = 5mA to 1A, PO 15W
VI = -15.5 to -27V
V = -14.5 to -30V
TJ =+25°C I
VI= -16 to -22V
TJ = +25°C
IO = 5mA to 1.5A
TJ =+ 25°C
IO = 250 to 750mA
TJ =+ 25°C
IO = 5mA to 1A
VI = -15 to -30V
IO = 5mA
f = 10Hz to 100Khz
TA =+ 25°C
f = 120Hz
∆VI = 10V
TJ=+ 25°C
IO = 1A
TJ=+ 25°C, VI = -35V
TJ=+ 25°C
Min
Typ
Max
-11.75
-12
-12.25
-11.5
-12
-12.5
12
6
240
120
12
240
4
120
3
0.05
0.1
-0.8
6
0.5
1
Unit
V
mV
mV
54
mA
mA
mV/°C
200
µV
60
dB
2
V
300
2.2
mA
A
* Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM7915A ELECTRICAL CHARACTERISTICS
LM79XX/A (KA79XX, MC79XX) FIXED VOLTAGE REGULATOR (NEGATIVE)
(VI = 23V, lO = 500mA, 0°C ≤T J≤ +125°C, CI =2.2µF, CO = 1µF, unless otherwise specified.)
Characteristic
Symbol
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
IQ
Quiescent Current Change
∆IQ
Temperature Coefficient of VD
∆VO/∆T
Output Noise Voltage
VN
Ripple Rejection
RR
Dropout Voltage
VD
Short Circuit Current
Peak Current
ISC
IPK
Test Conditions
TJ = +25°C
IO = 5mA to 1A, PO 15W
VI = -18 to -30V
TJ =+25°C VI = -17.5 to -30V
VI= -20 to -26V
TJ =+ 25°C
IO = 5mA to 1.5A
TJ =+ 25°C
IO = 250 to 750mA
TJ =+ 25°C
IO = 5mA to 1A
VI = -18.5 to -30V
IO = 5mA
f = 10Hz to 100KHz
TA =+25°C
f = 120Hz
∆VI = 10V
TJ= +25°C
IO = 1A
TJ=+ 25°C, VI = -35V
TJ=+ 25°C
Min
Typ
Max
-14.7
-15
-15.3
-14.4
-15
-15.6
12
6
300
150
12
300
4
150
3
0.05
0.1
-0.9
6
0.5
1
Unit
V
mV
mV
54
mA
mA
mV/°C
250
µV
60
dB
2
V
300
2.2
mA
A
* Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
TYPICAL PERFORMANCE CHARACTERISTICS
LM79XX/A (KA79XX, MC79XX) FIXED VOLTAGE REGULATOR (NEGATIVE)
Fig.1 Output Voltage
Fig. 2 Load Regulation
15
Vin=10V
Io=40mA
5.05
13
Load Regulation [mV]
Output Voltage [-V]
5.1
5
4.95
4.9
Vin=25V
Io=100mA
4.85
Io=1.5A
11
9
7
5
3
1
Io=0.75A
-1
-3
4.8
-5
-40
-25
0
25
50
75
100
125
-40
-25
TA, Ambient Temperature [ oC]
Fig.3 Quiescent Current
25
50
75
100
125
Fig. 4 Dropout Voltage
5
4
4.5
4
3.5
Dropout Voltage [V]
Quiescent Current [mA]
0
TA, Ambient Temperature [ oC]
3.5
3
2.5
2
1.5
1
0.5
3
2.5
2
1.5
Io=1A
1
0.5
0
0
-40
-25
0
25
50
75
100
125
TA, Ambient Temperature [oC]
Short Circuit Current [A]
0.6
0.55
0.5
0.45
0.4
0.35
0.3
0.25
0.2
0.15
0.1
0.05
0
-0.05
-0.1
-25
0
25
50
75
100
TA, Ambient Temperature [oC]
TYPICAL APPLICATIONS
-25
0
25
50
75
100
TA, Ambient Temperature [oC]
Fig.5 Short Circuit Current
-40
-40
125
125
LM79XX/A (KA79XX, MC79XX) FIXED VOLTAGE REGULATOR (NEGATIVE)
Fig. 6 Negative Fixed output regulator
µF
+ 2.2µ
µF
+ 1µ
CO
1
CI
2
- VI
Notes:
(1)
To specify an output voltage, substitute voltage value
for “XX “
(2)
Required for stability. For value given, capacitor
must be solid tantalum. If aluminum electronics are
used, at least ten times value shown should be
selected. CI is required if regulator is located an
appreciable
distance from power supply filter.
(3)
To improve transient response. If large capacitors
are used, a high current diode from input to output
(1N400l or similar) should be introduced to protect
the device from momentary input short circuit.
KA79XX
3
- VO
Fig. 7 Split power supply (±
± 12V/1A)
1
+ 15V
KA7812
3
+
0.33µ
µF
2
1µ
µF
1µ
µF +
1
2
1N4001
*
GND
µF
+ 2.2µ
- 15V
+12V
+
KA7912
3
*: Against potential latch-up problems.
1N4001
*
-12V
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
MC79LXXA (LM79LXXA) (KA79LXXA)
FIXED VOLTAGE REGULATOR (NEGATIVE)
3-TERMINAL 0.1A NEGATIVE VOLTAGE
REGULATORS
TO-92
These regulators employ internal current limiting and thermal shutdown,
making them essentially indestructible.
FEATURES
• Output current up to 100mA
• No external components
• Internal thermal over load protection
• Internal short circuit current limiting
• Output Voltage Offered in ± 5% Tolerance
• Output Voltage of -5V,-12V,-15V,-18V and -24V
1: GND 2: Input 3: Output
ORDERING INFORMATION
Device
Package
Operating Temperature
MC79LXXACP (LM79LXXACZ) KA79LXXAZ
TO - 92
0 ~ + 125°C
SCHEMATIC DIAGRAM
Rev. C
1999 Fairchild Semiconductor Corporation
MC79LXXA (LM79LXXA) (KA79LXXA)
FIXED VOLTAGE REGULATOR (NEGATIVE)
ABSOLUTE MAXIMUM RATINGS (TA = +25°C, unless otherwise specified)
Characteristic
Input Voltage (-5V)
(-12V to -18V)
(-24V)
Symbol
Value
Unit
VI
-30
-35
-40
VDC
Operating Temperature Range
TOPR
0 ~ +125
°C
Storage Temperature Range
TSTG
-65 ~ +150
°C
MC79L05A ELECTRICAL CHARACTERISTICS
(VI = -10V, IO = 40mA, CI = 0.33µF, CO = 0.1µF, 0°C ≤T J ≤ +125°C, unless otherwise specified)
Characteristic
Output Voltage
Symbol
VO
Test Conditions
TJ = +25°C
Line Regulation
∆VO
TJ =+25°C
Load Regulation
∆VO
TJ =+25°C
Output Voltage
VO
Quiescent Current
IQ
Quiescent
With Line
Current Change
With Load
Output Noise Voltage
Ripple Rejection
∆IQ
VN
RR
Min
Typ
Max
Unit
- 4.8
- 5.0
- 5.2
V
15
150
-7.0V ≥ VI ≥-20V
-8V ≥ VI ≥-20V
100
1.0mA ≤ IO ≤ 100mA
20
60
1.0mA ≤ IO ≤ 40mA
10
30
-7.0V>VI >-20V, 1.0mA≤ IO ≤40mA
- 4.75
VI = -10V, 1.0mA≤ IO ≤70mA
- 4.75
- 5.25
6.0
TJ = +125°C
5.5
-8V≥ VI ≥-20V
1.5
1.0mA≤ IO ≤40mA
0.1
TA = +25°C,10Hz≤f≤100KHz
f = 120Hz, -8V≥VI ≥-18V
41
mV
- 5.25
2.0
TJ = +25°C
mV
V
mA
mA
30
µV
60
dB
1.7
V
TJ = +25°C
Dropout Voltage
VD
TJ = +25°C
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects
must be taken into account separately. Pulse testing with low duty is used.
MC79LXXA (LM79LXXA) (KA79LXXA)
FIXED VOLTAGE REGULATOR (NEGATIVE)
MC79L12A ELECTRICAL CHARACTERISTICS
(VI = -19V, IO = 40mA, CI = 0.33µF, CO = 0.1µF, 0°C ≤T J ≤ +125°C, unless otherwise specified)
Characteristic
Output Voltage
Line Regulation
Load Regulation
Symbol
VO
∆VO
∆VO
Output Voltage
VO
Quiescent Current
IQ
Quiescent
With Line
Current Change With Load
Output Noise Voltage
∆IQ
Test Conditions
TJ = +25°C
-14.5V ≥VI ≥-27V
-16V≥VI ≥-27V
1.0mA≤ IO ≤100mA
TJ =+25°C
1.0mA≤ IO ≤40mA
-14.5V>VI >-27V, 1.0mA≤IO≤40mA
VI = -19V, 1.0mA≤ IO ≤70mA
TJ = +25°C
TJ = +125°C
-16V≥VI ≥-27V
1.0mA≤ IO ≤40mA
TA = +25°C,10Hz f 100KHz
Min
Typ
Max
Unit
-11.5
-12.0
-12.5
250
200
100
50
-12.6
-12.6
6.5
6.0
1.5
0.1
V
TJ =+25°C
-11.4
-11.4
mV
mV
V
mA
mA
µV
f = 120Hz, -150V≥VI ≥-25V
Ripple Rejection
RR
37
42
dB
TJ = +25°C
1.7
V
Dropout Voltage
VD
TJ = +25°C
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
VN
80
MC79L15A ELECTRICAL CHARACTERISTICS
(VI = -23V, IO = 40mA, CI = 0.33µF, CO = 0.1µF, 0°C ≤T J ≤ +125°C, unless otherwise specified)
Characteristic
Output Voltage
Symbol
VO
Test Conditions
TJ = +25°C
Min
Typ
Max
Unit
-14.4
-15.0
-15.6
300
250
150
75
-15.75
-15.75
6.5
6.0
1.5
0.1
V
-17.5V≥VI ≥-30V
TJ =+25°C
mV
∆VO
Line Regulation
-27V≥VI ≥-30V
1.0mA≤ IO ≤100mA
TJ =+25°C
∆VO
mV
Load Regulation
1.0mA≤ IO ≤40mA
-14.25
-17.5V>VI >-30V, 1.0mA≤ IO ≤40mA
VO
Output Voltage
V
-14.25
VI = -23V, 1.0mA≤ IO ≤70mA
TJ = +25°C
Quiescent Current
IQ
mA
TJ = +125°C
Quiescent
With Line
-20V≥VI ≥-30V
∆IQ
mA
Current Change With Load
1.0mA≤ IO ≤40mA
90
Output Noise Voltage
VN
TA = 25°C,10Hz≤f≤100KHz
µV
f = 120Hz, -18.5V≥ VI ≥-28.5V
Ripple Rejection
RR
34
39
dB
TJ = +25°C
1.7
V
Dropout Voltage
VD
TJ = +25°C
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
MC79LXXA (LM79LXXA) (KA79LXXA)
FIXED VOLTAGE REGULATOR (NEGATIVE)
MC79L18A ELECTRICAL CHARACTERISTICS
(VI = -27V, IO = 40mA, CI = 0.33µF, CO = 0.1µF, 0°C ≤T J ≤ +125°C, unless otherwise specified)
Characteristic
Output Voltage
Line Regulation
Load Regulation
Symbol
VO
∆VO
∆VO
Output Voltage
VO
Quiescent Current
IQ
Quiescent
With Line
Current Change With Load
Output Noise Voltage
∆IQ
VN
Ripple Rejection
RR
Dropout Voltage
VD
Test Conditions
TJ =+25°C
-20.7V≥ VI ≥-33V
TJ =+25°C
-21V≥ VI ≥-33V
1.0mA≤ IO ≤100mA
TJ =+25°C
1.0mA≤ IO ≤40mA
-20.7V>VI >-33V, 1.0mA≤ IO ≤40mA
VI = -1.0V, 1.0mA≤ IO ≤70mA
TJ = +25°C
TJ = +125°C
-21V≥VI ≥-33V
1.0mA≤ IO ≤40mA
TA =+25°C,10Hz≤f≤100KHz
f = 120Hz, -23V≥VI ≥-33V
TJ = +25°C
TJ = +25°C
Min
Typ
Max
Unit
-17.3
-18.0
-18.7
325
275
170
85
-18.9
-18.9
6.5
6.0
1.5
0.1
V
-17.1
-17.1
33
mV
mV
V
mA
mA
150
µV
48
dB
1.7
V
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
MC79L24A ELECTRICAL CHARACTERISTICS
(VI = -33V, IO = 40mA, CI = 0.33µF, CO = 0.1µF, 0°C ≤T J≤+ 125°C, unless otherwise specified)
Characteristic
Output Voltage
Symbol
VO
Line Regulation
∆VO
Load Regulation
∆VO
Output Voltage
VO
Quiescent Current
IQ
Quiescent
With Line
Current Change With Load
Output Noise Voltage
∆IQ
Ripple Rejection
RR
Dropout Voltage
VD
VN
Test Conditions
TJ = +25°C
-27V≥ VI ≥-38V
TJ =+25°C
-28V≥ VI ≥-38V
1.0mA≤ IO ≤100mA
TJ =+25°C
1.0mA≤ IO ≤40mA
-27V>VI >-38V, 1.0mA≤ IO≤40mA
VI = -33V, 1.0mA≤ IO ≤70mA
TJ = +25°C
TJ = +125°C
-28V≥VI ≥-38V
1.0mA≤ IO ≤40mA
TA = +25°C,10Hz≤f≤100KHz
f = 120Hz, -29V≥VI ≥-35V
TJ = +25°C
TJ = +25°C
Min
Typ
Max
Unit
-23
-24
-25
350
300
200
100
-25.2
-25.2
6.5
6.0
1.5
0.1
V
-22.8
-22.8
31
mV
mV
V
mA
mA
200
µV
47
dB
1.7
V
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
MC79LXXA (LM79LXXA) (KA79LXXA)
FIXED VOLTAGE REGULATOR (NEGATIVE)
TYPICAL APPLICATIONS
Design Considerations
The MC79LXXA Series of fixed voltage regulators
are designed with Thermal Overload Protection that
shuts down the circuit when subjected to an excessive
power overload condition. Internal Short-Circuit
Protection that limits the maximum current the circuit
will pass.
In many low current applications, compensation
capacitors are not required. However, it is
recommended that the regulator input be bypassed
with a capacitor if the regulator is connected to the
power supply filter with long wire lengths, or if the
output load capacitance is large. An input bypass
Fig. 1 Positive And Negative Regulator
capacitor should be selected to provide good high frequency characteristics to insure stable operation
under all load conditions. A 0.33µF or larger tantalum,
mylar, or other capacitor having low internal
impedance at high frequencies should be chosen. The
bypass capacitor should be mounted with the shortest
possible leads directly across the regulator's input
terminals. Normally good construction techniques
should be used to minimize ground loops and lead
resistance drops since the regulator has no external
sense lead. Bypassing the output is also
recommended.
Fig. 2 Typical Application
OUTPUT
A common ground is required between the Input
and the output voltages. The input voltage must
remain typically 2.0V above the output voltage even
during the low point on the input ripple voltage.
= C1 is required if regulator is located an
appreciable distance from power supply filter.
* * = CO improves stability and transient response.
MC79LXXA (LM79LXXA) (KA79LXXA)
PACKAGE DIMENSION
FIXED VOLTAGE REGULATOR (NEGATIVE)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not
intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOS™
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench®
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in any
manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at any
time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has
been discontinued by Fairchild semiconductor. The
datasheet is printed for reference information only.
LM79MXX
FIXED VOLTAGE REGULATOR(NEGATIVE)
3-TERMINAL 0.5A NEGATIVE VOLTAGE REGULATORS
TO- 220
The LM79MXX series of 3-Terminal medium current negative voltage
regulators are monolithic integrated circuits designed as fixed voltage
regulators. These regulators employ internal current limiting, thermal
shutdown and safe-area compensation making them essentially in
destructible.
D-PAK
1
1: GND 2: Input 3: Output
FEATURES
•
•
•
•
•
•
No external components required
Output current in excess of 0.5A
Internal thermal-overload
ORDERING
Internal short circuit current limiting
Output transistor safe-area compensation
Output Voltages of -5V, -6V,-8V,-12V,-15V,-18V and -24V
INFORMATION
Device
Package
Operating Temperature
LM79MXX
TO-220
0 ~ +125 °C
LM79MXXR
D-PAK
0 ~ +125 °C
SCHEMATHIC DIAGRAM
Rev. B
1999 Fairchild Semiconductor Corporation
LM79MXX
FIXED VOLTAGE REGULATOR(NEGATIVE)
ABSOLUTE MAXIMUM RATINGS (TA = +25 °C, unless otherwise specified)
Characteristic
Input Voltage(for VO = -5V to -18V)
(for VO = -24V)
Thermal Resistance Junction-Cases
Thermal Resistance Junction-Air
Operating Temperature Range
Storage Temperature Range
Symbol
Value
Unit
VI
VI
RθJC
RθJA
TOPR
TSTG
-35
-40
5
65
0 ~ +125
65 ~ +125
V
V
°C /W
°C /W
°C
°C
LM79MO5/R ELECTRICAL CHARACTERISTICS
(Refer to test circuit, 0 °C ≤T J ≤ +125 °C, lO =350mA, VI =10V,unless otherwise specified, CI =0.33µF, CO=0.1µF)
Characteristic
Symbol
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
IQ
Quiescent Current
Change
∆IQ
Output Voltage Drift
∆VO/∆T
Output Noise Voltage
VN
Ripple Rejection
RR
Dropout Voltage
Short Circuit Current
Peak Current
VD
ISC
IPK
Test condition
TJ= +25 °C
IO = 5 to 350mA
VI = -7 to -25V
VI= -7 to -25V
TJ= +25°C
VI= -8 to -25V
IO = 5mA to 500mA
TJ = 25 °C
TJ= 25 °C
IO = 5 to 350mA
IO = 200mA
VI = -8V to -25V
IO = 5mA
f = 10Hz, 100Khz
TJ = +25 °C
f = 120Hz
Vj = -8 to -18V
TJ =+25 °C, IO = 500mA
TJ= +25 °C, VI = -35V
TJ= +25 °C
MIN
TYP
MAX
Unit
-4.8
-4.75
-5
-5
-5.2
-5.25
V
7.0
2.0
50
30
mV
30
100
mV
3.0
6.0
0.4
0.4
mA
54
mA
-0.2
mV/ °C
40
µV
60
dB
1.1
140
650
V
mA
mA
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be
taken into account separately. Pulse testing with low duty is used.
LM79MXX
FIXED VOLTAGE REGULATOR(NEGATIVE)
LM79MO6/R ELECTRICAL CHARACTERISTICS
(Refer to test circuit, 0 °C ≤TJ ≤ +125 °C, lO =350mA, VI = -11V,unless otherwise specified)
Characteristic
Output Voltage
Symbol
VO
Line Regulation
∆VO
Load Regulation
Quiescent Current
Quiescent Current
Change
Output Voltage Drift
Output Noise Voltage
Ripple Rejection
Dropout Voltage
Short Circuit Current
Peak Current
∆VO
IQ
∆IQ
∆VO/∆T
VN
RR
VD
ISC
IPK
Test condition
TJ= +25 °C
IO = 5 to 350mA
VI = -8.0 to -25V
VI = -8 to -25V
TJ= +25 °C
VI = -9 to -19V
C
IO = 5.0mA to 500mA
TJ= +25 °C
Min
Typ
Max
- 5.75
- 6.0
- 6.25
- 5.7
- 6.0
7.0
2.0
30
3
- 6.3
60
40
120
6
0.4
0.4
V
TJ= +25 °C
IO = 5 to 350mA
VI = -8V to -25V
IO = 5mA
f = 10Hz to 100KHz,TA = +25 °C
f = 120Hz,VI = -9 to -19V
IO = 500mA, TJ = +25 °C
VI = -35V, TJ = +25 °C
TJ= +25 °C
Unit
54
mV
mV
mA
mA
mV/ °C
µV
dB
V
mA
mA
0.4
50
60
1.1
140
650
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM79MO8/R ELECTRICAL CHARACTERISTICS
(Refer to test circuit, 0 O C ≤TJ ≤ +125 O C, lO =350mA, VI = -14V,unless otherwise specified)
Characteristic
Symbol
Test condition
TJ= +25 C
IO = 5 to 350mA
VI = -10.5 to -25V
VI = -10.5 to -25V
TJ= +25 O C
VI = -11 to -21V
TJ= +25 O C IO = 5.0mA to 500mA
TJ= +25 O C
IO = 5 to 350mA
VI = -8V to -25V
IO = 5mA
f = 10Hz to 100KHz,TA = +25 O C
f = 120Hz,VI = -9 to -19V
IO = 500mA, TJ = +25 O C
VI = -35V, TJ = +25 O C
TJ = +25 O C
O
Output Voltage
Line Regulation
Load Regulation
Quiescent Current
Quiescent Current
Change
Output Voltage Drift
Output Noise Voltage
Ripple Rejection
Dropout Voltage
Short Circuit Current
Peak Current
VO
∆VO
∆VO
IQ
∆IQ
∆VO/∆T
VN
RR
VD
ISC
IPK
Min
Typ
Max
- 7.7
- 8.0
- 8.3
- 7.6
- 8.0
7.0
2.0
30
3
- 8.4
80
50
160
6
0.4
0.4
Unit
V
54
-0.6
60
59
1.1
140
650
mV
mV
mA
mA
mV/ °C
µV
dB
V
mA
mA
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM79MXX
FIXED VOLTAGE REGULATOR(NEGATIVE)
LM79M12/R ELECTRICAL CHARACTERISTICS
(Refer to test circuit, 0 °C ≤TJ ≤ +125 °C, lO =350mA, VI = - 19V, unless otherwise specified)
Characteristic
Output Voltage
Line Regulation
Symbol
VO
∆VO
Test condition
TJ= +25 °C
IO = 5 to 350mA
VI = -14.5 to -30V
V = -14.5 to -30V
TJ = +25 °C I
VI = -15 to -25V
C
TJ= +25°C IO = 5.0mA to 500mA
Min
Typ
Max
-11.5
-12
-12.5
-11.4
-1.2
8.0
3.0
30
3
-12.6
80
50
240
6
0.4
0.4
Min
Typ
Max
- 14.4
- 15
- 15.6
- 14.25
- 15
9.0
5.0
30
3
- 15.75
80
50
240
6
0.4
0.4
Unit
V
mV
Load Regulation
mV
∆VO
Quiescent Current
IQ
mA
TJ= +25 °C
Quiescent Current
IO = 5 to 350mA
∆IQ
mA
Change
VI = -14.5V to -30V
Output Voltage Drift
-0.8
∆VO/∆T IO = 5mA
mV/ °C
Output Noise Voltage
VN
75
f = 10Hz to 100KHz,TA =+25 °C
µV
Ripple Rejection
RR
f = 120Hz,VI = -15 to -25V
54
60
dB
Dropout Voltage
VD
1.1
V
IO = 500mA, TJ = +25 °C
Short Circuit Current
ISC
140
mA
VI = -35V, TJ = +25 °C
650
mA
Peak Current
IPK
TJ= +25 °C
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM79M15/R ELECTRICAL CHARACTERISTICS
(Refer to test circuit, 0 °C ≤TJ ≤ +125 °C, lO =350mA, VI = - 23V, unless otherwise specified)
Characteristic
Symbol
Test condition
TJ= +25 C
IO = 5 to 350mA
VI = -17.5 to -30V
VI = -17.5 to -30V
TJ = +25 °C
VI = -18 to -28V
TJ= +25°C IO = 5.0mA to 500mA
O
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
Quiescent Current
Quiescent Current
Change
Output Voltage Drift
Output Noise Voltage
Ripple Rejection
Dropout Voltage
Short Circuit Current
Peak Current
∆VO
IQ
∆IQ
∆VO/∆T
VN
RR
VD
ISC
IPK
V
TJ= +25 °C
IO = 5 to 350mA
VI = -17.5V to -28V
IO = 5mA
f = 10Hz to 100KHz,TA = +25 °C
f = 120Hz,VI = -18.5 to -28.5V
IO = 500mA, TJ = +25 °C
VI = -35V, TJ = +25 °C
TJ= +25 °C
Unit
54
-1.0
90
59
1.1
140
650
mV
25
mV
mA
mA
mV/ °C
µV
dB
V
mA
mA
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM79MXX
FIXED VOLTAGE REGULATOR(NEGATIVE)
LM79M18/R ELECTRICAL CHARACTERISTICS
(Refer to test circuit, 0 °C ≤TJ ≤ +125 °C, lO =350mA, VI = - 27V, unless otherwise specified)
Characteristic
Output Voltage
Symbol
VO
Line Regulation
∆VO
Load Regulation
Quiescent Current
Quiescent Current
Change
Output Voltage Drift
Output Noise Voltage
Ripple Rejection
Dropout Voltage
Short Circuit Current
Peak Current
∆VO
IQ
∆IQ
∆VO/∆T
VN
RR
VD
ISC
IPK
Test condition
TJ= +25 °C
IO = 5 to 350mA
VI = -21 to -33V
VI = -21 to -33V
TJ =+ 25 °C
VI = -24 to -30V
TJ= +25 °C IO = 5.0mA to 500mA
Min
Typ
Max
- 17.3
- 18
- 18.7
- 17.1
- 18
9.0
5.0
30
3
- 18.9
80
80
360
6
0.4
0.4
V
TJ= +25 °C
IO = 5 to 350mA
VI = -21V to -33V
IO = 5mA
f = 10Hz to 100KHz,TA = +25 °C
f = 120Hz,VI = -22 to -32V
IO = 500mA, TJ = +25 °C
VI = -35V, TJ = +25 °C
TJ= +25 °C
Unit
54
mV
mV
mA
mA
mV/ °C
µV
dB
V
mA
mA
-1.0
110
59
1.1
140
650
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM79M24/R ELECTRICAL CHARACTERISTICS
(Refer to test circuit, 0 °C ≤TJ ≤ +125 °C, lO =350mA, VI = - 33V, unless otherwise specified)
Characteristic
Output Voltage
Symbol
VO
Line Regulation
∆VO
Load Regulation
Quiescent Current
Quiescent Current
Change
Output Voltage Drift
Output Noise Voltage
Ripple Rejection
Dropout Voltage
Short Circuit Current
Peak Current
∆VO
IQ
∆IQ
∆VO/∆T
VN
RR
VD
ISC
IPK
Test condition
TJ= +25 °C
IO = 5 to 350mA
VI = -27 to -38V
VI = -27 to -38V
TJ = +25 °C
VI = -30 to -36V
TJ= +25 °C IO = 5.0mA to 500mA
Min
Typ
Max
- 23
- 24
- 25
- 22.8
- 24
9.0
5.0
30
3
- 25.2
80
70
300
6
0.4
0.4
V
TJ= +25 °C
IO = 5 to 350mA
VI = -27V to -38V
IO = 5mA
f = 10Hz to 100KHz,TA = +25 °C
f = 120Hz,VI = -28 to -38V
IO = 500mA, TJ = +25 °C
VI = -35V, TJ = +25 °C
TJ= +25 °C
Unit
54
-1.0
180
58
1.1
140
650
mV
mV
mA
mA
mV/ °C
µV
dB
V
mA
mA
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM79MXX
FIXED VOLTAGE REGULATOR(NEGATIVE)
TYPICAL APPLICATIONS
Bypass capacitors are recommended for stable operation of the KA79MXX series of regulators over the input voltage and output
current ranges. Output bypass capacitors will improve the transient response of the regulator.
The bypass capacitors, (2µF on the input, 1µF on the output) should be ceramic or solid tantalum which have good high frequency
characteristics. If aluminum electronics are used, their values should be 10µF or larger. The bypass capacitors should be
mounted with the shortest leads, and if possible, directly across the regulator terminals.
Fig. 1 Fixed Output Regulator
Fig. 2 Variable Output
Note
1. Required for stability. For value given, capacitor must
be solid tantalum. 25µF aluminum electrolytic may
be substituted.
2. C2 improves transient response and ripple rejection.
Do not increase beyond 50µF.
Select R2 as follows
KA79M 05: 300Ω
Ω , KA79M12: 750Ω
Ω , KA79M15: 11Ω
Ω
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
KA79MXX
FIXED VOLTAGE REGULATOR(NEGATIVE)
3-TERMINAL 0.5A NEGATIVE VOLTAGE REGULATORS
TO- 220
The KA79MXX series of 3-Terminal medium current negative voltage
regulators are monolithic integrated circuits designed as fixed voltage
regulators. These regulators employ internal current limiting, thermal
shutdown and safe-area compensation making them essentially in
destructible.
D-PAK
FEATURES
•
•
•
•
•
•
1
No external components required
Output current in excess of 0.5A
Internal thermal-overload
Internal short circuit current limiting
Output transistor safe-area compensation
Output Voltages of -5V, -6V,-8V,-12V,-15V,-18V and -24V
1: GND 2: Input 3: Output
ORDERING INFORMATION
Device
Package
Operating Temperature
KA79MXX
TO-220
0 ~ +125 °C
KA79MXXR
D-PAK
0 ~ +125 °C
SCHEMATHIC DIAGRAM
Rev. C
1999 Fairchild Semiconductor Corporation
KA79MXX
FIXED VOLTAGE REGULATOR(NEGATIVE)
ABSOLUTE MAXIMUM RATINGS (TA = +25 °C, unless otherwise specified)
Characteristic
Input Voltage(for VO = -5V to -18V)
(for VO = -24V)
Thermal Resistance Junction-Cases
Thermal Resistance Junction-Air
Operating Temperature Range
Storage Temperature Range
Symbol
Value
Unit
VI
VI
RθJC
RθJA
TOPR
TSTG
-35
-40
5
65
0 ~ +125
65 ~ +125
V
V
°C /W
°C /W
°C
°C
LM79MO5/R ELECTRICAL CHARACTERISTICS
(Refer to test circuit, 0 °C ≤T J ≤ +125 °C, lO =350mA, VI =10V,unless otherwise specified, CI =0.33µF, CO=0.1µF)
Characteristic
Symbol
Output Voltage
VO
Line Regulation
∆VO
Load Regulation
∆VO
Quiescent Current
IQ
Quiescent Current
Change
∆IQ
Output Voltage Drift
∆VO/∆T
Output Noise Voltage
VN
Ripple Rejection
RR
Dropout Voltage
Short Circuit Current
Peak Current
VD
ISC
IPK
Test condition
TJ= +25 °C
IO = 5 to 350mA
VI = -7 to -25V
VI= -7 to -25V
TJ= +25°C
VI= -8 to -25V
IO = 5mA to 500mA
TJ = 25 °C
TJ= 25 °C
IO = 5 to 350mA
IO = 200mA
VI = -8V to -25V
IO = 5mA
f = 10Hz, 100Khz
TJ = +25 °C
f = 120Hz
Vj = -8 to -18V
TJ =+25 °C, IO = 500mA
TJ= +25 °C, VI = -35V
TJ= +25 °C
MIN
TYP
MAX
Unit
-4.8
-4.75
-5
-5
-5.2
-5.25
V
7.0
2.0
50
30
mV
30
100
mV
3.0
6.0
0.4
0.4
mA
54
mA
-0.2
mV/ °C
40
µV
60
dB
1.1
140
650
V
mA
mA
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be
taken into account separately. Pulse testing with low duty is used.
KA79MXX
FIXED VOLTAGE REGULATOR(NEGATIVE)
LM79MO6/R ELECTRICAL CHARACTERISTICS
(Refer to test circuit, 0 °C ≤TJ ≤ +125 °C, lO =350mA, VI = -11V,unless otherwise specified)
Characteristic
Output Voltage
Symbol
VO
Line Regulation
∆VO
Load Regulation
Quiescent Current
Quiescent Current
Change
Output Voltage Drift
Output Noise Voltage
Ripple Rejection
Dropout Voltage
Short Circuit Current
Peak Current
∆VO
IQ
∆IQ
∆VO/∆T
VN
RR
VD
ISC
IPK
Test condition
TJ= +25 °C
IO = 5 to 350mA
VI = -8.0 to -25V
VI = -8 to -25V
TJ= +25 °C
VI = -9 to -19V
C
IO = 5.0mA to 500mA
TJ= +25 °C
Min
Typ
Max
- 5.75
- 6.0
- 6.25
- 5.7
- 6.0
7.0
2.0
30
3
- 6.3
60
40
120
6
0.4
0.4
V
TJ= +25 °C
IO = 5 to 350mA
VI = -8V to -25V
IO = 5mA
f = 10Hz to 100KHz,TA = +25 °C
f = 120Hz,VI = -9 to -19V
IO = 500mA, TJ = +25 °C
VI = -35V, TJ = +25 °C
TJ= +25 °C
Unit
54
mV
mV
mA
mA
mV/ °C
µV
dB
V
mA
mA
0.4
50
60
1.1
140
650
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM79MO8/R ELECTRICAL CHARACTERISTICS
(Refer to test circuit, 0 O C ≤TJ ≤ +125 O C, lO =350mA, VI = -14V,unless otherwise specified)
Characteristic
Symbol
Test condition
TJ= +25 C
IO = 5 to 350mA
VI = -10.5 to -25V
VI = -10.5 to -25V
TJ= +25 O C
VI = -11 to -21V
TJ= +25 O C IO = 5.0mA to 500mA
TJ= +25 O C
IO = 5 to 350mA
VI = -8V to -25V
IO = 5mA
f = 10Hz to 100KHz,TA = +25 O C
f = 120Hz,VI = -9 to -19V
IO = 500mA, TJ = +25 O C
VI = -35V, TJ = +25 O C
TJ = +25 O C
O
Output Voltage
Line Regulation
Load Regulation
Quiescent Current
Quiescent Current
Change
Output Voltage Drift
Output Noise Voltage
Ripple Rejection
Dropout Voltage
Short Circuit Current
Peak Current
VO
∆VO
∆VO
IQ
∆IQ
∆VO/∆T
VN
RR
VD
ISC
IPK
Min
Typ
Max
- 7.7
- 8.0
- 8.3
- 7.6
- 8.0
7.0
2.0
30
3
- 8.4
80
50
160
6
0.4
0.4
Unit
V
54
-0.6
60
59
1.1
140
650
mV
mV
mA
mA
mV/ °C
µV
dB
V
mA
mA
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
KA79MXX
FIXED VOLTAGE REGULATOR(NEGATIVE)
LM79M12/R ELECTRICAL CHARACTERISTICS
(Refer to test circuit, 0 °C ≤TJ ≤ +125 °C, lO =350mA, VI = - 19V, unless otherwise specified)
Characteristic
Output Voltage
Line Regulation
Symbol
VO
∆VO
Test condition
TJ= +25 °C
IO = 5 to 350mA
VI = -14.5 to -30V
V = -14.5 to -30V
TJ = +25 °C I
VI = -15 to -25V
C
TJ= +25°C IO = 5.0mA to 500mA
Min
Typ
Max
-11.5
-12
-12.5
-11.4
-1.2
8.0
3.0
30
3
-12.6
80
50
240
6
0.4
0.4
Unit
V
mV
Load Regulation
mV
∆VO
Quiescent Current
IQ
mA
TJ= +25 °C
Quiescent Current
IO = 5 to 350mA
∆IQ
mA
Change
VI = -14.5V to -30V
Output Voltage Drift
-0.8
∆VO/∆T IO = 5mA
mV/ °C
Output Noise Voltage
VN
75
f = 10Hz to 100KHz,TA =+25 °C
µV
Ripple Rejection
RR
f = 120Hz,VI = -15 to -25V
54
60
dB
Dropout Voltage
VD
1.1
V
IO = 500mA, TJ = +25 °C
Short Circuit Current
ISC
140
mA
VI = -35V, TJ = +25 °C
650
mA
Peak Current
IPK
TJ= +25 °C
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM79M15/R ELECTRICAL CHARACTERISTICS
(Refer to test circuit, 0 °C ≤TJ ≤ +125 °C, lO =350mA, VI = - 23V, unless otherwise specified)
Characteristic
Output Voltage
Symbol
VO
Line Regulation
∆VO
Load Regulation
Quiescent Current
Quiescent Current
Change
Output Voltage Drift
Output Noise Voltage
Ripple Rejection
Dropout Voltage
Short Circuit Current
Peak Current
∆VO
IQ
∆IQ
∆VO/∆T
VN
RR
VD
ISC
IPK
Test condition
TJ= +25 O C
IO = 5 to 350mA
VI = -17.5 to -30V
VI = -17.5 to -30V
TJ = +25 °C
VI = -18 to -28V
TJ= +25°C IO = 5.0mA to 500mA
Min
Typ
Max
- 14.4
- 15
- 15.6
- 14.25
- 15
9.0
5.0
30
3
- 15.75
80
50
240
6
0.4
0.4
V
TJ= +25 °C
IO = 5 to 350mA
VI = -17.5V to -28V
IO = 5mA
f = 10Hz to 100KHz,TA = +25 °C
f = 120Hz,VI = -18.5 to -28.5V
IO = 500mA, TJ = +25 °C
VI = -35V, TJ = +25 °C
TJ= +25 °C
Unit
54
-1.0
90
59
1.1
140
650
mV
25
mV
mA
mA
mV/ °C
µV
dB
V
mA
mA
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
KA79MXX
FIXED VOLTAGE REGULATOR(NEGATIVE)
LM79M18/R ELECTRICAL CHARACTERISTICS
(Refer to test circuit, 0 °C ≤TJ ≤ +125 °C, lO =350mA, VI = - 27V, unless otherwise specified)
Characteristic
Output Voltage
Symbol
VO
Line Regulation
∆VO
Load Regulation
Quiescent Current
Quiescent Current
Change
Output Voltage Drift
Output Noise Voltage
Ripple Rejection
Dropout Voltage
Short Circuit Current
Peak Current
∆VO
IQ
∆IQ
∆VO/∆T
VN
RR
VD
ISC
IPK
Test condition
TJ= +25 °C
IO = 5 to 350mA
VI = -21 to -33V
VI = -21 to -33V
TJ =+ 25 °C
VI = -24 to -30V
TJ= +25 °C IO = 5.0mA to 500mA
Min
Typ
Max
- 17.3
- 18
- 18.7
- 17.1
- 18
9.0
5.0
30
3
- 18.9
80
80
360
6
0.4
0.4
V
TJ= +25 °C
IO = 5 to 350mA
VI = -21V to -33V
IO = 5mA
f = 10Hz to 100KHz,TA = +25 °C
f = 120Hz,VI = -22 to -32V
IO = 500mA, TJ = +25 °C
VI = -35V, TJ = +25 °C
TJ= +25 °C
Unit
54
mV
mV
mA
mA
mV/ °C
µV
dB
V
mA
mA
-1.0
110
59
1.1
140
650
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
LM79M24/R ELECTRICAL CHARACTERISTICS
(Refer to test circuit, 0 °C ≤TJ ≤ +125 °C, lO =350mA, VI = - 33V, unless otherwise specified)
Characteristic
Output Voltage
Symbol
VO
Line Regulation
∆VO
Load Regulation
Quiescent Current
Quiescent Current
Change
Output Voltage Drift
Output Noise Voltage
Ripple Rejection
Dropout Voltage
Short Circuit Current
Peak Current
∆VO
IQ
∆IQ
∆VO/∆T
VN
RR
VD
ISC
IPK
Test condition
TJ= +25 °C
IO = 5 to 350mA
VI = -27 to -38V
VI = -27 to -38V
TJ = +25 °C
VI = -30 to -36V
TJ= +25 °C IO = 5.0mA to 500mA
Min
Typ
Max
- 23
- 24
- 25
- 22.8
- 24
9.0
5.0
30
3
- 25.2
80
70
300
6
0.4
0.4
V
TJ= +25 °C
IO = 5 to 350mA
VI = -27V to -38V
IO = 5mA
f = 10Hz to 100KHz,TA = +25 °C
f = 120Hz,VI = -28 to -38V
IO = 500mA, TJ = +25 °C
VI = -35V, TJ = +25 °C
TJ= +25 °C
Unit
54
-1.0
180
58
1.1
140
650
mV
mV
mA
mA
mV/ °C
µV
dB
V
mA
mA
* Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty is used.
KA79MXX
FIXED VOLTAGE REGULATOR(NEGATIVE)
TYPICAL APPLICATIONS
Bypass capacitors are recommended for stable operation of the KA79MXX series of regulators over the input voltage and output
current ranges. Output bypass capacitors will improve the transient response of the regulator.
The bypass capacitors, (2µF on the input, 1µF on the output) should be ceramic or solid tantalum which have good high frequency
characteristics. If aluminum electronics are used, their values should be 10µF or larger. The bypass capacitors should be
mounted with the shortest leads, and if possible, directly across the regulator terminals.
Fig. 1 Fixed Output Regulator
Fig. 2 Variable Output
Note
1. Required for stability. For value given, capacitor must
be solid tantalum. 25µF aluminum electrolytic may
be substituted.
2. C2 improves transient response and ripple rejection.
Do not increase beyond 50µF.
Select R2 as follows
KA79M 05: 300Ω
Ω , KA79M12: 750Ω
Ω , KA79M15: 11Ω
Ω
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not
intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOS™
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench®
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in any
manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at any
time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has
been discontinued by Fairchild semiconductor. The
datasheet is printed for reference information only.