LINER LTC3207EUF-PBF

LTC3207/LTC3207-1
600mA Universal
Multi-Output LED/CAM Driver
FEATURES
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DESCRIPTION
Low Noise, Multi-Mode Charge Pump (1x, 1.5x, 2x)
Provides Up to 91% Efficiency
Slew Limited Switching Reduces Conducted and
Radiated Noise (EMI)
Up to 600mA Total Output Current
Twelve 28mA Universal Current Sources with
64-Step Linear Brightness Control
425mA CAM LED Current Source with 16-Step
Linear Brightness Control and 2-Second High
Current Safety Timer
Independent On/Off, Brightness Level, Blinking and
Gradation Control for Each Current Source Using
2-Wire I2CTM Interface
Internal Current Reference
Two I2C Addresses are Available
(LTC3207 00110110, LTC3207-1 00110100)
Configurable ENU Pin for Asynchronous LED
On/Off Control
Automatic or Forced Mode Switching
Internal Soft-Start Limits Inrush Current
Short-Circuit/Thermal Protection
4mm × 4mm 24-Pin QFN Plastic Package
The LTC®3207/LTC3207-1 are highly integrated multi-display
LED drivers. The device contains a high-efficiency, low-noise
charge pump to provide power to 12 universal LED current
sources and one camera LED current source. The LTC3207/
LTC3207-1 require only five small ceramic capacitors to
form a complete LED power supply and current controller.
In addition there are two I2C addresses available.
The display currents are set by an internal precision current reference. Independent dimming, On/Off, blinking
and gradation control for all universal current sources is
achieved via the I2C serial interface. 6-bit linear DACs are
available for adjusting brightness levels for each universal
LED current source. The CAM current source has a 4-bit
linear DAC to adjust brightness.
The LTC3207/LTC3207-1 charge pumps optimize efficiency
based on the voltage across the LED current sources. The
device powers-up in 1x mode and will automatically switch
to boost mode whenever any enabled LED current source
begins to enter dropout. The first dropout switches the
IC into 1.5x mode and a subsequent dropout switches
the LTC3207/LTC3207-1 into 2x mode. The device resets
to 1x mode whenever a data register is updated via the
I2C port.
APPLICATIONS
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Video Phones with QVGA+ Displays
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Protected by U.S. Patents,
including 6411531.
TYPICAL APPLICATION
4-LED MAIN, 2-LED SUB, Dual RGB and Camera Light
C2
2.2µF
VBAT
C1
2.2µF
DVCC
C3
2.2µF
MAIN
C1P C1M C2P C2M
VBAT
CPO
SUB
RGB
RGB
CAM
C4
4.7µF
LTC3207/LTC3207-1
DVCC
0.1µF
ULED1-12
I2
C
ENABLE DISABLE
LOW HI
2
SCL/SDA
CAM
ENU
CAMHL
12
3207 TA01
GND
3207fc
1
LTC3207/LTC3207-1
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Notes 1, 4)
C2M
C1M
VBAT
ENU
C2P
C1P
TOP VIEW
24 23 22 21 20 19
CPO 1
18 ULED12
ULED1 2
17 ULED11
ULED2 3
16 ULED10
25
ULED3 4
15 ULED9
ULED4 5
14 ULED8
ULED5 6
ULED6
DVCC
SDA
9 10 11 12
SCL
8
CAM
13 ULED7
7
CAMHL
VBAT, DVCC, CPO ........................................... –0.3V to 6V
ULED1 to ULED12, CAM .............................. –0.3V to 6V
SDA, SCL, ENU, CAMHL .............–0.3V to (DVCC + 0.3V)
ICPO
Continuous (Note 3) ........................................350mA
Pulsed at 10% Duty Cycle ................................600mA
ICAM
Continuous (Note 3) ........................................300mA
Pulsed at 10% Duty Cycle ................................460mA
CPO Short-Circuit Duration .............................. Indefinite
Operating Temperature Range (Note 2).... –40°C to 85°C
Storage Temperature Range................... –65°C to 125°C
UF PACKAGE
24-LEAD (4mm × 4mm) PLASTIC QFN
TJMAX = 125°C, θJA = 40°C/W
EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3207EUF#PBF
LTC3207EUF#TRPBF
3207
24-Lead (4mm × 4mm) Plastic QFN
–40°C to 85°C
LTC3207EUF-1#PBF
LTC3207EUF-1#TRPBF
32071
24-Lead (4mm × 4mm) Plastic QFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBAT = 3.6V, DVCC = 3V, ENU = Hi, CAMHL = LO, C1 = C2 = C3 = 2.2µF,
C4 = 4.7µF, unless otherwise noted.
PARAMETER
CONDITIONS
●
VBAT Operating Voltage
IVBAT Operating Current
MIN
2.9
ICPO = 0, 1x Mode
ICPO = 0, 1.5x Mode
ICPO = 0, 2x Mode
MAX
5.5
0.5
2.9
4.1
DVCC UVLO Threshold
DVCC Operating Voltage
TYP
1.5
VBAT UVLO Threshold
V
5.5
1.5
VBAT Shutdown Current
●
DVCC Shutdown Current
●
3.2
V
mA
mA
mA
1
●
UNITS
V
V
7
µA
1
µA
31
mA
Universal LED Current, 6-Bit Linear DACs, ULED = 1V
Full-Scale LED Current
Minimum (1LSB) LED Current
●
24.2
27.5
0.436
mA
3207fc
2
LTC3207/LTC3207-1
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBAT = 3.6V, DVCC = 3V, ENU = Hi, CAMHL = LO, C1 = C2 = C3 = 2.2µF,
C4 = 4.7µF, unless otherwise noted.
PARAMETER
CONDITIONS
LED Current Matching
Any Two Outputs, 50% of FS
LED Dropout Voltage
MIN
TYP
MAX
UNITS
2
%
ILED = FS
180
mV
Blink Rate Period
REG15, D6 and D7
1.25
2.5
s
s
ULED Up/Down Gradation Times
REG15, D4 and D5
0.24
●
0.45
0.48
●
0.9
0.96
●
VOL General Purpose Output Mode (GPO)
1.8
IOUT = 1mA, Single Output Enabled
7
s
s
s
s
s
s
mV
CAM LED Current, 4-Bit Linear DAC, CAM = 1V
Full-Scale LED Current
425
mA
Minimum (1LSB) LED Current
29
mA
LED Dropout Voltage
ILED = FS
450
mV
High Current Safety Timer
High Current Mode
2.1
s
Charge Pump (CPO)
1x Mode Output Impedance
0.6
Ω
1.5x Mode Output Impedance
VBAT = 3V, VCPO = 4.2V (Note 5)
3.6
Ω
2x Mode Output Impedance
VBAT = 3V, VCPO = 4.8V (Note 5)
4.1
Ω
CPO Regulation Voltage
1.5x Mode, ICPO = 20mA
2x Mode, ICPO = 20mA
4.55
5.05
V
V
●
CLOCK Frequency
0.65
0.85
1.05
MHz
SDA, SCL, ENU, CAMHL
VIL
●
VIH
●
0.7 • DVCC
0.3 • DVCC
V
V
IIH
SDA, SCL, ENU, CAMHL = DVCC
●
–1
1
µA
IIL
SDA, SCL, ENU, CAMHL = 0V
●
–1
1
µA
VOL
IPULLUP = 3mA
●
0.4
V
400
kHz
0.12
Digital Output Low (SDA)
Serial Port Timing (Notes 6, 7)
tSCL
Clock Operating Frequency
tBUF
Bus Free Time Between Stop and Start Condition
1.3
µs
tHD,STA
Hold Time After (Repeated) Start Condition
0.6
µs
tSU,STA
Repeated Start Condition Setup Time
0.6
µs
tSU,STO
Stop Condition Setup Time
0.6
µs
tHD,DAT(OUT)
Output Data Hold Time
tHD,DAT(IN)
Input Data Hold Time
0
ns
tSU,DAT
Data Setup Time
100
ns
tLOW
Clock Low Period
1.3
µs
tHIGH
Clock High Period
0.6
µs
0
900
ns
3207fc
3
LTC3207/LTC3207-1
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBAT = 3.6V, DVCC = 3V, ENU = Hi, CAMHL = LO, C1 = C2 = C3 = 2.2µF,
C4 = 4.7µF, unless otherwise noted.
PARAMETER
CONDITIONS
MAX
UNITS
tf
Clock Data Fall Time
MIN
20
300
ns
tr
Clock Data Rise Time
20
300
ns
tSP
Spike Suppression Time
50
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3207E/LTC3207E-1 are guaranteed to meet performance
specifications from 0°C to 85°C. Specifications over the –40°C to
85°C ambient operating temperature range are assured by design,
characterization and correlation with statistical process controls.
Note 3: Based on long term current density limitations. Assumes operating
duty cycle of <10% under absolute maximum conditions for durations less
than 10 seconds.
ns
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may result in device degradation or failure.
Note 5: 1.5x mode output impedance is defined as (1.5VBAT – VCPO)/IOUT.
2x mode output impedance is defined as (2VBAT – VCPO)/IOUT.
Note 6: All values are referenced to VIH and VIL levels.
Note 7: Guaranteed by design.
TYPICAL PERFORMANCE CHARACTERISTICS
Mode Switch Dropout Times
TYP
TA = 25°C unless otherwise noted
1.5x Mode CPO Ripple
2x Mode CPO Ripple
VBAT = 3.6V
VCPO
1V/DIV
2x
1.5x
VCPO
20mV/DIV
AC
COUPLED
VCPO
20mV/DIV
AC
COUPLED
1x
3207 G01
200µs/DIV
3207 G02
500ns/DIV
VBAT = 3.6V
ICPO = 200mA
CCPO = 4.7µF
4.5
SWITCH RESISTANCE (Ω)
VBAT = 3.3V
0.70
0.65
VBAT = 3.6V
0.60
VBAT = 3.9V
0.55
0.50
0.45
0.40
–40
–15
10
35
TEMPERATURE (°C)
60
85
3207 G04
4.3
4.1
1.5x Mode CPO Voltage vs ICPO
4.8
VBAT = 3V
VCPO = 4.2V
C2 = C3 = 2.2µF
C4 = 4.7µF
C2 = C3 = 2.2µF
C4 = 4.7µF
4.6
3.9
CPO VOLTAGE (V)
ICPO = 200mA
0.75
OPEN LOOP OUTPUT RESISTANCE (Ω)
0.80
VBAT = 3.6V
IVCPO = 200mA
CCPO = 4.7µF
1.5x Mode Charge Pump Open-Loop
Output Resistance vs Temperature
(1.5VBAT -VCPO) / ICPO
1x Mode Switch Resistance
vs Temperature
3207 G03
500ns/DIV
3.7
3.5
3.3
3.1
2.9
4.4
3.6V
3.5V
3.4V
3.3V
3.2V
3.1V
VBAT = 3V
4.2
4.0
3.8
2.7
2.5
–40
–15
35
10
TEMPERATURE (°C)
60
85
3207 G05
3.6
0
100
300
200
ICPO (mA)
400
500
3207 G06
3207fc
4
LTC3207/LTC3207-1
TYPICAL PERFORMANCE CHARACTERISTICS
2x Mode Charge Pump Open-Loop
Output Resistance vs Temperature
(2VBAT -VCPO) / ICPO
Oscillator Frequency
vs VBAT Voltage
2x Mode CPO Voltage vs ICPO
5.2
VBAT = 3V
VCPO = 4.8V
C2 = C3 = 2.2µF
C4 = 4.7µF
4.8
4.6
CPO VOLTAGE (V)
4.2
4.0
3.8
3.6
4.8
4.7
4.6
4.5
4.4
3.2
4.3
4.2
35
10
TEMPERATURE (°C)
60
85
850
3.6V
3.5V
3.4V
3.3V
3.2V
3.1V
VBAT = 3V
4.9
3.4
–15
TA = –40°C
5.0
4.4
3.0
–40
875
5.1
FREQUENCY (kHz)
5.0
OPEN LOOP OUTPUT RESISTANCE (Ω)
TA = 25°C unless otherwise noted
TA = 25°C
825
TA = 85°C
800
C2 = C3 = 2.2µF
C4 = 4.7µF
100
0
300
200
ICPO (mA)
400
775
2.9
500
7.5
1.5x Mode VBAT Current vs ICPO
(IVBAT -1.5ICPO)
500
20
VBAT = 3.6V
TA = 85°C
TA = 25°C
3.5
VBAT CURRENT (mA)
490
TA = –40°C
VBAT CURRENT (µA)
VBAT SHUTDOWN CURRENT (µA)
495
6.5
485
480
475
470
465
15
10
5
460
2.5
5.3
3207 G09
1x Mode No Load VBAT Current
vs VBAT Voltage
VBAT Shutdown Current
vs VBAT Voltage
4.5
4.5
4.1
4.9
3.7
VBAT VOLTAGE (V)
3207 G08
3207 G07
5.5
3.3
455
1.5
2.9
3.3
4.5
4.1
4.9
3.7
VBAT VOLTAGE (V)
3207 G10
450
CAM PIN CURRENT (mA)
VBAT CURRENT (mA)
10
5
400
350
350
300
250
200
150
100
0
100
200
300
400
ICPO (mA)
500
600
3207 G13
0
0.0
400
500
450
VBAT = 3.6V
400
50
0
300
200
ICPO (mA)
CAM LED Current
vs Input Code
CAM LED CURRENT (mA)
VBAT = 3.6V
15
100
3207 G12
CAM Pin Current
vs CAM Pin Voltage
20
0
3207 G11
2x Mode VBAT Current vs ICPO
(IVBAT - 2ICPO)
25
0
450
2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4
VBAT VOLTAGE (V)
5.3
300
250
200
150
100
50
0
0.2
0.6
0.8
0.4
CAM PIN VOLTAGE (V)
1.0
3207 G14
0 1 2 3 4 5 6 7 8 9 A B C D E F
INPUT CODE (HEX)
3207 G15
3207fc
5
LTC3207/LTC3207-1
TYPICAL PERFORMANCE CHARACTERISTICS
CAM Pin Dropout Voltage
vs CAM Pin Current
VBAT = 3.6V
VBAT = 3.6V
24
200
100
ULED CURRENT (mA)
300
0
ULED Current vs Input Code
28
25
400
ULED PIN CURRENT (mA)
CAM PIN DROPOUT VOLTAGE (mV)
ULED Pin Current
vs ULED Pin Voltage
30
500
20
15
10
5
50
100
150 200 250 300 350
CAM PIN CURRENT (mA)
0
0.00
400
16
12
8
0.06
0.12
0.18
0.24
ULED PIN VOLTAGE (V)
0
0.30
0
CAM EFFICIENCY (PLED/PIN) (%)
100
80
60
40
20
100
100
90
90
80
70
60
50
40
30
20
10
0
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28
ULED PIN CURRENT (mA)
13 1C 25 2E
INPUT CODE (HEX)
300mA LED CURRENT
(TYP VF AT 300mA = 3.6V,
AOT-2015HPW)
0
3.0
3.5
4.5
4.0
VBAT VOLTAGE (V)
3207 G19
3F
80
70
60
50
40
30
20
10
5.0
37
12-LED ULED Display Efficiency
vs VBAT Voltage
ULED EFFICIENCY (PLED/PIN) (%)
VBAT = 3.6V
160
120
0A
3207 G18
CAM Efficiency vs VBAT Voltage
140
1
3207 G17
ULED Pin Dropout Voltage
vs ULED Pin Current
ULED PIN DROPOUT VOLTAGE (mV)
20
4
3207 G16
180
TA = 25°C unless otherwise noted
5.5
3207 G20
0
3.0
12 LEDS AT 15mA/LED
(TYP VF AT 15mA = 3.2V,
NICHIA NSCW100)
3.5
4.5
4.0
VBAT VOLTAGE (V)
5.0
5.5
3207 G21
PIN FUNCTIONS
CPO (Pin 1): Output of the Charge Pump. Used to power
all LEDs. A 4.7µF X5R or X7R ceramic capacitor should
be connected to ground.
ULED1-ULED12 (Pins 2-6,12-18): Current Source Outputs
for Driving LEDs. The LED current can be set from 0mA
to 27.5mA in 64 steps via software control and internal
6-bit linear DAC. Each output can be disabled by setting
the associated data register REG1 to REG12 low. ULED1
to ULED12 can also be used as I2C controlled open-drain
general purpose outputs. Connect unused outputs to
ground.
CAM (Pin 7): Current Source Output for the CAM Display
White LED. The LED on the CAM display can be set from
0mA to 425mA in 16 steps via software control and internal 4-bit linear DAC. Two 4-bit registers are available.
One is used to program the high camera current and the
second the low camera current. These registers can be
selected via the serial port or the CAMHL pin. The output
can be disabled by setting data in REG13 low. A safety
timer will disable the output after two seconds whenever
the high camera current mode is selected (see Applications Information).
3207fc
6
LTC3207/LTC3207-1
PIN FUNCTIONS
CAMHL (Pin 8): Selects CAM high register when asserted
high and CAM low register when low. The high to low
transition automatically resets the charge pump mode to
1x. The logic level for CAMHL is referenced to DVCC. If
unused, the pin should be connected to ground.
pacitor should be connected from C1P to C1M and C2P
to C2M.
VBAT (Pin 21): Supply Voltage for the Entire Device. This
pin must be bypassed with a single 2.2µF low ESR ceramic
capacitor.
DVCC (Pin 9): Supply Voltage for All Digital I/O Lines. This
pin sets the logic reference level of the device. DVCC will
reset the data registers when set below the undervoltage
lockout threshold which is the recommended method for
resetting the part after power up. A 0.1µF X5R or X7R
ceramic capacitor should be connected to ground.
ENU (Pin 22): Input. Used to enable or disable the preselected ULED outputs. When the pin is toggled from low
(disable) to high (enable), the device illuminates the preselected LEDs. When ENU is controlling selected outputs and
other outputs have been enabled the charge pump mode
will be reset to 1x on the falling edge of ENU. When ENU
is controlling selected outputs and no other outputs are
active the part will go from enabled to shutdown. The ENU
logic-level is referenced to DVCC. This pin is connected to
ground if unused.
SCL (Pin 10): I2C Clock Input. The logic-level for SCL is
referenced to DVCC.
SDA (Pin 11): Input Data for the Serial Port. Serial data
is shifted in one bit per clock to control the device. The
logic-level is referenced to DVCC.
Exposed Pad (Pin 25): Ground. The Exposed Pad must
be soldered to PCB ground.
C1P, C2P, C1M, C2M (Pin 24, 23, 20, 19): Charge Pump
Flying Capacitor Pins. A 2.2µF X7R or X5R ceramic ca-
BLOCK DIAGRAM
19
20
C2M
850kHz
OSCILLATOR
21
23
C1M
24
C2P
GND
C1P
CPO
CHARGE PUMP
VBAT
+
–
ULED1
ULED2
ULED3
+
ULED4
–
ULED5
12
9
22
8
11
10
DVCC
ULED6
12 UNIVERSAL
CURRENT SOURCES
AND DACS
1.22V
ULED7
ULED8
ENU
CAMHL
CONTROL
LOGIC
MASTER/SLAVE
REG
CAM CURRENT
SOURCE
SHIFT REGISTER
2 SECOND
SAFETY TIMER
25
1
2
3
4
5
6
12
13
14
SDA
SCL
CAM
ULED12
7
18
ULED11
17
ULED10
16
ULED9
15
3207 BD
3207fc
7
LTC3207/LTC3207-1
OPERATION
Power Management
Charge Pump Strength
The LTC3207/LTC3207-1 use a switched capacitor charge
pump to boost CPO to as much as two times the input
voltage up to 5.05V. The part starts up in 1x mode. In
this mode, VBAT is connected directly to CPO. This mode
provides maximum efficiency and minimum noise. The
LTC3207/LTC3207-1 will remain in 1x mode until an LED
current source drops out. Dropout occurs when a current
source voltage becomes too low for the programmed
current to be supplied. When dropout is detected, the
LTC3207/LTC3207-1 will switch into 1.5x mode. The CPO
voltage will then start to increase and will attempt to reach
1.5x VBAT up to 4.55V. Any subsequent dropout will cause
the part to enter the 2x mode. The CPO voltage will attempt
to reach 2x VBAT up to 5.05V.
When the LTC3207/LTC3207-1 operate in either 1.5x
mode or 2x mode, the charge pump can be modeled as
a Thevenin-equivalent circuit to determine the amount of
current available from the effective input voltage and effective open-loop output resistance, ROL (Figure 1).
A 2-phase non-overlapping clock activates the charge
pump switches. In the 2x mode, the flying capacitors are
charged on alternate clock phases from VBAT to minimize
CPO voltage ripple. In 1.5x mode the flying capacitors are
charged in series during the first clock phase and stacked
in parallel on VBAT during the second phase. This sequence
of charging and discharging the flying capacitors continues
at a constant-frequency of 850kHz.
The current delivered by each LED current source is controlled by an associated DAC. Each DAC is programmed
via the I2C port.
Soft-Start
Initially, when the part is in shutdown, a weak switch
connects VBAT to CPO. This allows VBAT to slowly charge
the CPO output capacitor and to prevent large charging
currents from occurring.
The LTC3207/LTC3207-1 also employ a soft-start feature
on its charge pump to prevent excessive inrush current
and supply droop when switching into the step-up modes.
The current available to the CPO pin is increased linearly
over a typical period of 125µs. Soft-start occurs at the
start of both 1.5x and 2x mode changes.
ROL
+
–
+
1.5VBAT OR 2VBAT
CPO
–
3207 F01
Figure 1. Equivalent Open-Loop
ROL is dependent on a number of factors, including the
switching term, 1/(2fOSC • CFLY), internal switch resistances and the non-overlap period of the switching circuit.
However, for a given ROL, the amount of current available
will be directly proportional to the advantage voltage of
1.5VBAT – CPO for 1.5x mode and 2VBAT – CPO for 2x mode.
Consider the example of driving LEDs from a 3.1V supply.
If the LED forward voltage is 3.8V and the current sources
require 100mV, the advantage voltage for 1.5x mode is
3.1V • 1.5 – 3.8V – 0.1V or 750mV. Notice that if the input
voltage is raised to 3.2V, the advantage voltage jumps to
900mV, a 20% improvement in available strength.
From Figure 1, for 1.5x mode the available current is
given by:
IOUT =
1 . 5VBAT − VCPO
ROL
(1)
For 2x mode, the available current is given by:
IOUT =
2VBAT − VCPO
ROL
(2)
Notice that the advantage voltage in this case is 3.1V • 2
– 3.8V – 0.1V = 2.3V. ROL is higher in 2x mode but a significant overall increase in available current is achieved.
3207fc
8
LTC3207/LTC3207-1
OPERATION
Mode Switching
The LTC3207/LTC3207-1 will automatically switch from
1x mode to 1.5x mode and subsequently to 2x mode
whenever a dropout condition is detected at an LED pin.
Dropout occurs when an active current source voltage
becomes too low for the programmed current to be supplied. The mode change will not occur unless dropout
has existed for approximately 400µs. This delay will allow
the LEDs to warm up and achieve the final LED forward
voltage value.
The mode will automatically switch back to 1x whenever
a register is updated via the I2C port, when gradation
completes ramping down, on the falling edge of either
ENU or CAMHL and after each blink period.
The part can be forced to operate in 1x, 1.5x or 2x mode
by writing the appropriate bits into REG0. This feature
may be used for powering loads from CPO.
Nonprogrammed current sources do not affect dropout.
In addition, ENU controlled current sources do not affect
dropout when ENU is low.
Universal Current Sources (ULED1 to ULED12)
There are twelve universal 27.5mA current sources. Each
current source has a 6-bit linear DAC for current control.
The output current range is 0 to full-scale in 64 steps.
Each current source is disabled when an all zero data word
is written. The supply current for that source is reduced
to zero. Connect unused outputs to ground.
ULED1 to ULED12 can also be used as general purpose
outputs (GPO). Current sources in the GPO mode can be
used as I2C controlled open-drain drivers. The GPO mode
is selected by programming REG1 to REG12, Bit 6 and
Bit 7 to a logic one. In the GPO mode dropout detection
is disabled, output swings to ground will not cause mode
switching.
Camera Current Source
There is one CAM current source. This current source has
a 4-bit linear DAC for current control. The output current
range is 0mA to 425mA in 16 steps.
The current source is disabled when this section receives
an all zero data word. The supply current for the current
source is reduced to zero.
CAMHL
The CAMHL pin quickly selects the camera high register
for flash applications without re-accessing the I2C port.
When low, the CAM current range will be controlled by
the camera low 4-bit register. When CAMHL is asserted
high, the current range will be set by the camera high 4-bit
register. The charge pump mode will be reset to 1x on the
falling edge of CAMHL.
A safety timer will disable the CAM output after two seconds whenever the high current mode is selected. To reset
the safety timer, the CAMHL signal from the external pin
or through the I2C port is set low. Alternatively the CAM
register can be written to all zeroes. If unused, the pin
should be connected to ground.
Blinking
Each universal output (ULED1 to ULED12) can be set to
blink 0.156s or 0.625s with a period of 1.25s or 2.5s via
the I2C port. The blinking rate is selected via REG15 and
ULED outputs are selected via REG1 to REG12. Blinking
and gradation rates are independent. Blink resets the charge
pump to 1x mode after each period. Please refer to Application Note 108 for detailed information and examples
on programming blinking.
Gradation
Universal LED outputs ULED1 to ULED12 can be set to
have the current ramp up and down at 0.24s, 0.48s and
0.96s rates via the I2C port. The total gradation period is
longer than the ramp time since there is a region at the
start and end where the ULED current does not change.
A new gradation period cannot be started until after the
previous gradation period has ended. Each of these outputs
can have either blinking or gradation enabled. The gradation time is set via REG15 and ULED outputs are selected
via REG1 to REG12. The ramp direction is controlled via
REG0. Setting the UP bit high causes gradation to ramp
up; setting this bit low causes gradation to ramp down.
Please refer to Application Note 108 for detailed information and examples on programming gradation.
3207fc
9
LTC3207/LTC3207-1
OPERATION
When gradation is disabled the LED output current remains
at the programmed value. The gradation enable bit must
be cleared when the gradation timer is disabled.
The charge pump mode is reset to 1x after gradation
completes ramping down.
External Enable Control (ENU)
The ENU pin can be used to enable or disable the LTC3207/
LTC3207-1 without reaccessing the I2C port. This might be
useful to indicate an incoming phone call without waking
the micro-controller. ENU can be programmed to independently control all preselected displays. LED displays are
controlled with ENU by setting the appropriate data bits in
REG1 to REG12 and control bits in REG14 and REG15.
To use the ENU pin, the I2C port must first be configured
to select the desired LED outputs. When ENU is high, the
selected displays will be enabled as per the REG14 and
REG15 settings. When ENU is low, the selected displays
will be off. If no other displays are programmed to be
enabled, the chip will be in shutdown.
Gradation can also be preprogrammed for control by
the ENU pin. The registers are written as required per
the gradation description and the UP bit is ignored. The
registers are programmed when ENU is low. When ENU is
set high the part will become enabled and the selected LED
outputs will ramp up. When ENU is set low the selected
LED outputs will ramp low to zero current and then the
part will shut down. The charge pump must be in auto
mode if shutdown is required.
If the ENU pin is not used, it is connected to ground. If
ENU is used and other ULED outputs are active then ENU
will reset the charge pump mode to 1x on the falling edge.
Please refer to Application Note 108 for detailed information and examples on programming ENU control.
Shutdown Current
Shutdown occurs when all the current source data bits
have been written to zero, when DVCC is set below the
undervoltage lockout voltage or when ENU switches low
(all other outputs disabled). The charge pump must also
be in auto mode.
Although the LTC3207/LTC3207-1 are designed to have
very low shutdown current, they will draw about 3.5µA
from VBAT when in shutdown. Internal logic ensures that
the device is in shutdown when DVCC is low. Note, however,
that all of the logic signals that are referenced to DVCC
(SCL, SDA, ENU and CAMHL) will need to be at DVCC
or below (i.e., ground) to avoid violation of the absolute
maximum specifications on these pins.
EMI Reduction
The flying capacitor pins C1M, C1P, C2M and C2P have
controlled slew rates, in the 5ns to 10ns range, to reduce
conducted and radiated noise.
Serial Port
The microcontroller-compatible I2C serial port provides
all of the command and control inputs for the LTC3207/
LTC3207-1. Data on the SDA input is loaded on the rising
edge of SCL. D7 is loaded first and D0 last. There are 16
data registers, one address register and one sub-address
register. Once all address bits have been clocked into the
address register, acknowledge occurs. The sub-address
register is then written, followed by writing the data
register. Each data register has a sub-address. After the
data register has been written, a load pulse is created
after the stop bit. The load pulse transfers all of the data
held in the data registers to the DAC registers. The stop
bit can be delayed until all of the data master registers
have been written. At this point the LED current will be
changed to the new settings. The serial port uses static
logic registers so there is no minimum speed at which it
can be operated.
I2C Interface
The LTC3207/LTC3207-1 communicate with a host (master)
using the standard I2C 2-wire interface. The Timing Diagram
(Figure 3) shows the timing relationship of the signals on
the bus. The two bus lines, SDA and SCL, must be high
when the bus is not in use. External pull-up resistors or
current sources, such as the LTC1694 SMBus Accelerator, are required on these lines.
3207fc
10
LTC3207/LTC3207-1
OPERATION
The LTC3207/LTC3207-1 are receive-only (slave) devices.
I2C
Sub-Address Byte
I2C
MSB
addresses available. The LTC3207
There are two
address is 00110110 and the LTC3207-1 I2C address is
00110100. The I2C address is the only difference between
the LTC3207 and the LTC3207-1.
Write Word Protocol Used by the LTC3207/LTC3207-1
1
7
1
1
8
1
S Slave Address Wr A *Sub-Address A
8
1
1
Data Byte
A
P**
S = Start Condition, Wr = Write Bit = 0, A = Acknowledge,
P = Stop Condition
*The sub-address uses only the first four bits, D0, D1, D2 and D3
**Stop can be delayed until all of the data registers have been written
Bus Speed
The I2C port is designed to be operated at speeds of up
to 400kHz. It has built-in timing delays to ensure correct
operation when addressed from an I2C compliant master
device. It also contains input filters designed to suppress
glitches should the bus become corrupt.
LSB
7
6
5
4
3
2
1
0
Register
Function
X
X
X
X
0
0
0
0
REG0
COMMAND
X
X
X
X
0
0
0
1
REG1
ULED1
X
X
X
X
0
0
1
0
REG2
ULED2
X
X
X
X
0
0
1
1
REG3
ULED3
X
X
X
X
0
1
0
0
REG4
ULED4
X
X
X
X
0
1
0
1
REG5
ULED5
X
X
X
X
0
1
1
0
REG6
ULED6
X
X
X
X
0
1
1
1
REG7
ULED7
X
X
X
X
1
0
0
0
REG8
ULED8
X
X
X
X
1
0
0
1
REG9
ULED9
X
X
X
X
1
0
1
0
REG10
ULED10
X
X
X
X
1
0
1
1
REG11
ULED11
X
X
X
X
1
1
0
0
REG12
ULED12
X
X
X
X
1
1
0
1
REG13
CAM
X
X
X
X
1
1
1
0
REG14
ENU
X
X
X
X
1
1
1
1
REG15
G/B/ENU
DATA BYTE
SUB-ADDRESS
LTC3207
ADDRESS
0
0
1
LTC3207-1
1
0
WR
1
1
0
ADDRESS
S7
S6
S5
S4
S3
S2
S1
S0
7
6
5
4
3
2
1
0
WR
0
0
1
1
0
1
0
0
SDA
0
0
1
1
0
1
1
0
ACK
S7
S6
S5
S4
S3
S2
S1
S0 ACK
7
6
5
4
3
2
1
0
ACK
SCL
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
9
START
STOP
9
3207 FO2
Figure 2. Bit Assignments
SDA
tSU, STA
tSU, DAT
tLOW
tBUF
tHD, STA
tHD, DAT
tSU, STO
3207 F03
SCL
t
tHIGH
HD, STA
START
CONDITION
tr
tSP
tf
REPEATED START
CONDITION
STOP
CONDITION
START
CONDITION
Figure 3. Timing Parameters
3207fc
11
LTC3207/LTC3207-1
OPERATION
REG0, Command Byte.
Register Sub-Address = 0000
MSB
LSB
D7
D6
D5
D4
D3
D2
D1
D0
CAMHL
Reserved
Reserved
Reserved
Force2x
Force1p5
Quick write
UP
UP
0
1
Gradation counts down
Gradation counts up
Quick write
0
1
Normal write to each register
Quick write, REG1 data is written to all twelve universal registers
Force1p5
1
0
Forces charge pump into 1.5x mode
Enables mode logic to control mode charges based on dropout signal
Force2x
1
0
Forces charge pump into 2x mode.
Enables mode logic to control mode changes based on dropout signal
Force1x
D2 (Force1p5x) = 1
D3 (Force2x) = 1
Reserved
X
Reserved
X
Reserved
X
CAMHL
0
1
} Forces Charge Pump Into 1x Mode
External control of CAM
I2C control of CAM
Data Bytes
REG1 to REG12, Universal LED 6-bit linear DAC data with
blink/gradation.
Sub-Address 0001 TO 1100 per Sub-Address Table Above
ULED Mode Enable Bits
LED Current Data
MSB
Normal
Blink Enabled
Gradation Enabled
GPO Mode
(Gradation/Blink/Dropout Off)
LSB
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
1
1
0
1
0
1
D5
D5
D5
D5
D4
D4
D4
D4
D3
D3
D3
D3
D2
D2
D2
D2
D1
D1
D1
D1
D0
D0
D0
D0
3207fc
12
LTC3207/LTC3207-1
OPERATION
REG13, Camera
LED 4-bit high and 4-bit low DAC data.
Register Sub-Address = 1101
MSB
HIGH BITS
LSB
MSB
LOW BITS
LSB
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
D3
D2
D1
D0
D3
D2
D1
D0
REG14, ENU
Setting bit high selects the outputs to be controlled by ENU.
Register Sub-Address = 1110
MSB
LSB
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ULED8
ULED7
ULED6
ULED5
ULED4
ULED3
ULED2
ULED1
REG15, ENU, Gradation and Blink Times
Setting bits 0 high to 3 high selects the outputs to be
controlled by ENU. Bits 4 to 7 control gradation and
blink times.
Register Sub-Address = 1111
ENU Output Selection
LSB
3
2
1
0
ULED12
ULED11
ULED10
ULED9
Sub-Address = 1111
Blink Times and Period
Gradation Ramp Times and Period
D7
D6
Blink
Period
D5
D4
Ramp
Period
0
0
1
1
0
1
0
1
0.625s
0.156s
0.625s
0.156s
1.25s
1.25s
2.5s
2.5s
0
0
1
1
0
1
0
1
Disabled
0.24s
0.48s
0.96s
Disabled
0.45s
0.9s
1.8s
START and STOP Conditions
Byte Format
A bus-master signals the beginning of a communication
to a slave device by transmitting a START condition.
Each byte sent to the LTC3207/LTC3207-1 must be 8 bits
long followed by an extra clock cycle for the Acknowledge
bit to be returned by the LTC3207/LTC3207-1. The data
should be sent to the device most significant bit (MSB)
first.
A START condition is generated by transitioning SDA
from high to low while SCL is high. When the master has
finished communicating with the slave, it issues a STOP
condition by transitioning SDA from low to high while
SCL is high. The bus is then free for communication with
another I2C device.
3207fc
13
LTC3207/LTC3207-1
OPERATION
Acknowledge
The Acknowledge signal is used for handshaking between
the master and the slave. An Acknowledge (active LOW)
generated by the slave (LTC3207/LTC3207-1) lets the master know that the latest byte of information was received.
The Acknowledge-related clock pulse is generated by the
master. The master releases the SDA line (HIGH) during
the Acknowledge clock cycle. The slave-receiver must pull
down the SDA line during the Acknowledge clock pulse
so that it remains a stable LOW during the HIGH period
of this clock pulse.
Slave Address
The LTC3207 responds to only one 7-bit address which
has been factory programmed to 0011011. The LTC3207-1
responds to only one 7-bit address which has been factory
programmed to 0011010. The eighth bit of the address
byte (R/W) must be 0 for the LTC3207/LTC3207-1 to
recognize the address since it is a write-only device. This
effectively forces the address to be 8 bits long where the
least significant bit of the address is 0. If the correct seven
bit address is given but the R/W bit is 1, the LTC3207/
LTC3207-1 will not respond.
Bus Write Operation
The master initiates communication with the LTC3207/
LTC3207-1 with a START condition and a 7-bit address
followed by the write bit R/W = 0. If the address matches
that of the LTC3207/LTC3207-1, the device returns an
Acknowledge. The master should then deliver the most
significant sub-address byte for the data register to be
written. Again, the LTC3207/LTC3207-1 acknowledge
and then the data is delivered starting with the most significant bit. This cycle is repeated until all of the required
data registers have been written. Any number of data
registers can be written. Each data byte is transferred to
an internal holding latch upon the return of an Acknowl-
edge. After all data bytes have been transferred to the
LTC3207/LTC3207-1, the master may terminate the
communication with a STOP condition. Alternatively, a
REPEAT-START condition can be initiated by the master
and another chip on the I2C bus can be addressed. This
cycle can continue indefinitely and the LTC3207/LTC3207-1
will remember the last input of valid data that they receive.
Once all chips on the bus have been addressed and sent
valid data, a global STOP condition can be sent and the
LTC3207/LTC3207-1 will update all registers with the data
that it had received.
In certain circumstances the data on the I2C bus may become
corrupt. In these cases the LTC3207/LTC3207-1 respond
appropriately by preserving only the last set of complete
data that they have received. For example, assume the
LTC3207/LTC3207-1 have been successfully addressed
and are receiving data when a STOP condition mistakenly
occurs. The LTC3207/LTC3207-1 will ignore this stop
condition and will not respond until a new START condition, correct address, sub-address and new set of data
and STOP condition are transmitted.
Likewise, if the LTC3207/LTC3207-1 were previously addressed and sent valid data but not updated with a STOP,
they will respond to any STOP that appears on the bus
with only one exception, independent of the number of
REPEAT-STARTs that have occurred. If a REPEAT-START is
given and the LTC3207/LTC3207-1 successfully acknowledge their address and first byte, they will not respond to
a STOP until all bytes of the new data have been received
and acknowledged.
Quick Write
Registers REG1 to REG12 can be written in parallel by setting Bit 1 of REG0 high. When this bit is set high the next
write sequence to REG1 will write the data to REG1 through
REG12 which is all of the universal LED registers.
3207fc
14
LTC3207/LTC3207-1
APPLICATIONS INFORMATION
VBAT, CPO Capacitor Selection
The style and value of the capacitors used with the LTC3207/
LTC3207-1 determine several important parameters such
as regulator control loop stability, output ripple, charge
pump strength and minimum start-up time.
To reduce noise and ripple, it is recommended that low
equivalent series resistance (ESR) ceramic capacitors are
used for both CVBAT and CCPO. Tantalum and aluminum
capacitors are not recommended due to high ESR.
The value of CCPO directly controls the amount of output
ripple for a given load current. Increasing the size of CCPO
will reduce output ripple at the expense of higher start-up
current. The peak-to-peak output ripple of the 1.5x mode
is approximately given by the expression:
VRIPPLEp−p = IOUT
3fOSC • CCPO
Where fOSC is the LTC3207/LTC3207-1’s oscillator frequency, or typically 850kHz, and CCPO is the output storage capacitor.
The output ripple in 2x mode is very small due to the fact
that load current is supplied on both cycles of the clock.
Both style and value of the output capacitor can significantly affect the stability of the LTC3207/LTC3207-1. As
shown in the Block Diagram, the device uses a control
loop to adjust the strength of the charge pump to match
the required output current. The error signal of the loop is
stored directly on the output capacitor. The output capacitor
also serves as the dominant pole for the control loop. To
prevent ringing or instability, it is important for the output
capacitor to maintain at least 3.2µF of capacitance over all
conditions and the ESR should be less than 80mΩ.
Multilayer ceramic chip capacitors typically have exceptional ESR performance. MLCCs combined with a tight board
layout will result in very good stability. As the value of CCPO
controls the amount of output ripple, the value of CVBAT
controls the amount of ripple present at the input pin(VBAT).
The LTC3207/LTC3207-1’s input current will be relatively
constant while the charge pump is either in the input charging phase or the output charging phase but will drop to zero
during the clock nonoverlap times. Since the nonoverlap
time is small (~25ns), these missing “notches” will result
in only a small perturbation on the input power supply
line. Note that a higher ESR capacitor such as tantalum
will have higher input noise due to the higher ESR. Therefore, ceramic capacitors are recommended for low ESR.
Input noise can be further reduced by powering the
LTC3207/LTC3207-1 through a very small series inductor
as shown in Figure 4. A 10nH inductor will reject the fast
current notches, thereby presenting a nearly constantcurrent load to the input power supply. For economy, the
10nH inductor can be fabricated on the PC board with
about 1cm (0.4") of PC board trace.
VBAT
LTC3207/
LTC3207-1
GND
3207 F04
Figure 4. 10nH Inductor Used for Input Noise Reduction
(Approximately 1cm of Board Trace)
3207fc
15
LTC3207/LTC3207-1
APPLICATIONS INFORMATION
Flying Capacitor Selection
Warning: Polarized capacitors, such as tantalum or
aluminum, should never be used for the flying capacitors since their voltage can reverse upon start-up of the
LTC3207/LTC3207-1. Ceramic capacitors should always
be used for the flying capacitors.
The flying capacitors control the strength of the charge
pump. In order to achieve the rated output current it is
necessary to have at least 1.6µF of capacitance for each
of the flying capacitors. Capacitors of different materials
lose their capacitance with higher temperature and voltage
at different rates. For example, a ceramic capacitor made
of X7R material will retain most of its capacitance from
–40°C to 85°C whereas a Z5U or Y5V style capacitor will
lose considerable capacitance over that range. Z5U and Y5V
capacitors may also have a very poor voltage coefficient
causing them to lose 60% or more of their capacitance when
the rated voltage is applied. Therefore, when comparing
different capacitors, it is often more appropriate to compare
the amount of achievable capacitance for a given case size
rather than comparing the specified capacitance value. For
example, overrated voltage and temperature conditions,
a 1µF, 10V, Y5V ceramic capacitor in a 0603 case may not
provide any more capacitance than a 0.22µF, 10V, X7R
available in the same case. The capacitor manufacturer’s
data sheet should be consulted to determine what value
of capacitor is needed to ensure minimum capacitances
at all temperatures and voltages.
Table 1 shows a list of ceramic capacitor manufacturers
and how to contact them:
Table 1. Recommended Capacitor Vendors
AVX
www.avxcorp.com
Kemet
www.kemet.com
Murata
www.murata.com
Taiyo Yuden
www.t-yuden.com
Vishay
www.vishay.com
Layout Considerations and Noise
The LTC3207/LTC3207-1 have been designed to minimize
EMI. However due to the high switching frequency and the
transient currents produced by the LTC3207/LTC3207-1,
careful board layout is necessary. A true ground plane
and short connections to all capacitors will improve
performance and ensure proper regulation under all
conditions.
The flying capacitor pins, C1P, C2P, C1M and C2M,
will have 5ns to 10ns edge-rate waveforms. The large
dv/dt on these pins can couple energy capacitively to
adjacent PCB runs. Magnetic fields can also be generated if the flying capacitors are not close to the
LTC3207/LTC3207-1 (i.e., the loop area is large). To
decouple capacitive energy transfer, a Faraday shield may
be used. This is a grounded PCB trace between the sensitive
node and the LTC3207/LTC3207-1 pins. For a high quality
AC ground, it should be returned to a solid ground plane
that extends all the way to the LTC3207/LTC3207-1.
3207fc
16
LTC3207/LTC3207-1
APPLICATIONS INFORMATION
Power Efficiency
To calculate the power efficiency (η) of an LED driver chip,
the LED power should be compared to the input power.
The difference between these two numbers represents
lost power whether it is in the charge pump or the current sources. Stated mathematically, the power efficiency
is given by:
η=
PLED
PIN
The efficiency of the LTC3207/LTC3207-1 depends upon
the mode in which they are operating. Recall that the
LTC3207/LTC3207-1 operate as pass switches, connecting VBAT to CPO, until dropout is detected at the ILED pin.
This feature provides the optimum efficiency available for
a given input voltage and LED forward voltage. When it is
operating as a switch, the efficiency is approximated by:
η=
PLED VLED • ILED VLED
=
=
PIN
VBAT • IBAT VBAT
since the input current will be very close to the sum of
the LED currents.
At moderate to high output power, the quiescent current
of the LTC3207/LTC3207-1 is negligible and the expression above is valid.
Once dropout is detected at any the LED pin, the LTC3207/
LTC3207-1 enable the charge pump in 1.5x mode.
In 1.5x boost mode, the efficiency is similar to that of a
linear regulator with an effective input voltage of 1.5 times
the actual input voltage. This is because the input current
for a 1.5x charge pump is approximately 1.5 times the
load current. In an ideal 1.5x charge pump, the power
efficiency would be given by:
P
VLED • ILED
VLED
ηIDEAL = LED =
=
PIN
VBAT • 1 . 5 • ILED 1.. 5 • VBAT
Similarly, in 2x boost mode, the efficiency is similar to
that of a linear regulator with an effective input voltage of
2x the actual input voltage. In an ideal 2x charge pump,
the power efficiency would be given by:
P
V
•I
V
ηIDEAL = LED = LED LED = LED
PIN
VBAT • 2 • ILED 2 • VBAT
Thermal Management
For higher input voltages and maximum output current,
there can be substantial power dissipation in the LTC3207/
LTC3207-1. If the junction temperature increases above
approximately 150°C the thermal shutdown circuitry will
automatically deactivate the output current sources and
charge pump. To reduce maximum junction temperature,
a good thermal connection to the PC board is recommended. Connecting the Exposed Pad to a ground plane
and maintaining a solid ground plane under the device
will reduce the thermal resistance of the package and PC
board considerably.
3207fc
17
LTC3207/LTC3207-1
TYPICAL APPLICATIONS
6-LED MAIN, 6-LED Fun Lights Plus Low/High Camera Light
C2
2.2µF
C3
2.2µF
MAIN
C1P C1M C2P C2M
VBAT
CPO
VBAT
C1
2.2µF
I2C
ULED1-12
DVCC
CAM
C4
4.7µF
LTC3207/LTC3207-1
SCL/SDA
FUN LIGHTS
12
DVCC
C5
0.1µF
ENABLE DISABLE
LOW HI
CAM
3207 TA03
ENU
CAMHL
GND
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18
LTC3207/LTC3207-1
PACKAGE DESCRIPTION
UF Package
24-Lead Plastic QFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1697)
0.70 ±0.05
4.50 ± 0.05
2.45 ± 0.05
3.10 ± 0.05 (4 SIDES)
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
4.00 ± 0.10
(4 SIDES)
BOTTOM VIEW—EXPOSED PAD
0.75 ± 0.05
R = 0.115
TYP
PIN 1 NOTCH
R = 0.20 TYP OR
0.35 × 45° CHAMFER
23 24
0.40 ± 0.10
PIN 1
TOP MARK
(NOTE 6)
1
2
2.45 ± 0.10
(4-SIDES)
(UF24) QFN 0105
0.200 REF
0.00 – 0.05
0.25 ± 0.05
0.50 BSC
NOTE:
1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGD-X)—TO BE APPROVED
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE, IF PRESENT
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC3207/LTC3207-1
TYPICAL APPLICATION
6-LED MAIN, 2-LED SUB, RGB, Camera Indicator
Plus Low/High Camera Light
C2
2.2µF
C3
2.2µF
MAIN
C1P C1M C2P C2M
VBAT
CPO
VBAT
C1
2.2µF
2
I2C
ULED1-12
DVCC
RGB
CAM
INDICATOR
CAM
C4
4.7µF
LTC3207/LTC3207-1
SCL/SDA
SUB
12
DVCC
C5
0.1µF
ENABLE DISABLE
LOW HI
CAM
3207 TA02
ENU
CAMHL
GND
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ThinSOT is a trademark of Linear Technology Corporation.
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20 Linear Technology Corporation
LT 0807 REV C • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2007