LTC3544 Quad Synchronous Step-Down Regulator: 2.25MHz, 300mA, 200mA, 200mA, 100mA FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High Efficiency: Up to 95% Four Independent Regulators Provide Up to 300mA, 200mA, 200mA and 100mA Output Current 2.25V to 5.5V Input Voltage Range 2.25MHz Constant-Frequency Operation No Schottky Diodes Required Extremely Low Channel-to-Channel Transient Crosstalk Low Ripple (20mVP-P) Burst Mode Operation: IQ = 70μA (All Channels On) 0.8V Reference Allows Low Output Voltages Shutdown Mode Draws <1μA Supply Current Current Mode Operation for Excellent Line and Load Transient Response Overtemperature Protected Low Profile (3mm × 3mm) 16-Lead QFN Package APPLICATIONS ■ ■ ■ ■ ■ ■ , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131, 5994885. TYPICAL APPLICATION Efficiency vs Load Current, 300mA Channel, All Other Channels Off High Efficiency Quad Step-Down Converter 4.7μF CER VOUT4 1.8V 300mA 4.7μF CER 100 4.7μF CER 4.7μH 93.1k RUN200B VCC PVIN RUN200A SW200B SW200A VFB200B VFB200A 3.3μH 100k 107k VOUT3 0.8V 200mA 4.7μF CER LTC3544 3.3μH 133k RUN300 RUN100 SW300 SW100 VFB300 107k 1 90 PGND 0.1 70 LOSS 60 50 40 VOUT = 2.5V TA = 25°C 0.01 30 10μH 59k VFB100 GNDA EFFICIENCY 80 118k VOUT1 1.2V 100mA 4.7μF CER 20 10 0 0.0001 POWER LOSS (W) VOUT2 1.5V 200mA Switching frequency is internally set to 2.25MHz, allowing the use of small surface mount inductors and capacitors. The internal synchronous switches increase efficiency and eliminate the need for external Schottky diodes. Low output voltages are easily supported with the 0.8V feedback reference voltage. The LTC3544 is available in a low profile (0.75mm) (3mm × 3mm) QFN package. Cellular Telephones Personal Information Appliances Wireless and DSL Modems Digital Still Cameras Media Players Portable Instruments VIN 2.25V TO 5.5V The LTC ®3544 is a quad, high efficiency, monolithic synchronous buck regulator using a constant-frequency, current mode architecture. The four regulators operate independently with separate run pins. The 2.25V to 5.5V input voltage range makes the LTC3544 well suited for single Li-Ion/polymer battery-powered applications. 100% duty cycle provides low dropout operation, extending battery runtime in portable systems. Low ripple Burst Mode® operation increases efficiency at light loads, further extending battery runtime with typically only 20mV of ripple. EFFICIENCY (%) ■ DESCRIPTION 0.001 VIN = 2.7V VIN = 3.6V VIN = 4.2V 0.001 0.01 0.1 LOAD CURRENT (A) 0.0001 1 3544 TA01b 3544B TA01a 3544fa 1 LTC3544 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) SW100 GNDA VCC RUN200B TOP VIEW 16 15 14 13 VFB200B 1 12 RUN100 VFB200A 2 11 VFB100 17 RUN200A 3 10 VFB300 SW200B 4 6 7 8 PGND PVIN SW300 9 5 SW200A Input Supply Voltage .....................................–0.3V to 6V RUNx ............................................. –0.3V to (VIN + 0.3V) VFBx ................................................ –0.3V to (VIN + 0.3V) SWx ............................................... –0.3V to (VIN + 0.3V) 300mA P-Channel Source Current (DC) (Note 8) ..450mA 300mA N-Channel Sink Current (DC) (Note 8) ......450mA 200mA P-Channel Source Current (DC) (Note 8) ..300mA 200mA N-Channel Sink Current (DC) (Note 8) ......300mA 100mA P-Channel Source Current (DC) (Note 8) ..200mA 100mA N-Channel Sink Current (DC) (Note 8) ......200mA Peak 300mA SW Sink and Source Current (Note 8) ................................................................600mA Peak 200mA SW Sink and Source Current (Note 8) ................................................................400mA Peak 100mA SW Sink and Source Current (Note 8) ................................................................200mA Operating Temperature Range ...................–40°C to 85°C Junction Temperature (Notes 3, 4) ........................ 125°C Storage Temperature Range ....................–65°C to 125°C RUN300 UD PACKAGE 16-LEAD (3mm × 3mm) PLASTIC QFN TJMAX = 125°C, θJA = 68°C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3544EUD#PBF LTC3544EUD#TRPBF LCXM 16-Lead (3mm × 3mm) Plastic QFN –40°C to 85°C LEAD BASED FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3544EUD LTC3544EUD#TR LCXM 16-Lead (3mm × 3mm) Plastic QFN –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS General Characteristics VIN Input Voltage Range VFBREGx Regulated Feedback Voltage (Note 5) ΔVFBREGx Reference Voltage Line Regulation (Note 5) VLOADREG Output Voltage Load Regulation (Note 6) VIN = 2.25V to 5.5V ● 2.25 ● 0.792 0.784 5.5 V 0.8 0.8 0.808 0.816 V V 0.05 0.25 %/V 0.5 % 3544fa 2 LTC3544 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V unless otherwise noted. SYMBOL PARAMETER CONDITIONS IS Input DC Bias Current Active Mode (Four Regulators Enabled) Sleep Mode (Four Regulators Enabled) MIN TYP MAX UNITS VFB = 0.7V, ILOAD = 0A, 2.25MHz 825 1100 μA VFB = 0.9V, ILOAD = 0A, 2.25MHz 70 80 μA 0.1 2 μA Shutdown fOSC Oscillator Frequency VRUN(HIGH) RUNx Input High Voltage VIN = 3V VIN = 2.5V to 5.5V 2.25 ● 1.8 ● 1.0 2.7 V ● VRUN(LOW) RUNx Input Low Voltage ISWx SWx Leakage VRUN = 0V, VSW = 0V or 5.5V, VIN = 5.5V IRUNx RUN Leakage Current VIN = 5.5V IVFBx VFBx Leakage Current tSS Soft-Start Period VUVLO Undervoltage Lockout ● VFB = 7.5% to 92.5% Full Scale 650 ● MHz MHz 0.3 V ±0.1 ±1 μA ±0.1 ±1 μA 80 nA 875 1200 μs 1.9 2.25 V 600 800 mA Individual Regulator Characteristics Regulator SW300 – 300mA IPK Peak Switch Current Limit VFB < VFBREG, Duty Cycle < 35% IS300 Input DC Bias Current–Reg SW300 Only Burst Mode Operation (Sleep) VFB = 0.9V, ILOAD = 0A, 2.25MHz RPFET RDS(ON) of P-Channel FET (Note 7) RNFET RDS(ON) of N-Channel FET (Note 7) 400 32 μA ISW = 100mA 0.55 Ω ISW = –100mA 0.50 Ω Regulator SW200A – 200mA IPK Peak Switch Current Limit VFB < VFBREG, Duty Cycle < 35% IS200 Input DC Bias Current–Reg SW200A Only Burst Mode Operation (Sleep) VFB = 0.9V, ILOAD = 0A, 2.25MHz RPFET RDS(ON) of P-Channel FET (Note 7) RNFET RDS(ON) of N-Channel FET (Note 7) 300 400 500 mA 32 μA ISW = 100mA 0.65 Ω ISW = –100mA 0.60 Ω Regulator SW200B – 200mA IPK Peak Switch Current Limit VFB < VFBREG, Duty Cycle < 35% IS200 Input DC Bias Current–Reg SW200B Only Burst Mode Operation (Sleep) VFB = 0.9V, ILOAD = 0A, 2.25MHz RPFET RDS(ON) of P-Channel FET (Note 7) RNFET RDS(ON) of N-Channel FET (Note 7) 300 400 500 mA 32 μA ISW = 100mA 0.65 Ω ISW = –100mA 0.60 Ω Regulator SW100 – 100mA IPK Peak Switch Current Limit VFB < VFBREG, Duty Cycle < 35% IS100 Input DC Bias Current–Reg SW100B Only Burst Mode Operation (Sleep) VFB = 0.9V, ILOAD = 0A, 2.25MHz RPFET RDS(ON) of P-Channel FET (Note 7) RNFET RDS(ON) of N-Channel FET (Note 7) 200 300 400 mA 32 μA ISW = 100mA 0.80 Ω ISW = –100mA 0.75 Ω Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3544E is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. 3544fa 3 LTC3544 ELECTRICAL CHARACTERISTICS Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD)(68°C/W). Note 4: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 5: The LTC3544 is tested in a proprietary test mode that connects VFB to the output of the error amplifier. Note 6: Load regulation is inferred by measuring the regulation loop gain. Note 7: The QFN switch on-resistance is guaranteed by correlation to wafer level measurements. Note 8: Guaranteed by long-term current density limitations. TYPICAL PERFORMANCE CHARACTERISTICS VREF vs Temperature at 2.25V, 3.6V, 5.5V ILOAD CHANNEL 100 = 50mA ALL CHANNELS OPERATING VREF (V) 0805 0.800 0.795 VIN = 2.25V VIN = 3.6V VIN = 5.5V 0.790 0.785 –50 0 50 TEMPERATURE (°C) 100 90 80 70 2.5 EFFICIENCY (%) 0.810 100 3.0 CHANNEL 200A ILOAD = 100mA ALL CHANNELS OPERATING SWITCHING FREQUENCY (MHz) 0.815 Efficiency vs Load Current 300mA Channel. All Other Channels at 50% Peak Current Switching Frequency vs Supply Voltage and Temperature 2.0 60 50 40 30 fOSC –40°C fOSC 0°C fOSC 25°C fOSC 80°C 20 10 1.5 2 5 3 4 SUPPLY VOLTAGE (V) 3544 G01 6 0 0.0001 Burst Mode Operation 200mA, A-B Channels Burst Mode Operation 100mA Channel VOUT200B 50mV/DIV AC COUPLED VOUT100 50mV/DIV AC COUPLED SW300 5V/DIV SW2B 5V/DIV SW100 5V/DIV IL 50mA/DIV IL 50mA/DIV VIN = 3.6V VOUT = 1.8V 3544 G04 VIN = 3.6V VOUT = 1.5V 2μs/DIV TA = 25°C ILOAD = 15mA 1 3544B G03 VOUT300 50mV/DIV AC COUPLED 2μs/DIV TA = 25°C ILOAD = 20mA 0.001 0.01 0.1 LOAD CURRENT 300mA CHANNEL (A) 3544 G02 Burst Mode Operation 300mA Channel IL 100mA/DIV VIN = 3.6V TA = 25°C VOUT100 = 1.2V VOUT200A = 0.8V VOUT200B = 1.5V VOUT300 = 1.8V ALL OTHER CHANNELS LOADED 50% 3544 G05 VIN = 3.6V VOUT = 1.2V 2μs/DIV TA = 25°C ILOAD = 12mA 3544 G06 3544fa 4 LTC3544 TYPICAL PERFORMANCE CHARACTERISTICS Efficiency vs Load Current 200mA Channel A. All Other Channels Off 100 90 90 80 80 70 70 60 50 40 30 100 VIN = 2.25V VIN = 3.6V VIN = 4.2V 90 80 70 60 50 40 10 0 0.0001 VIN = 2.25V VIN = 3.6V VIN = 4.2V VOUT = 1.8V TA = 25°C ALL OTHER CHANNELS OFF 0.01 0.1 0.001 LOAD CURRENT (A) 20 0 0.0001 40 10 0.01 0.1 0.001 LOAD CURRENT (A) 3544 G07 1 0 0.0001 VIN = 2.25V VIN = 3.6V VIN = 4.2V VOUT = 1.5V TA = 25°C ALL OTHER CHANNELS OFF 0.001 0.01 0.1 LOAD CURRENT (A) 1 3544 G09 3544 G08 Start-Up Curves All Channels Load Regulation All Channels Efficiency vs Load Current 100mA Channel. All Other Channels Off 1.2 100 90 100mA = 1.2V 200mA (A) = 0.8V 200mA (B) = 1.5V 300mA = 1.8V 1.0 80 VOUT ERROR (%) 70 EFFICIENCY (%) 50 20 VOUT = 0.8V TA = 25°C ALL OTHER CHANNELS OFF 10 1 60 30 30 20 Efficiency vs Load Current 200mA Channel B. All Other Channels Off EFFICIENCY (%) 100 EFFICIENCY (%) EFFICIENCY (%) Efficiency vs Load Current 300mA Channel. All Other Channels Off 60 50 40 30 0.8 VIN = 3.6V TA = 25°C VOUT100 VOUT200A VOUT200B 0.6 VOUT300 Burst Mode OPERATION RIPPLE 0.4 RUNx 0.2 20 10 0 0.0001 VIN = 2.25V VIN = 3.6V VIN = 4.2V VOUT = 1.2V TA = 25°C ALL OTHER CHANNELS OFF 0.001 0.01 0.1 LOAD CURRENT (A) 0 VIN = 3.6V 200μs/DIV TA = 25°C ALL CHANNELS UNLOADED –0.2 1 0 100 200 300 400 LOAD (mA) 3544 G10 3544 G11 Load Step Response 200mA Channel A Load Step Response 300mA Channel Load Step Response 200mA Channel B VOUT300 100mV/DIV AC COUPLED VOUT200A 50mV/DIV AC COUPLED VOUT200B 50mV/DIV AC COUPLED IL 250mA/DIV IL 250mA/DIV IL 250mA/DIV ILOAD 250mA/DIV ILOAD 250mA/DIV ILOAD 250mA/DIV VIN = 3.6V 20μs/DIV VOUT = 1.8V TA = 25°C ILOAD = 600μA TO 300mA 3544 G12 3544 G13 VIN = 3.6V 20μs/DIV VOUT = 0.8V TA = 25°C ILOAD = 600μA TO 200mA 3544 G14 VIN = 3.6V 20μs/DIV VOUT = 1.5V TA = 25°C ILOAD = 600μA TO 200mA 3544 G15 3544fa 5 LTC3544 TYPICAL PERFORMANCE CHARACTERISTICS Load Step Response 100mA Channel Load Step Crosstalk VOUT100 50mV/DIV AC COUPLED VOUT100 1mV/DIV VOUT200A 1mV/DIV IL 100mA/DIV VOUT200B 1mV/DIV VOUT300 50mV/DIV ILOAD 100mA/DIV 3544 G17 VIN = 3.6V 40μs/DIV TA = 25°C 300mA LOAD STEP ON VOUT300 OTHER CHANNELS LOADED 50% OF MAXIMUM 3544 G16 VIN = 3.6V 20μs/DIV VOUT = 1.2V TA = 25°C ILOAD = 400μA TO 100mA PFET RDS(ON) vs Supply Voltage 1.2 NFET RDS(ON) vs Supply Voltage 1.0 TA = 25°C 1.0 0.8 0.7 RDS(ON) (Ω) 0.8 RDS(ON) (Ω) TA = 25°C 0.9 0.6 0.4 0.6 0.5 0.4 0.3 300 200B 200A 100 0.2 0 2 2.5 3 3.5 4.5 4 VIN (V) 5 5.5 300 200B 200A 100 0.2 0.1 0 6 2 3 4 VIN (V) 3544 G16 3544 G17 NFET RDS(ON) vs Temperature PFET RDS(ON) vs Temperature 1.0 1.0 VIN = 3.6V 0.9 0.8 0.8 0.7 0.7 RDS(ON) (Ω) RDS(ON) (Ω) 0.9 0.6 0.5 0.4 0.3 VIN = 3.6V 0.6 0.5 0.4 0.3 300 200B 200A 100 0.2 0.1 0 –50 –30 –10 10 30 50 TEMPERATURE (°C) 6 5 70 90 3544 G18 300 200B 200A 100 0.2 0.1 0 –50 50 0 TEMPERATURE (°C) 100 3544 G19 3544fa 6 LTC3544 PIN FUNCTIONS VFB200B (Pin 1): 200mA Regulator B Feedback Pin. This pin receives the feedback voltage from an external resistive divider across the output. RUN300 (Pin 9): 300mA Regulator Enable Pin. Forcing this pin to VIN enables the 300mA regulator, while forcing it to GND causes the regulator to shut off. VFB200A (Pin 2): 200mA Regulator A Feedback Pin. This pin receives the feedback voltage from an external resistive divider across the output. VFB300 (Pin 10): 300mA Regulator Feedback Pin. This pin receives the feedback voltage from an external resistive divider across the output. RUN200A (Pin 3): 200mA Regulator A Enable Pin. Forcing this pin to VIN enables the 200mA regulator (channel A), while forcing it to GND causes the regulator to shut off. VFB100 (Pin 11): 100mA Regulator Feedback Pin. This pin receives the feedback voltage from an external resistive divider across the output. SW200B (Pin 4): Switch Node Connection to Inductor for 200mA Regulator B. This pin connects to the drains of the internal power MOSFET switches. RUN100 (Pin 12): 100mA Regulator Enable Pin. Forcing this pin to VIN enables the 100mA regulator, while forcing it to GND causes the 100mA regulator to shut off. SW200A (Pin 5): Switch Node Connection to Inductor for 200mA Regulator A. This pin connects to the drains of the internal power MOSFET switches. SW100 (Pin 13): Switch Node Connection to Inductor for 100mA Regulator. This pin connects to the drains of the internal power MOSFET switches. PGND (Pin 6): Power Path Return Pin for Both 200mA Regulators and the 300mA Regulator. GNDA (Pin 14): Ground Pin for Internal Reference and Control Circuitry. Power path return for the 100mA regulator. PVIN (Pin 7): Power Path Supply Pin for Both 200mA Regulators and the 300mA Regulator. This pin must be closely decoupled to PGND, with a 4.7μF or greater ceramic capacitor. VCC (Pin 15): Supply Pin for Internal Reference and Control Circuitry. Power path supply pin for the 100mA regulator. SW300 (Pin 8): Switch Node Connection to Inductor for 300mA Regulator. This pin connects to the drains of the internal power MOSFET switches. RUN200B (Pin 16): 200mA Regulator B Enable Pin. Forcing this pin to VIN enables the 200mA regulator (channel B), while forcing it to GND causes the regulator to shut off. Exposed Pad (Pin 17): Ground. Must be soldered to PCB. 3544fa 7 LTC3544 FUNCTIONAL DIAGRAMS 3 9 RUN200A 15 RUN300 14 16 GNDA VCC 12 RUN200B RUN100 SHDN 0.8V REF OSC RUN LOGIC SW200A 5 SW100 IBIAS200A POWER FETs POWER FETs VFB200A 2 VFB100 REG200A REG100 SW200B SW300 8 11 4 IBIAS200B IBIAS300 POWER FETs POWER FETs 10 13 IBIAS100 VFB200B VFB300 REG300 PVIN REG200B PGND 7 6 1 3544 FD01 REGULATOR BURST CLAMP 3 PVIN SLOPE COMP VFBx – – 1 EA 0.8V SLEEP ITH VSLEEP + – + 10Ω ICOMP + BURST S Q RS LATCH R Q SOFT-START SWITCHING LOGIC AND BLANKING CIRCUIT ANTI SHOOTTHRU 4 SWx + IRCMP – SHUTDOWN 5 PGND 3544 FD02 0.8V VREF OSC OSC 3544fa 8 LTC3544 OPERATION (Refer to Functional Diagrams) The LTC3544 uses a constant-frequency current mode architecture. The operating frequency is set at 2.25MHz. All channels share the same clock and run in-phase. The output voltage for each regulator is set by an external resistor divider returned to the VFB pin. An error amplifier compares the divided output voltage with a reference voltage of 0.8V and regulates the peak inductor current accordingly. VOUT100 VOUT200A VOUT200B VOUT300 RUNx VIN = 3.6V 200μs/DIV TA = 25°C ALL CHANNELS UNLOADED Main Control Loop During normal operation, the top power switch (P-channel MOSFET) is turned on at the beginning of a clock cycle when the VFB voltage is below the reference voltage. The current into the inductor and the load increases until the peak inductor current (controlled by ITH) is reached. The RS latch turns off the top switch, turns on the bottom switch, and energy stored in the inductor is discharged through the bottom switch (N-channel MOSFET) into the load until the next clock cycle begins, or until the inductor current begins to reverse (sensed by the IRCMP comparator). The peak inductor current is controlled by the internally compensated ITH voltage, which is the output of the error amplifier. This amplifier regulates the VFB pin to the internal 0.8V reference by adjusting the peak inductor current accordingly. Burst Mode Operation To optimize efficiency, the LTC3544 automatically switches from continuous operation to Burst Mode operation when the load current is relatively light. During Burst Mode operation, the peak inductor current (as set by ITH) remains fixed at a low level and the PMOS switch operates intermittently based on load demand. By running cycles periodically, the switching losses are minimized. The duration of each burst event can range from a few cycles at light load to almost continuous cycling with short sleep intervals at moderate loads. During the sleep intervals, the load current is being supplied solely from the output capacitor. As the output voltage droops, the error amplifier output rises above the sleep threshold, signaling the burst comparator to trip and turn the top MOSFET on. This cycle repeats at a rate that is dependent on load demand. 3544 G12 Figure 1. Regulator Soft-Start Soft-Start Soft-start reduces surge currents on VIN and output overshoot during start-up. Soft-start on the LTC3544 is implemented by internally ramping the reference signal fed to the error amplifier over approximately a 1ms period. Figure 1 shows the behavior of the four regulator channels during soft-start. Short-Circuit Protection Short-circuit protection is achieved by monitoring the inductor current. When the current exceeds a predetermined level, the main switch is turned off, and the synchronous switch is turned on long enough to allow the current in the inductor to decay below the fault threshold. This prevents a catastrophic inductor current, run-away condition, but will still provide current to the output. Output voltage regulation in this condition is not achieved. DROPOUT OPERATION As the input supply voltage decreases to a value approaching the output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply voltage forces the main switch to remain on for more than one cycle until it reaches 100% duty cycle. The output voltage will then be determined by the input voltage minus the voltage drop across the P-channel MOSFET and the inductor. An important detail to remember is that at low input supply voltages, the RDS(ON) of the P-channel switch increases (see Typical Performance Characteristics). Therefore, the user should calculate the power dissipation when the LTC3544 is used at 100% duty cycle with low input voltage (see Thermal Considerations in the Applications Information section). 3544fa 9 LTC3544 APPLICATIONS INFORMATION The basic LTC3544 application circuit is shown on the first page of this data sheet. External component selection is driven by the load requirement and begins with the selection of L followed by CIN and COUT. Table 1. Representative Surface Mount Inductors Value (μH) DCR (Ω MAX) MAX DC CURRENT (A) Sumida CDH2D09B 10 6.4 4.7 3.3 0.47 0.32 0.218 0.15 0.48 0.6 0.7 0.85 3.0 × 2.8 × 1.0 Wurth TPC744029 10 6.8 4.7 3.3 0.50 0.38 0.210 0.155 0.50 0.65 0.80 0.95 2.8 × 2.8 × 1.35 TDK VLF3010AT 10 6.8 4.7 3.3 0.67 0.39 0.28 0.17 0.49 0.61 0.70 0.87 2.8 × 2.6 × 1.0 Part Number Inductor Selection For most applications, the value of the inductor will fall in the range of 1μH to 10μH. Its value is chosen based on the desired ripple current. Large inductor values lower ripple current and small inductor values result in higher ripple currents. Higher VIN or VOUT also increases the ripple current as shown in Equation 1. A reasonable starting point for setting ripple current for the 300mA regulator is ΔIL = 120mA (40% of 300mA). ΔIL = ⎛ V ⎞ VOUT ⎜ 1 – OUT ⎟ VIN ⎠ ( ƒ )(L ) ⎝ 1 (1) The DC current rating of the inductor should be at least equal to the maximum load current plus half the ripple current to prevent core saturation. Thus, a 360mA rated inductor should be enough for most applications (300mA + 60mA). For better efficiency, choose a low DCR inductor. Inductor Core Selection Different core materials and shapes will change the size/current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don’t radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. The choice of which style inductor to use often depends more on the price vs. size requirements and any radiated field/EMI requirements than on what the LTC3544 requires to operate. Table 1 shows typical surface mount inductors that work well in LTC3544 applications. W × L × H (mm3) CIN and COUT Selection In continuous mode, a worst-case estimate for the input current ripple can be determined by assuming that the source current of the top MOSFET is a square wave of duty cycle VOUT/VIN, and amplitude IOUT(MAX). To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: IRMS ≅ IOUT(MAX ) VOUT ( VIN – VOUT ) VIN This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design. Note that the capacitor manufacturer’s ripple current ratings are often based on 2000 hours of life (non-ceramic capacitors). This makes it advisable to further de-rate the capacitor, or choose a capacitor rated at a higher temperature than required. Always consult the manufacturer if there is any question. The selection of COUT is driven by the required effective series resistance (ESR). Typically, once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. The output ripple ΔVOUT is determined by: ⎛ ⎞ 1 ΔVOUT ≅ ΔIL ⎜ ESR + 8 • ƒ • COUT ⎟⎠ ⎝ where f = operating frequency, COUT = output capacitance and ΔIL = ripple current in the inductor. For a fixed output 3544fa 10 LTC3544 APPLICATIONS INFORMATION voltage, the output ripple is highest at maximum input voltage since ΔIL increases with input voltage. Using Ceramic Input and Output Capacitors Higher value, lower cost, ceramic capacitors are now widely available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. Because the LTC3544’s control loop does not depend on the output capacitor’s ESR for stable operation, ceramic capacitors can be used freely to achieve very low output ripple and small circuit size. However, care must be taken when ceramic capacitors are used at the input and the output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN, large enough to damage the part. When choosing the input and output ceramic capacitors, choose the X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size. Output Voltage Programming The output voltage is set by tying VFB to a resistive divider according to the following formula: ⎛ R2 ⎞ VOUT = 0.8 V ⎜ 1+ ⎟ ⎝ R1⎠ The external resistive divider is connected to the output allowing remote voltage sensing as shown in Figure 2. 0.8V ≤ VOUT ≤ 5.5V R2 CF VFB R1 LTC3544 GND 3544 F02 Figure 2. Setting the LTC3544 Output Voltage Keeping the current in the resistors small maximizes the efficiency, but making them too small may allow stray capacitance to cause noise problems or reduce the phase margin of the control loop. It is recommended that the total feedback resistor string be kept to under 100k. To improve the frequency response of the control loop, a feed forward capacitor, CF, may be used. Great care should be taken to route the feedback line away from noise sources such as the inductor of the SW line. Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses in LTC3544 circuits: VIN quiescent current and I2R losses. VIN quiescent current loss dominates the efficiency loss at low load currents, whereas the I2R loss dominates the efficiency loss at medium to high load currents. 1. The quiescent current is due to two components: the DC bias current as given in the electrical characteristics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low to high again, a packet of charge, dQ, moves from PVIN to ground. The resulting dQ/dt is the current out of PVIN that is typically larger than the DC bias current and proportional to frequency. Both the DC bias and gate charge losses are proportional to PVIN and thus their effects will be more pronounced at higher supply voltages. 2. I2R losses are calculated from the resistances of the internal switches, RSW, and external inductor RL. In continuous mode, the average output current flowing through inductor L is “chopped” between the main switch and the synchronous switch. Thus, the series resistance looking into the SW pin is a function of both 3544fa 11 LTC3544 APPLICATIONS INFORMATION top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. Other losses when in switching operation, including CIN and COUT ESR dissipative losses and inductor core losses, generally account for less than 2% total additional loss. Thermal Considerations The LTC3544 requires the package backplane metal to be well soldered to the PC board. This gives the QFN package exceptional thermal properties, making it difficult in normal operation to exceed the maximum junction temperature of the part. In most applications the LTC3544 does not dissipate much heat due to its high efficiency. In applications where the LTC3544 is running at high ambient temperature with low supply voltage and high duty cycles, such as in dropout, the heat dissipated may exceed the maximum junction temperature of the part if it is not well thermally grounded. If the junction temperature reaches approximately 150°C, the power switches will be turned off and the SW nodes will become high impedance. To avoid the LTC3544 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise is given by: TR = PD • θJA where PD is the power dissipated by the regulator and θJA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, TJ, is given by: TJ = TA + TR where TA is the ambient temperature. As an example, consider the LTC3544 in dropout at an input voltage of 2.5V, a total load current (all four regulators) of 800mA and an ambient temperature of 85°C. From the Typical Performance graphs of switch resistance, the RDS(ON) of the 300mA P-channel switch at 85°C can be estimated as 0.67Ω. Therefore, power dissipated by the 300mA channel is: PD = ILOAD2 • RDS(ON) = 60mW Similar analysis on the other channels gives a total power dissipation of 138mW. For the 3mm × 3mm QFN package, the θJA is 68°C/W. Thus, the junction temperature of the regulator is: TJ = 85°C + (0.138)(68) = 94.4°C which is well below the maximum junction temperature of 125°C. Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance RDS(ON). Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to (ΔILOAD • ESR), where ESR is the effective series resistance of COUT. ΔILOAD also begins to charge or discharge COUT, which generates a feedback error signal. The regulator loop then acts to return VOUT to its steady-state value. During this recovery time VOUT can be monitored for overshoot or ringing that would indicate a stability problem. For a detailed explanation of switching control loop theory, see Application Note 76. A second, more severe transient is caused by switching in loads with large (>1μF) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25 • CLOAD). Thus, a 10μF capacitor charging to 3.3V would require a 250μs rise time, limiting the charging current to about 130mA. 3544fa 12 LTC3544 APPLICATIONS INFORMATION PC Board Layout Checklist 3. Keep C8 and C9 as close to the part as possible. When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3544. These items are also illustrated graphically in Figures 3 and 4. Check the following in your layout: 4. Keep the switching nodes (SWx) away from the sensitive VFBx nodes. 5. Keep the ground connected plates of the input and output capacitors as close as possible. 1. The power traces, consisting of the PGND trace, the GNDA trace, the SW traces, the PVIN trace and the VCC trace should be kept short, direct and wide. 6. Care should be taken to provide enough space between unshielded inductors in order to minimize any transformer coupling. 2. Does each of the VFBx pins connect directly to the respective feedback resistors? The resistive dividers must be connected between the (+) plate of the corresponding output filter capacitor (e.g., C13) and GNDA. If the circuit being powered is at such a distance from the part where voltage drops along circuit traces are large, consider a Kelvin connection from the powered circuit back to the resistive dividers. VCC 2.25V TO 5.5V L4 Design Example As a design example, consider using the LTC3544 as a portable application with a Li-Ion battery. The battery provides VIN ranging from 2.8V to 4.2V. The demand at 2.5V is 250mA necessitating the use of the 300mA output for this requirement. GNDA C8 VOUT1 R15 C15 R16 RUN100 C13 SW1000 VCC GNDA VFB100 C1 VFB200A RUN100 VFB300 VFB100 C4 GND VFB200B VFB300 L1 L4 LTC3544 RUN200A L2 VOUT3 R5 RUN200A SW200A SW200A SW200B C6 SW200B C4 RUN300 RUN200B PGND PVIN RUN300 C9 SW300 C9 L2 L1 VFB200A R8 R2 PGND VOUT2 C3 C2 C3 C1 PVIN 2.25V TO 5.5V C12 L3 VOUT4 R6 L3 C10 VCC RUN200B SW300 PGND R3 VFB200B C10 3544 F04 3544 F03 R11 Figure 3. LTC3544 Layout Diagram Figure 4. LTC3544 Suggested Layout 3544fa 13 LTC3544 APPLICATIONS INFORMATION Beginning with this channel, first calculate the inductor value for about 35% ripple current (100mA in this example) at maximum VIN. Using a form of Equation 1: L4 = 200k are a good compromise between efficiency and immunity to any adverse effects of PCB parasitic capacitance on the feedback pins. Choosing 10μA with 0.8V feedback voltage makes R7 = 80k. A close standard 1% resistor is 76.8k. Using: 2.5V ⎛ 2.5V ⎞ 1– = 4.5µH 2.25MHz • 100mA ⎜⎝ 4.2V ⎟⎠ ⎛V ⎞ R8 = ⎜ OUT – 1⎟ • R7 = 163.2k ⎝ 0.8 ⎠ For the inductor, use the closest standard value of 4.7μH. A 4.7μF capacitor should be sufficient for the output capacitor. A larger output capacitor will attenuate the load transient response, but increase the settling time. A value for CIN = 4.7μF should suffice as the source impedance of a Li-Ion battery is very low. The closest standard 1% resistor is 162k. An optional 20pF feedback capacitor may be used to improve transient response. The component values for the other channels are chosen in a similar fashion. The feedback resistors program the output voltage. Minimizing the current in these resistors will maximize efficiency at very light loads, but totals on the order of Figure 5 shows the complete schematic for this example, along with the efficiency curve and transient response for the 300mA channel. VSUPPLY 3.6V C10 4.7μF C9 4.7μF 15 L2 4.7μH VOUT2 1.5V C2 4.7μF VOUT3 0.8V R3 93.1k 16 4 C6 20pF 1 7 PVIN SW200B RUN100 SW100 VFB200B R4 107k VFB100 12 13 L1 10μH C5 20pF 11 3 5 R6 100k 2 RUN200A RUN300 SW200A SW300 VFB200A VFB300 GNDA 14 VOUT1 1.2V R1 59k C1 4.7μF R2 118k LTC3544 L3 4.7μH C3 4.7μF RUN200B VCC 9 8 10 PGND L4 4.7μH C8 20pF VOUT2 2.5V R7 162k C4 10μF R8 76.8k 6 3544 F05a Figure 5. Design Example Efficiency vs Output Current—300mA Channel, All Other Channels Off Transient Response 100 90 VOUT300 50mV/DIV AC COUPLED 80 EFFICIENCY (%) 70 60 IL 250mA/DIV 50 40 ILOAD 250mA/DIV 30 20 10 VOUT = 2.5V TA = 25°C 0 0.0001 VIN = 2.7V VIN = 3.6V VIN = 4.2V 0.001 0.01 0.1 LOAD CURRENT (A) 1 VIN = 3.6V 20μs/DIV VOUT = 2.5V TA = 25°C LOAD STEP = 300μA TO 300mA 3544B F05c 3544B F05b 3544fa 14 LTC3544 PACKAGE DESCRIPTION UD Package 16-Lead Plastic QFN (3mm × 3mm) (Reference LTC DWG # 05-08-1691) 0.70 ±0.05 3.50 ± 0.05 1.45 ± 0.05 2.10 ± 0.05 (4 SIDES) PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 3.00 ± 0.10 (4 SIDES) BOTTOM VIEW—EXPOSED PAD PIN 1 NOTCH R = 0.20 TYP OR 0.25 × 45° CHAMFER R = 0.115 TYP 0.75 ± 0.05 15 16 PIN 1 TOP MARK (NOTE 6) 0.40 ± 0.10 1 1.45 ± 0.10 (4-SIDES) 2 (UD16) QFN 0904 0.200 REF 0.00 – 0.05 NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.25 ± 0.05 0.50 BSC 3544fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC3544 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC3405/LTC3405A 300mA IOUT, 1.5MHz, Synchronous Step-Down DC/DC Converters 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 20μA, ISD < 1μA, ThinSOTTM Package LTC3406/LTC3406B 600mA IOUT, 1.5MHz, Synchronous Step-Down DC/DC Converters 96% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 20μA, ISD < 1μA, ThinSOT Package LTC3407/LTC3407-2 Dual 600mA/800mA IOUT, 1.5MHz/2.25MHz, Synchronous Step-Down DC/DC Converters 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40μA, ISD < 1μA, 10-Lead MSE, DFN Packages LTC3409 600mA IOUT, 1.7MHz/2.6MHz, Synchronous Step-Down DC/DC Converter 96% Efficiency, VIN: 1.6V to 5.5V, VOUT(MIN) = 0.6V, IQ = 65μA, ISD < 1μA, DFN Package LTC3410/LTC3410B 300mA IOUT, 2.25MHz, Synchronous Step-Down DC/DC Converters 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 26μA, ISD < 1μA, SC70 Package LTC3411 1.25A IOUT, 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60μA, ISD < 1μA, 10-Lead MSE, DFN Packages LTC3412 2.5A IOUT, 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60μA, ISD < 1μA, 16-Lead TSSOPE Package LTC3441/LTC3442 LTC3443 1.2A IOUT, 2MHz, Synchronous Buck-Boost DC/DC Converters 95% Efficiency, VIN: 2.4V to 5.5V, VOUT(MIN): 2.4V to 5.25V, IQ = 50μA, ISD < 1μA, DFN Package LTC3446 Monolithic Synchronous Buck Regulator with Dual VLDOTM Requlators 92% Efficiency, VIN: 2.7V to 5.5V, VOUT(MIN) = 0.4V, IQ = 140μA, ISD < 1μA, 3mm × 4mm DFN Package LTC3531/LTC3531-3 LTC3531-3.3 200mA IOUT, 1.5MHz, Synchronous Buck-Boost DC/DC Converters 95% Efficiency, VIN: 1.8V to 5.5V, VOUT(MIN): 2V to 5V, IQ = 16μA, ISD < 1μA, ThinSOT, DFN Packages LTC3532 500mA IOUT, 2MHz, Synchronous Buck-Boost DC/DC Converter 95% Efficiency, VIN: 2.4V to 5.5V, VOUT(MIN): 2.4V to 5.25V, IQ = 35μA, ISD < 1μA, 10-Lead MSE, DFN Packages LTC3544B 300mA, 2 × 200mA, 100mA Quad 2.25MHz Synchronous Buck DC/DC Converter 95% Efficiency, VIN: 2.25V to 5.5V, VOUT(MIN) = 0.8V, IQ = 825μA, ISD < 1mA, 3mm × 3mm QFN Package LTC3547/LTC3547B Dual 300mA IOUT, 2.25MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40μA, ISD < 1μA, 8-Lead DFN Package LTC3548/LTC3548-1 LTC3548-2 Dual 400mA/800mA IOUT, 2.25MHz, Synchronous Step-Down DC/DC Converters 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40μA, ISD < 1μA, 10-Lead MSE, DFN Packages LTC3561 1.25A IOUT, 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 240μA, ISD < 1μA, DFN Package ThinSOT and VLDO are trademarks of Linear Technology Corporation 3544fa 16 Linear Technology Corporation LT 0308 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2007