LTM4602HV 6A, 28VIN High Efficiency DC/DC µModule DESCRIPTIO U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Complete Switch Mode Power Supply Wide Input Voltage Range: 4.5V to 28V 6A DC, Typical 8A Peak Output Current 0.6V to 5V Output Voltage 1.5% Output Voltage Regulation Ultrafast Transient Response Parallel µModule™ DC/DC Converters Current Mode Control Pin Compatible with the LTM4600 and LTM4602 Up to 92% Efficiency Programmable Soft-Start Output Overvoltage Protection Optional Short-Circuit Shutdown Timer Pb-Free (e4) RoHS Compliant Package with Gold-Pad Finish Small Footprint, Low Profile (15mm × 15mm × 2.8mm) LGA Package The LTM®4602HV is a complete 6A, DC/DC step down power supply with up to 28V input operation. Included in the package are the switching controller, power FETs, inductor, and all support components. Operating over an input voltage range of 4.5V to 28V, the LTM4602HV supports an output voltage range of 0.6V to 5V, set by a single resistor. This high efficiency design delivers 6A continuous current (8A peak), needing no heat sinks or airflow to meet power specifications. Only bulk input and output capacitors are needed to finish the design. Telecom and Networking Equipment Servers Industrial Equipment Point of Load Regulation The LTM4602HV is packaged in a thermally enhanced, compact (15mm × 15mm) and low profile (2.8mm) over-molded Land Grid Array (LGA) package suitable for automated assembly by standard surface mount equipment. For the 4.5V to 20V input range version, refer to the LTM4602. U APPLICATIO S ■ ■ ■ ■ , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. µModule is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5481178, 6100678, 6580258, 5847554, 6304066. U TYPICAL APPLICATIO The low profile package (2.8mm) enables utilization of unused space on the bottom of PC boards for high density point of load regulation. High switching frequency and an adaptive on-time current mode architecture enables a very fast transient response to line and load changes without sacrificing stability. Fault protection features include integrated overvoltage and short circuit protection with a defeatable shutdown timer. A built-in soft-start timer is adjustable with a small capacitor. Efficiency vs Load Current with 24VIN (FCB = 0) 90 80 70 6A µModule Power Supply with 4.5V to 28V Input VIN 4.5V TO 28V ABS MAX VIN CIN VOUT 2.5V 6A VOUT LTM4602HV VOSET PGND SGND COUT 31.6k EFFICIENCY (%) ■ 60 50 40 1.2VOUT 1.5VOUT 1.8VOUT 2.5VOUT 3.3VOUT 3.3VOUT (1MHz) 30 20 10 4602HV TA01a 0 0 1 2 3 4 LOAD CURRENT (A) 5 6 4602HV G03 4602hvf 1 LTM4602HV U W W W ABSOLUTE AXI U RATI GS U W U PACKAGE/ORDER I FOR ATIO (Note 1) TOP VIEW fADJ SVIN EXTVCC VOSET FCB, EXTVCC, PGOOD, RUN/SS, VOUT .......... –0.3V to 6V VIN, SVIN, fADJ ............................................ –0.3V to 28V VOSET, COMP ............................................. –0.3V to 2.7V Operating Temperature Range (Note 2) ... –40°C to 85°C Junction Temperature ........................................... 125°C Storage Temperature Range................... –55°C to 125°C COMP SGND RUN/SS FCB VIN PGOOD PGND VOUT LGA PACKAGE 104-LEAD (15mm × 15mm × 2.8mm) TJMAX = 125°C, θJA = 15°C/W, θJC = 6°C/W, θJA DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS WEIGHT = 1.7g ORDER PART NUMBER LGA PART MARKING* LTM4602HVEV#PBF LTM4602HVIV#PBF LTM4602HVV LTM4602HVV Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the –40°C to 85°C temperature range, otherwise specifications are at TA = 25°C, VIN = 12V. External CIN = 120µF, COUT = 200µF/Ceramic per typical application (front page) configuration. SYMBOL VIN(DC) PARAMETER Input DC Voltage CONDITIONS AbsMax 28V for Tolerance on 24V Inputs VOUT(DC) Output Voltage FCB = 0V VIN = 5V or 12V, VOUT = 1.5V, IOUT = 0A MIN 4.5 TYP ● MAX 28 UNITS V ● 1.478 1.470 1.50 1.50 1.522 1.530 V V 3.4 4 V Input Specifications VIN(UVLO) Under Voltage Lockout Threshold IOUT = 0A IINRUSH(VIN) Input Inrush Current at Startup IOUT = 0A, VOUT = 1.5V, FCB = 0 VIN = 5V VIN = 12V VIN = 24V IOUT = 0A, EXTVCC Open VIN = 12V, VOUT = 1.5V, FCB = 5V VIN = 12V, VOUT = 1.5V, FCB = 0V VIN = 24V, VOUT = 2.5V, FCB = 5V VIN = 24V, VOUT = 2.5V, FCB = 0V Shutdown, RUN = 0.8V, VIN = 12V IQ(VIN) Input Supply Bias Current Min On Time Min Off Time IS(VIN) Input Supply Current VIN = 12V, VOUT = 1.5V, IOUT = 6A VIN = 12V, VOUT = 3.3V, IOUT = 6A VIN = 5V, VOUT = 1.5V, IOUT = 6A VIN = 24V to 3.3V at 6A, EXTVCC = 5V 0.6 0.7 0.8 A A A 1.2 42 1.8 36 50 100 mA mA mA mA µA ns 100 400 ns 0.88 1.50 2.08 0.98 A A A A 4602hvf 2 LTM4602HV ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the –40°C to 85°C temperature range, otherwise specifications are at TA = 25°C, VIN = 12V. Per typical application (front page) configuration. SYMBOL PARAMETER Output Specifications IOUTDC ΔVOUT(LINE) VOUT ΔVOUT(0A-6A) CONDITIONS MIN Output Continuous Current Range VIN = 12V, VOUT = 1.5V (See Output Current Derating Curves for VIN = 24V, VOUT = 2.5V (Note 3) Different VIN, VOUT and TA) Line Regulation Accuracy VOUT = 1.5V. FCB = 0V, IOUT = 0A, VIN = 4.5V to 28V Load Regulation Accuracy VOUT VOUT = 1.5V. FCB = 0V, IOUT = 0A to 6A, VIN = 5V, VIN = 12V (Note 4) VOUT(AC) Output Ripple Voltage VIN = 12V, VOUT = 1.5V, FCB = 0V, IOUT = 0A fs Output Ripple Voltage Frequency tSTART Turn-On Time FCB = 0V, IOUT = 6A, VIN = 12V, VOUT = 1.5V VOUT = 1.5V, IOUT = 1A VIN = 12V VIN = 5V VOUT = 1.5V, Load Step: 0A/µs to 3A/µs COUT = 22µF 6.3V, 330µF 4V Pos Cap, See Table 2 Load: 10% to 90% to 10% of Full Load ΔVOUTLS Voltage Drop for Dynamic Load Step tSETTLE Settling Time for Dynamic Load Step VIN = 12V Output Current Limit IOUTPK TYP 0 0 UNITS 6 6 ● 0.15 ● ±0.25 ±0.5 10 Output Voltage in Foldback VIN = 24V, VOUT = 2.5V VIN = 12V, VOUT = 1.5V VIN = 5V, VOUT = 1.5V MAX A A % ±0.5 ±1 15 % % mVP-P 800 kHz 0.5 0.7 30 ms ms mV 25 µs 9 9 9 A A A Control Stage VOSET Voltage at VOSET Pin VRUN/SS RUN ON/OFF Threshold IRUN(C)/SS Soft-Start Charging Current IRUN(D)/SS Soft-Start Discharging Current VIN – SVIN IOUT = 0A, VOUT = 1.5V ● 0.591 0.594 0.8 0.6 0.6 1.5 0.609 0.606 2 V V V VRUN/SS = 0V –0.5 –1.2 –3 µA VRUN/SS = 4V 0.8 1.8 3 µA EXTVCC = 0V, FCB = 0V 100 mV EXTVCC = 5V, FCB = 0V, VOUT = 1.5V, IOUT = 0A 16 mA IEXTVCC Current into EXTVCC Pin RFBHI Resistor Between VOUT and FB Pins VFCB Forced Continuous Threshold IFCB Forced Continuous Pin Current VFCB = 0.6V ΔVOSETH PGOOD Upper Threshold VOSET Rising ΔVOSETL PGOOD Lower Threshold VOSET Falling ΔVOSET(HYS) PGOOD Hysteresis VOSET Returning VPGL PGOOD Low Voltage IPGOOD = 5mA 100 0.57 kΩ 0.6 0.63 V –1 –2 µA 7.5 10 12.5 % –7.5 –10 –12.5 PGOOD Output Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTM4602HVE is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 85°C % 2 0.15 % 0.4 V operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTM4602HVI is guaranteed and tested over the –40°C to 85°C temperature range. Note 3: Refer to current de-rating curves and thermal application note. Note 4: Test assumes current derating verses temperature. 4602hvf 3 LTM4602HV U W TYPICAL PERFOR A CE CHARACTERISTICS (See Figure 22 for all curves) Efficiency vs Load Current with 5VIN (FCB = 0) Efficiency vs Load Current with 24VIN (FCB = 0) Efficiency vs Load Current with 12VIN (FCB = 0) 90 90 80 80 80 70 70 0.8VOUT 1.2VOUT 1.5VOUT 1.8VOUT 2.5VOUT 3.3VOUT* *FOR 5V TO 3.3V CONVERSION, SEE FREQUENCY ADJUSTMENT IN APPLICATIONS INFORMATION 50 40 30 20 10 70 60 50 0.8VOUT 1.2VOUT 1.5VOUT 1.8VOUT 2.5VOUT 3.3VOUT 3.3VOUT (950kHz) 40 30 20 10 0 2 8 4 6 LOAD CURRENT (A) 2 0 4 6 LOAD CURRENT (A) 60 50 40 1.2VOUT 1.5VOUT 1.8VOUT 2.5VOUT 3.3VOUT 3.3VOUT (1MHz) 30 20 10 0 0 8 0 0 1 2 3 4 LOAD CURRENT (A) 4602HV G02 4602HV G01 Light Load Efficiency vs Load Current with 12VIN (FCB > 0.7V, <5V) 5 6 4602HV G03 Efficiency vs Load Current with Different FCB Settings 1.2V Transient Response 100 100 VIN = 12V 90 VOUT = 1.5V 90 VOUT 50mV/DIV FCB > 0.7V 80 80 70 EFFICIENCY (%) EFFICIENCY (%) EFFICIENCY (%) 60 EFFICIENCY (%) 100 90 EFFICIENCY (%) 100 60 50 40 30 1.2VOUT 1.5VOUT 1.8VOUT 2.5VOUT 3.3VOUT 20 10 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 LOAD CURRENT (A) 70 60 20µs/DIV 1.2V AT 3A/µs LOAD STEP COUT = 22µF, 6.3V CERAMIC 330µF, 4V SANYO POS CAP 50 40 4602HV G05 30 1 20 0.1 1 LOAD CURRENT (A) 4602HV G15 5 4602HV G04 1.8V Transient Response 1.5V Transient Response VOUT 50mV/DIV IOUT 2A/DIV 20µs/DIV 1.5V AT 3A/µs LOAD STEP COUT = 22µF, 6.3V CERAMIC 330µF, 4V SANYO POS CAP IOUT 2A/DIV FCB = GND 4602HV G06 2.5V Transient Response VOUT 50mV/DIV VOUT 50mV/DIV IOUT 2A/DIV IOUT 2A/DIV 20µs/DIV 1.8V AT 3A/µs LOAD STEP COUT = 22µF, 6.3V CERAMIC 330µF, 4V SANYO POS CAP 4602HV G07 20µs/DIV 2.5V AT 3A/µs LOAD STEP COUT = 22µF, 6.3V CERAMIC 330µF, 4V SANYO POS CAP 4602HV G08 4602hvf 4 LTM4602HV U W TYPICAL PERFOR A CE CHARACTERISTICS (See Figure 22 for all curves) VOUT 50mV/DIV VOUT 0.5V/DIV VOUT 0.5V/DIV IOUT 2A/DIV 20µs/DIV 3.3V AT 3A/µs LOAD STEP COUT = 22µF, 6.3V CERAMIC 330µF, 4V SANYO POS CAP Start-Up, IOUT = 6A (Resistive Load) Start-Up, IOUT = 0A 3.3V Transient Response 4602HV G09 IIN 0.5A/DIV IIN 0.5A/DIV 4602HV G11 500µs/DIV VIN = 12V VOUT = 1.5V COUT = 1 × 22µF, 6.3V X5R 330µF, 4V SANYO POS CAP NO EXTERNAL SOFT-START CAPACITOR 4602HV G10 200µs/DIV VIN = 12V VOUT = 1.5V COUT = 1 × 22µF, 6.3V X5R 330µF, 4V SANYO POS CAP NO EXTERNAL SOFT-START CAPACITOR Short-Circuit Protection, IOUT = 0A Short-Circuit Protection, IOUT = 6A VIN to VOUT Stepdown Ratio 5.5 fADJ = OPEN 5.0 VOUT 0.5V/DIV 5V 4.5 VOUT 0.5V/DIV 4.0 3.3V VOUT (V) 3.5 IIN 0.5A/DIV IIN 0.5A/DIV 3.0 2.5V 2.5 1.8V 2.0 4602HV G12 20µs/DIV VIN = 12V VOUT = 1.5V COUT = 1 × 22µF, 6.3V X5R 330µF, 4V SANYO POS CAP NO EXTERNAL SOFT-START CAPACITOR 4602HV G13 20µs/DIV VIN = 12V VOUT = 1.5V COUT = 1 × 22µF, 6.3V X5R 330µF, 4V SANYO POS CAP NO EXTERNAL SOFT-START CAPACITOR 1.5 1.5V 1.0 1.2V 0.5 0.6V 0 0 5 10 15 VIN (V) 20 25 28 SEE FREQUENCY ADJUSTMENT DISCUSSION FOR 12VIN TO 5VOUT AND 5VIN TO 3.3VOUT CONVERSION 4602HV G14 4602hvf 5 LTM4602HV U U U PI FU CTIO S (See Package Description for Pin Assignment) SGND (Pin D23): Signal Ground Pin. All small-signal components should connect to this ground, which in turn connects to PGND at one point. VIN (Bank 1): Power Input Pins. Apply input voltage between these pins and PGND pins. Recommend placing input decoupling capacitance directly between VIN pins and PGND pins. RUN/SS (Pin F23): Run and Soft-Start Control. Forcing this pin below 0.8V will shut down the power supply. Inside the power module, there is a 1000pF capacitor which provides approximately 0.7ms soft-start time with 200µF output capacitance. Additional soft-start time can be achieved by adding additional capacitance between the RUN/SS and SGND pins. The internal short-circuit latchoff can be disabled by adding a resistor between this pin and the VIN pin. This resistor must supply a minimum 5µA pull up current. fADJ (Pin A15): A 110k resistor from VIN to this pin sets the one-shot timer current, thereby setting the switching frequency. The LTM4602HV switching frequency is typically 850kHz. An external resistor to ground can be selected to reduce the one-shot timer current, thus lower the switching frequency to accommodate a higher duty cycle step down requirement. See the applications section. SVIN (Pin A17): Supply Pin for Internal PWM Controller. Leave this pin open or add additional decoupling capacitance. EXTVCC (Pin A19): External 5V supply pin for controller. If left open or grounded, the internal 5V linear regulator will power the controller and MOSFET drivers. For high input voltage applications, connecting this pin to an external 5V will reduce the power loss in the power module. The EXTVCC voltage should never be higher than VIN. FCB (Pin G23): Forced Continuous Input. Grounding this pin enables forced continuous mode operation regardless of load conditions. Tying this pin above 0.63V enables discontinuous conduction mode to achieve high efficiency operation at light loads. There is an internal 10k resistor between the FCB and SGND pins. VOSET (Pin A21): The Negative Input of The Error Amplifier. Internally, this pin is connected to VOUT with a 100k precision resistor. Different output voltages can be programmed with additional resistors between the VOSET and SGND pins. PGOOD (Pin J23): Output Voltage Power Good Indicator. When the output voltage is within 10% of the nominal voltage, the PGOOD is open drain output. Otherwise, this pin is pulled to ground. COMP (Pin B23): Current Control Threshold and Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. The voltage ranges from 0V to 2.4V with 0.8V corresponding to zero sense voltage (zero current). PGND (Bank 2): Power ground pins for both input and output returns. VOUT (Bank 3): Power Output Pins. Apply output load between these pins and PGND pins. Recommend placing High Frequency output decoupling capacitance directly between these pins and PGND pins. 5 6 7 VOSET 4 EXTVCC 3 SVIN 2 fADJ TOP VIEW 16 17 18 19 1 VIN BANK 1 9 10 8 13 14 C 22 E 23 25 26 27 28 29 30 31 33 34 35 36 37 38 24 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 1 3 2 5 4 7 6 9 8 11 10 13 12 15 14 17 16 B SGND F RUN/SS G 19 18 21 20 J COMP D H 32 VOUT BANK 3 A 15 12 PGND BANK 2 20 21 11 K FCB PGOOD L M N P R T 23 22 4600hv PN01 4602hvf 6 LTM4602HV W W SI PLIFIED BLOCK DIAGRA SVIN RUN/SS 1000pF CIN 1.5µF PGOOD VIN 4.5V TO 28V ABS MAX Q1 COMP INT COMP FCB COUT VIN 4.75k 110k VOUT 2.5V 6A MAX 15µF 6.3V CONTROLLER fADJ SGND PGND Q2 10Ω EXTVCC 100k 0.5% VOSET RSET 31.6k 4602HV F01 Figure 1. Simplified LTM4602HV Block Diagram U W U DECOUPLI G REQUIRE E TS TA = 25°C, VIN = 12V. Use Figure 1 configuration. SYMBOL PARAMETER CONDITIONS MIN CIN External Input Capacitor Requirement (VIN = 4.5V to 28V, VOUT = 2.5V) IOUT = 6A, 2x 10µF 35V Ceramic Taiyo Yuden GDK316BJ106ML 20 COUT External Output Capacitor Requirement (VIN = 4.5V to 28V, VOUT = 2.5V) IOUT = 6A, Refer to Table 2 in the Applications Information Section 100 TYP MAX UNITS µF 200 µF 4602hvf 7 LTM4602HV U OPERATIO µModule Description The LTM4602HV is a standalone non-isolated synchronous switching DC/DC power supply. It can deliver up to 6A of DC output current with only bulk external input and output capacitors. This module provides a precisely regulated output voltage programmable via one external resistor from 0.6VDC to 5.0VDC. The input voltage range is 4.5V to 28V. A simplified block diagram is shown in Figure 1 and the typical application schematic is shown in Figure 21. The LTM4602HV contains an integrated LTC constant on-time current-mode regulator, ultra-low RDS(ON) FETs with fast switching speed and integrated Schottky diode. The typical switching frequency is 800kHz at full load. With current mode control and internal feedback loop compensation, the LTM4602HV module has sufficient stability margins and good transient performance under a wide range of operating conditions and with a wide range of output capacitors, even all ceramic output capacitors (X5R or X7R). Current mode control provides cycle-by-cycle fast current limit. In addition, foldback current limiting is provided in an over-current condition while VFB drops. Also, the LTM4602HV has defeatable short circuit latch off. Internal overvoltage and undervoltage comparators pull the opendrain PGOOD output low if the output feedback voltage exits a ±10% window around the regulation point. Furthermore, in an overvoltage condition, internal top FET Q1 is turned off and bottom FET Q2 is turned on and held on until the overvoltage condition clears. Pulling the RUN/SS pin low forces the controller into its shutdown state, turning off both Q1 and Q2. Releasing the pin allows an internal 1.2µA current source to charge up the softstart capacitor. When this voltage reaches 1.5V, the controller turns on and begins switching. At low load current the module works in continuous current mode by default to achieve minimum output voltage ripple. It can be programmed to operate in discontinuous current mode for improved light load efficiency when the FCB pin is pulled up above 0.8V and no higher than 6V. The FCB pin has a 10k resistor to ground, so a resistor to VIN can set the voltage on the FCB pin. When EXTVCC pin is grounded or open, an integrated 5V linear regulator powers the controller and MOSFET gate drivers. If a minimum 4.7V external bias supply is applied on the EXTVCC pin, the internal regulator is turned off, and an internal switch connects EXTVCC to the gate driver voltage. This eliminates the linear regulator power loss with high input voltage, reducing the thermal stress on the controller. The maximum voltage on EXTVCC pin is 6V. The EXTVCC voltage should never be higher than the VIN voltage. Also EXTVCC must be sequenced after VIN. Recommended for 24V operation to lower temperature in the µModule. 4602hvf 8 LTM4602HV U U W U APPLICATIO S I FOR ATIO The typical LTM4602HV application circuit is shown in Figure 20. External component selection is primarily determined by the maximum load current and output voltage. Output Voltage Programming and Margining The PWM controller of the LTM4602HV has an internal 0.6V±1% reference voltage. As shown in the block diagram, a 100k/0.5% internal feedback resistor connects VOUT and FB pins. Adding a resistor RSET from VOSET pin to SGND pin programs the output voltage: VO = 0.6V • 100k + RSET RSET Table 1 RSET (kΩ) Open 100 66.5 49.9 43.2 31.6 22.1 13.7 VO (V) 0.6 1.2 1.5 1.8 2 2.5 3.3 5 Voltage margining is the dynamic adjustment of the output voltage to its worst case operating range in production testing to stress the load circuitry, verify control/protection functionality of the board and improve the system reliability. Figure 2 shows how to implement margining function with the LTM4602HV. In addition to the feedback resistor RSET, several external components are added. Turn off both transistor QUP and QDOWN to disable the margining. When QUP is on and QDOWN is off, the output VOUT RDOWN 100k QDOWN 2N7002 VOSET PGND SGND RSET RUP QUP 2N7002 4602HV F02 Figure 2 (RSET RUP )• VO •(1+ M%) = 0.6V (RSET RUP ) + 100kΩ RSET • VO •(1– M%) = 0.6V RSET + (100kΩ RDOWN) Input Capacitors Table 1 shows the standard values of 1% RSET resistor for typical output voltages: LTM4602HV voltage is margined up. The output voltage is margined down when QDOWN is on and QUP is off. If the output voltage VO needs to be margined up/down by ±M%, the resistor values of RUP and RDOWN can be calculated from the following equations: The LTM4602HV µModule should be connected to a low ac-impedance DC source. High frequency, low ESR input capacitors are required to be placed adjacent to the module. In Figure 20, the bulk input capacitor CIN is selected for its ability to handle the large RMS current into the converter. For a buck converter, the switching duty-cycle can be estimated as: D= VO VIN Without considering the inductor current ripple, the RMS current of the input capacitor can be estimated as: ICIN(RMS) = IO(MAX) • D •(1− D) η% In the above equation, η% is the estimated efficiency of the power module. C1 can be a switcher-rated electrolytic aluminum capacitor, OS-CON capacitor or high volume ceramic capacitors. Note the capacitor ripple current ratings are often based on only 2000 hours of life. This makes it advisable to properly derate the input capacitor, or choose a capacitor rated at a higher temperature than required. Always contact the capacitor manufacturer for derating requirements. In Figure 16, the input capacitors are used as high frequency input decoupling capacitors. In a typical 6A output application, 1-2 pieces of very low ESR X5R or X7R, 10µF ceramic capacitors are recommended. This decoupling capacitor should be placed directly adjacent the module input pins 4602hvf 9 LTM4602HV U W U U APPLICATIO S I FOR ATIO in the PCB layout to minimize the trace inductance and high frequency AC noise. Output Capacitors The LTM4602HV is designed for low output voltage ripple. The bulk output capacitor COUT is chosen with low enough effective series resistance (ESR) to meet the output voltage ripple and transient requirements. COUT can be low ESR tantalum capacitor, low ESR polymer capacitor or ceramic capacitor (X5R or X7R). The typical capacitance is 200µF if all ceramic output capacitors are used. The internally optimized loop compensation provides sufficient stability margin for all ceramic capacitors applications. Additional output filtering may be required by the system designer, if further reduction of output ripple or dynamic transient spike is required. Refer to Table 2 for an output capacitance matrix for each output voltage Droop, peak to peak deviation and recovery time during a 3A/µs transient with a specific output capacitance. Fault Conditions: Current Limit and Over current Foldback The LTM4602HV has a current mode controller, which inherently limits the cycle-by-cycle inductor current not only in steady state operation, but also in transient. To further limit current in the event of an over load condition, the LTM4602HV provides foldback current limiting. If the output voltage falls by more than 50%, then the maximum output current is progressively lowered to about one sixth of its full current limit value. Soft-Start and Latchoff with the RUN/SS pin The RUN/SS pin provides a means to shut down the LTM4602HV as well as a timer for soft-start and overcurrent latchoff. Pulling the RUN/SS pin below 0.8V puts the LTM4602HV into a low quiescent current shutdown (IQ ≤ 75µA). Releasing the pin allows an internal 1.2µA current source to charge up the timing capacitor CSS. Inside LTM4602HV, there is an internal 1000pF capacitor from RUN/SS pin to ground. If RUN/SS pin has an external capacitor CSS_EXT to ground, the delay before starting is about: tDELAY = 1.5V •(C SS _ EXT + 1000pF ) 1.2µA When the voltage on RUN/SS pin reaches 1.5V, the LTM4602HV internal switches are operating with a clamping of the maximum output inductor current limited by the RUN/SS pin total soft-start capacitance. As the RUN/SS pin voltage rises to 3V, the soft-start clamping of the inductor current is released. VIN to VOUT Stepdown Ratios There are restrictions in the maximum VIN to VOUT step down ratio that can be achieved for a given input voltage. These constraints are shown in the Typical Performance Characteristics curves labeled “VIN to VOUT Stepdown Ratio”. Note that additional thermal de-rating may apply. See the Thermal Considerations and Output Current DeRating sections of this data sheet. 4602hvf 10 LTM4602HV U W U U APPLICATIO S I FOR ATIO Table 2. Output Voltage Response Versus Component Matrix (Refer to Figure 17), 0A to 3A Step (Typical Values) TYPICAL MEASURED VALUES COUT1 VENDORS TDK TAIYO YUDEN TAIYO YUDEN VOUT (V) 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 5 5 CIN (CERAMIC) 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 1 × 10µF 25V 1 × 10µF 25V PART NUMBER C4532X5R0J107MZ (100UF,6.3V) JMK432BJ107MU-T ( 100µF, 6.3V) JMK316BJ226ML-T501 ( 22µF, 6.3V) CIN (BULK) 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V COUT1 (CERAMIC) 3 × 22µF 6.3V 1 × 100µF 6.3V 2 × 100µF 6.3V 4 × 100µF 6.3V 3 × 22µF 6.3V 1 × 100µF 6.3V 2 × 100µF 6.3V 4 × 100µF 6.3V 3 × 22µF 6.3V 1 × 100µF 6.3V 2 × 100µF 6.3V 4 × 100µF 6.3V 3 × 22µF 6.3V 1 × 100µF 6.3V 2 × 100µF 6.3V 4 × 100µF 6.3V 3 × 22µF 6.3V 1 × 100µF 6.3V 2 × 100µF 6.3V 4 × 100µF 6.3V 3 × 22µF 6.3V 1 × 100µF 6.3V 2 × 100µF 6.3V 4 × 100µF 6.3V 1 × 100µF 6.3V 2 × 100µF 6.3V 3 × 22µF 6.3V 4 × 100µF 6.3V 1 × 100µF 6.3V 3 × 22µF 6.3V 2 × 100µF 6.3V 4 × 100µF 6.3V 2 × 100µF 6.3V 1 × 100µF 6.3V 3 × 22µF 6.3V 4 × 100µF 6.3V 1 × 100µF 6.3V 3 × 22µF 6.3V 2 × 100µF 6.3V 4 × 100µF 6.3V 4 × 100µF 6.3V 4 × 100µF 6.3V COUT2 (BULK) 470µF 4V 470µF 2.5V 330µF 6.3V NONE 470µF 4V 470µF 2.5V 330µF 6.3V NONE 470µF 4V 470µF 2.5V 330µF 6.3V NONE 470µF 4V 470µF 2.5V 330µF 6.3V NONE 470µF 4V 470µF 2.5V 330µF 6.3V NONE 470µF 4V 470µF 2.5V 330µF 6.3V NONE 470µF 4V 330µF 6.3V 470µF 4V NONE 470µF 4V 470µF 4V 330µF 6.3V NONE 330µF 6.3V 470µF 4V 470µF 4V NONE 470µF 4V 470µF 4V 330µF 6.3V NONE NONE NONE COUT2 VENDORS SANYO POS CAP SANYO POS CAP SANYO POS CAP CCOMP C3 NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 220pF 220pF 220pF 220pF 220pF 220pF 220pF 220pF 220pF 220pF 220pF 220pF 220pF 220pF 220pF 220pF 100pF 100pF VIN (V) 5 5 5 5 12 12 12 12 5 5 5 5 12 12 12 12 5 5 5 5 12 12 12 12 5 5 5 5 12 12 12 12 7 7 7 7 12 12 12 12 15 20 DROOP (mV) 30 30 25 25 30 25 25 25 25 25 25 26 25 25 28 26 25 25 25 29 25 25 25 29 25 25 25 25 25 25 25 27 32 30 30 32 38 30 30 32 80 80 PART NUMBER 6TPE330MIL (330µF, 6.3V) 2R5TPE470M9 (470µF, 2.5V) 4TPE470MCL (470µF, 4V) PEAK TO PEAK (mV) 60 60 54 55 60 54 56 55 50 54 59 59 55 54 59 59 54 50 50 60 50 50 50 60 50 50 50 50 50 50 50 54 64 60 60 64 58 60 60 64 160 160 RECOVERY TIME (µs) 25 20 20 20 25 20 20 20 25 20 20 20 25 20 20 20 30 20 20 20 30 20 20 20 30 30 30 25 30 30 30 25 30 30 35 25 30 35 30 25 25 25 LOAD STEP (A/µs) 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 4602hvf 11 LTM4602HV U W U U APPLICATIO S I FOR ATIO After the controller has been started and given adequate time to charge up the output capacitor, CSS is used as a short-circuit timer. After the RUN/SS pin charges above 4V, if the output voltage falls below 75% of its regulated value, then a short-circuit fault is assumed. A 1.8µA current then begins discharging CSS. If the fault condition persists until the RUN/SS pin drops to 3.5V, then the controller turns off both power MOSFETs, shutting down the converter permanently. The RUN/SS pin must be actively pulled down to ground in order to restart operation. The over-current protection timer requires the soft-start timing capacitor CSS be made large enough to guarantee that the output is in regulation by the time CSS has reached the 4V threshold. In general, this will depend upon the size of the output capacitance, output voltage and load current characteristic. A minimum external soft-start capacitor can be estimated from: C SS _ EXT + 1000pF > C OUT • VOUT (10–3 [F / VS ]) Generally 0.1µF is more than sufficient. Since the load current is already limited by the current mode control and current foldback circuitry during a short circuit, overcurrent latchoff operation is NOT always needed or desired, especially if the output has large capacitance or the load draws high current during start-up. The latchoff feature can be overridden by a pull-up current greater than 5µA but less than 80µA to the RUN/SS pin. The additional current prevents the discharge of CSS during a fault and also shortens the soft-start period. Using a resistor from RUN/SS pin to VIN is a simple solution to defeat latchoff. Any pull-up network must be able to maintain RUN/SS above 4V maximum latchoff threshold and overcome the 4µA maximum discharge current. Figure 3 shows a conceptual drawing of VRUN during startup and short circuit. VRUN/SS 4V 3.5V 3V 1.5V SHORT-CIRCUIT LATCH ARMED t SOFT-START CLAMPING OF IL RELEASED OUTPUT OVERLOAD HAPPENS SHORT-CIRCUIT LATCHOFF VO 75%VO t SWITCHING STARTS 4602HV F03 Figure 3. RUN/SS Pin Voltage During Startup and Short-Circuit Protection VIN VIN 500k LTM4602HV RUN/SS PGND SGND RECOMMENDED VALUES FOR RRUN/SS VIN RRUN/SS 4.5V TO 5.5V 10.8V TO 13.8V 24V TO 28V 50k 150k 500k 4602HV F04 Figure 4. Defeat Short-Circuit Latchoff with a Pull-Up Resistor to VIN 4602hvf 12 LTM4602HV U U W U APPLICATIO S I FOR ATIO Enable EXTVCC Connection The RUN/SS pin can be driven from logic as shown in Figure 5. This function allows the LTM4602HV to be turned on or off remotely. The ON signal can also control the sequence of the output voltage. An internal low dropout regulator produces an internal 5V supply that powers the control circuitry and FET drivers. Therefore, if the system does not have a 5V power rail, the LTM4602HV can be directly powered by VIN. The gate driver current through LDO is about 16mA. The internal LDO power dissipation can be calculated as: RUN/SS PLDO_LOSS = 16mA • (VIN – 5V) LTM4602HV ON PGND SGND 2N7002 4602HV F05 Figure 5. Enable Circuit with External Logic Output Voltage Tracking For the applications that require output voltage tracking, several LTM4602HV modules can be programmed by the power supply tracking controller such as the LTC2923. Figure 6 shows a typical schematic with LTC2923. Coincident, ratiometric and offset tracking for VO rising and falling can be implemented with different sets of resistor values. See the LTC2923 data sheet for more details. Q1 VIN 5V 3.3V DC/DC VIN VIN RONB VCC RAMP GATE ON RONA LTM4602HV VOSET VOUT FB1 RAMPBUF STATUS VIN TRACK1 SDO VIN FB2 LTM4602HV VOSET VOUT RTB2 TRACK2 RTA2 GND 2. EXTVCC connected to an external supply. Internal LDO is shut off. A high efficiency supply compatible with the MOSFET gate drive requirements (typically 5V) can improve overall efficiency. With this connection, it is always required that the EXTVCC voltage can not be higher than VIN pin voltage. Discontinuous Operation and FCB Pin RTB1 RTA1 1. EXTVCC grounded. Internal 5V LDO is always powered from the internal 5V regulator. 1.8V RSET 49.9k LTC2923 The LTM4602HV also provides an external gate driver voltage pin EXTVCC. If there is a 5V rail in the system, it is recommended to connect EXTVCC pin to the external 5V rail. Whenever the EXTVCC pin is above 4.7V, the internal 5V LDO is shut off and an internal 50mA P-channel switch connects the EXTVCC to internal 5V. Internal 5V is supplied from EXTVCC until this pin drops below 4.5V. Do not apply more than 6V to the EXTVCC pin and ensure that EXTVCC < VIN. The following list summaries the possible connections for EXTVCC: 1.5V RSET 66.5k The FCB pin determines whether the internal bottom MOSFET remains on when the inductor current reverses. There is an internal 10k pulling down resistor connecting this pin to ground. The default light load operation mode is forced continuous (PWM) current mode. This mode provides minimum output voltage ripple. 4602HV F06 Figure 6. Output Voltage Tracking with the LTC2923 Controller 4602hvf 13 LTM4602HV U W U U APPLICATIO S I FOR ATIO approximate θJA for the module with various heatsinking methods. Thermal models are derived from several temperature measurements at the bench, and thermal modeling analysis. Application Note 103 provides a detailed explanation of the analysis for the thermal models, and the derating curves. Tables 3 and 4 provide a summary of the equivalent θJA for the noted conditions. These equivalent θJA parameters are correlated to the measure values, and improved with air-flow. The case temperature is maintained at 100°C or below for the derating curves. This allows for 4W maximum power dissipation in the total module with top and bottom heatsinking, and 2W power dissipation through the top of the module with an approximate θJC between 6°C/W to 9°C/W. This equates to a total of 124°C at the junction of the device. The θJA values in Tables 3 and 4 can be used to derive the derating curves for other output voltages. In the application where the light load efficiency is important, tying the FCB pin above 0.6V threshold enables discontinuous operation where the bottom MOSFET turns off when inductor current reverses. Therefore, the conduction loss is minimized and light load efficient is improved. The penalty is that the controller may skip cycle and the output voltage ripple increases at light load. Paralleling Operation with Load Sharing Two or more LTM4602HV modules can be paralleled to provide higher than 6A output current. Figure 7 shows the necessary interconnection between two paralleled modules. The OPTI-LOOP™ current mode control ensures good current sharing among modules to balance the thermal stress. The new feedback equation for two or more LTM4602HVs in parallel is: 100k + RSET N VOUT = 0.6 V • RSET Safety Considerations The LTM4602HV modules do not provide isolation from VIN to VOUT. There is no internal fuse. If required, a slow blow fuse with a rating twice the maximum input current should be provided to protect each unit from catastrophic failure. where N is the number of LTM4602HVs in parallel. Thermal Considerations and Output Current Derating The power loss curves in Figures 8 and 15 can be used in coordination with the load current derating curves in Figures 9 to 14, and Figures 16 to 19 for calculating an OPTI-LOOP is a trademark of Linear Technology Corporation. VPULLUP 100k PGOOD VIN VIN LTM4602HV VOUT VOUT 12A MAX PGND COMP VOSET SGND RSET PGOOD COMP VOSET SGND VIN LTM4602HV VOUT PGND 4602HV F07 Figure 7. Parallel Two µModules with Load Sharing 4602hvf 14 LTM4602HV U U W U APPLICATIO S I FOR ATIO 2.0 7 7 6 6 5 5 1.4 12V TO 1.5V LOSS 1.2 CURRENT (A) 1.0 0.8 5V TO 1.5V LOSS 0.6 0.4 3 0LFM 200LFM 400LFM 1 0 0.6 1.0 3.1 4.1 2.1 CURRENT (A) 0 6.1 5.1 50 3 60 70 80 90 0LFM 200LFM 400LFM 1 0 4602HV F09 Figure 8. 1.5V Power Loss Curves vs Load Current Figure 9. 5V to 1.5V, No Heatsink 6 6 3.5 5 5 CURRENT (A) 4.0 0 50 60 70 80 90 4 3 1 0 50 100 2.5 2.0 1.5 1.0 0LFM 200LFM 400LFM 60 70 80 90 0.5 0 0.5 100 Figure 11. 12V to 1.5V, No Heatsink 6 6 5 5 5 3 2 CURRENT (A) 6 CURRENT (A) 7 4 4 3 2 0LFM 200LFM 400LFM 70 80 90 100 TEMPERATURE (°C) 1 0 50 Figure 14. 5V to 3.3V, No Heatsink 6.1 4 3 2 0LFM 200LFM 400LFM 60 70 80 90 100 TEMPERATURE (°C) 4602HV F14 5.1 Figure 13. 3.3V Power Loss Figure 12. 12V to 1.5V, BGA Heatsink 7 60 4.1 3.1 CURRENT (A) 4602HV F13 7 50 2.1 4602HV F09 4602HV F11 0 1.0 TEMPERATURE (°C) TEMPERATURE (°C) 1 5V TO 3.3V LOSS 12V TO 3.3V LOSS 12V TO 3.3V (950kHz) LOSS 3.0 2 0LFM 200LFM 400LFM 100 90 Figure 10. 5V to 1.5V, BGA Heatsink 7 3 80 4602HV F10 7 4 70 TEMPERATURE (°C) 4602HV F08 1 60 50 100 TEMPERATURE (°C) 2 CURRENT (A) 4 2 2 0.2 CURRENT (A) 4 POWER LOSS (W) POWER LOSS (W) 1.6 CURRENT (A) 1.8 0LFM 200LFM 400LFM 1 0 50 60 70 80 90 100 TEMPERATURE (°C) 4602HV F15 4602HV F16 Figure 15. 5V to 3.3V, BGA Heatsink Figure 16. 12V to 3.3V (950kHz), No Heatsink 4602hvf 15 LTM4602HV U U W U 7 7 6 6 6 5 5 5 4 3 2 CURRENT (A) 7 CURRENT (A) CURRENT (A) APPLICATIO S I FOR ATIO 4 3 2 0LFM 200LFM 400LFM 1 0 60 50 0LFM 200LFM 400LFM 0 80 90 100 3 2 1 70 4 0LFM 200LFM 400LFM 1 0 60 50 TEMPERATURE (°C) 70 80 90 100 50 60 TEMPERATURE (°C) 4602HV F16 Figure 17. 12V to 3.3V (950kHz), BGA Heatsink 70 4602HV F18 Figure 18. 24V to 3.3V, No Heatsink Table 3. 1.5V Output 80 90 100 TEMPERATURE (°C) 4602HV F19 Figure 19. 24V to 3.3V, BGA Heatsink Table 4. 3.3V Output AIR FLOW (LFM) HEATSINK θJA (°C/W) AIR FLOW (LFM) HEATSINK θJA (°C/W) 0 None 15.2 0 None 15.2 200 None 14 200 None 14.6 400 None 12 400 None 13.4 0 BGA Heatsink 13.9 0 BGA Heatsink 13.9 200 BGA Heatsink 11.3 200 BGA Heatsink 11.1 400 BGA Heatsink 10.25 400 BGA Heatsink 10.5 Layout Checklist/Example • Do not put via directly on pad The high integration of the LTM4602HV makes the PCB board layout very simple and easy. However, to optimize its electrical and thermal performance, some layout considerations are still necessary. • Use a separated SGND ground copper area for components connected to signal pins. Connect the SGND to PGND underneath the unit • Use large PCB copper areas for high current path, including VIN, PGND and VOUT. It helps to minimize the PCB conduction loss and thermal stress • Place high frequency ceramic input and output capacitors next to the VIN, PGND and VOUT pins to minimize high frequency noise • Place a dedicated power ground layer underneath the unit • To minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between top layer and other power layers Figure 20 gives a good example of the recommended layout. LTM4602 Frequency Adjustment The LTM4602HV is designed to typically operate at 850kHz across most input and output conditions. The control architecture is constant on time valley mode current control. The fADJ pin is typically left open or decoupled with an optional 1000pF capacitor. The switching frequency has been optimized to maintain constant output ripple over the operating conditions. The equations for setting the operating frequency are set around a programmable constant on time. This on time is developed by a programmable 4602hvf 16 LTM4602HV U U W U APPLICATIO S I FOR ATIO VIN CIN PGND VOUT 4602HV F20 LOAD TOP LAYER Figure 20. Recommended PCB Layout current into an on board 10pF capacitor that establishes a ramp that is compared to a voltage threshold that is equal to the output voltage up to a 2.4V clamp. This ION current is equal to: ION = (VIN – 0.7V)/110k, with the 110k onboard resistor from VIN to fADJ. The on time is equal to tON = (VOUT/ION) • 10pF and tOFF = ts – tON. The frequency is equal to: Freq. = DC/tON. The ION current is proportional to VIN, and the regulator duty cycle is inversely proportional to VIN, therefore the step-down regulator will remain relatively constant frequency as the duty cycle adjustment takes place with lowering VIN. The on time is proportional to VOUT up to a 2.4V clamp. This will hold frequency relatively constant with different output voltages up to 2.4V. The regulator switching period is comprised of the on time and off time as depicted in Figure 21. The on time is equal to tON = (VOUT/ION) • 10pF and tOFF = ts – tON. The frequency is equal to: Frequency = DC/tON). t (DC) DUTY CYCLE = ON ts tOFF tON Equations for setting frequency: VOUT = 5V ION = (VIN – 0.7V)/110k; for 12V input, ION = 103µA frequency = (ION/[2.4V • 10pF]) • (DC) = 1.79MHz; DC = duty cycle, duty cycle is (VOUT/VIN) t = tON + tOFF, tON = on-time, tOFF = off-time of the switching period; t = 1/frequency tOFF must be greater than 400ns, or t – tON > 400ns. tON = DC • t 1MHz frequency or 1µs period is chosen. V t DC = ON = OUT ts VIN DC FREQ = tON 4602HV F21 PERIOD ts The LTM4602 has a minimum (tON) on time of 100 nanoseconds and a minimum (tOFF) off time of 400 nanoseconds. The 2.4V clamp on the ramp threshold as a function of VOUT will cause the switching frequency to increase by the ratio of VOUT/2.4V for 3.3V and 5V outputs. This is due to the fact the on time will not increase as VOUT increases past 2.4V. Therefore, if the nominal switching frequency is 850kHz, then the switching frequency will increase to ~1.2MHz for 3.3V, and ~1.7MHz for 5V outputs due to Frequency = (DC/tON) When the switching frequency increases to 1.2MHz, then the time period ts is reduced to ~833 nanoseconds and at 1.7MHz the switching period reduces to ~588 nanoseconds. When higher duty cycle conversions like 5V to 3.3V and 12V to 5V need to be accommodated, then the switching frequency can be lowered to alleviate the violation of the 400ns minimum off time. Since the total switching period is t = tON + tOFF, tOFF will be below the 400ns minimum off time. A resistor from the fADJ pin to ground can shunt current away from the on time generator, thus allowing for a longer on time and a lower switching frequency. 12V to 5V and 5V to 3.3V derivations are explained in the data sheet to lower switching frequency and accommodate these step-down conversions. tON = 0.41 • 1µs ≅ 410ns tOFF = 1µs – 410ns ≅ 590ns tON and tOFF are above the minimums with adequate guard band. Figure 21 4602hvf 17 LTM4602HV U U W U APPLICATIO S I FOR ATIO Using the frequency = (ION/[2.4V • 10pF]) • (DC), solve for ION = (1MHz • 2.4V • 10pF) • (1/0.41) ≅ 58µA. ION current calculated from 12V input was 103µA, so a resistor from fADJ to ground = (0.7V/15k) = 46µA. 103µA – 46µA = 57µA, sets the adequate ION current for proper frequency range for the higher duty cycle conversion of 12V to 5V. Input voltage range is limited to 8V to 16V. Higher input voltages can be used without the 15k on fADJ. The inductor ripple current gets too high above 16V or below 8V. Using the frequency = (ION/[2.4V • 10pF]) • (DC), solve for ION = (450kHz • 2.4V • 10pF) • (1/0.66) ≅ 16µA. ION current calculated from 5V input was 39µA, so a resistor from fADJ to ground = (0.7V/30.1k) = 23µA. 39µA – 23µA = 16µA, sets the adequate ION current for proper frequency range for the higher duty cycle conversion of 5V to 3.3V. Input voltage range is limited to 4.5V to 7V. Higher input voltages can be used without the 30.1k on fADJ. The inductor ripple current gets too high above 7V, and the 400ns minimum off-time is limited below 4.5V. Equations for setting frequency: VOUT = 3.3V Therefore, at 3.3V output, a 30.1k resistor is recommended to add from pin fADJ to ground when the input voltage is between 4.5V to 7V. However, this resistor needs to be removed to avoid high inductor ripple current when the input voltage is more than 7V. Similarly, for 5V output, a 15k resistor is recommended to adjust the frequency when the input voltage is between 8V to 16V. This 15k resistor is removed when the input voltage becomes higher than 16V. Please refer to the Typical Performance curve VIN to VOUT Step-Down Ratio. ION = (VIN – 0.7V)/110k; for 5V input, ION = 39µA frequency = (ION/[2.4V • 10pF]) • (DC) = 1.07MHz; DC = duty cycle, duty cycle is (VOUT/VIN) t = tON + tOFF, tON = on-time, tOFF = off-time of the switching period; t = 1/frequency tOFF must be greater than 400ns, or t – tON > 400ns. tON = DC • t ~450kHz frequency or 2.22µs period is chosen. Frequency range is about 450kHz to 650kHz from 4.5V to 7V input. tON = 0.66 • 2.22µs ≅ 1.46µs tOFF = 2.22µs – 1.46µs ≅ 760ns tON and tOFF are above the minimums with adequate guard band. In 12V to 3.3V and 24V to 3.3V applications, if a 35k resistor is added from the fADJ pin to ground, then a 2% efficiency gain will be achieved as shown in the 12V and 24V efficiency graphs shown in the Typical Characteristics. This is due to lowering the transition losses in the power MOSFETs by reducing the switching frequency from 1.3mHz to 1mHz. 5V to 3.3V at 5A R1 30.1k VIN 4.5V TO 7V C3 10µF 25V C1 10µF 25V VIN C5 100pF fADJ EXTVCC EFFICIENCY = 92% VOUT FCB VOSET RSET 22.1k 1% LTM4602HV RUN/SOFT-START VOUT 3.3V AT 5A RUN/SS SVIN PGOOD COMP SGND C2 22µF + C4 330µF 6.3V OPEN DRAIN PGND 4602HV F23 5V TO 3.3V AT 5A WITH fADJ = 30.1k LTM4602HV MINIMUM ON-TIME = 100ns LTM4602HV MINIMUM OFF-TIME = 400ns C1, C3: TDK C3216X5R1E106MT C2: TAIYO YUDEN, JMK316BJ226ML C4: SANYO POS CAP, 6TPE330MIL 4602hvf 18 LTM4602HV U U W U APPLICATIO S I FOR ATIO 12V to 5V at 5A R1 15k VIN 8V TO 16V C3 10µF 25V C1 10µF 25V VIN C5 100pF fADJ EXTVCC EFFICIENCY = 90% VOUT FCB VOSET RSET 13.7k 1% LTM4602HV RUN/SS RUN/SOFT-START VOUT 5V AT 5A SVIN PGOOD COMP SGND C2 22µF + C4 330µF 6.3V OPEN DRAIN PGND 4602HV F24 12V TO 5V AT 5A WITH fADJ = 15k LTM4602HV MINIMUM ON-TIME = 100ns LTM4602HV MINIMUM OFF-TIME = 400ns VIN + 5V TO 24V CIN 150µF BULK CIN 10µF ×2 CER VIN (MULTIPLE PINS) GND EXTVCC C3 100pF C1, C3: TDK C3216X5R1E106MT C2: TAIYO YUDEN, JMK316BJ226ML C4: SANYO POS CAP, 6TPE330MIL SVIN VOUT (MULTIPLE PINS) fADJ VOSET VOUT LTM4602HV COMP VOUT COUT1 22µF 6.3V REFER TO TABLE 2 + COUT2 330µF REFER TO TABLE 2 FCB RSET 66.5k REFER TO TABLE 1 RUN/SS PGOOD C4 OPT 0.6V TO 5V SGND REFER TO STEP DOWN RATIO GRAPH PGND (MULTIPLE PINS) GND 4602HV F22 Figure 22. Typical Application, 5V to 24V Input, 0.6V to 6V Output, 6A Max 4602hvf 19 LTM4602HV U TYPICAL APPLICATIO Parallel Operation and Load Sharing VIN 4.5V TO 24V VOUT = 0.6V • ([100k/N] + RSET)/RSET WHERE N = 2 C8 10µF 35V VIN fADJ EXTVCC VOUT FCB VOSET RSET 15.8k 1% LTM4602HV RUN C9 22µF SVIN + C10 330µF 4V PGOOD COMP SGND PGND VOUT 2.5V 12A RUN/SOFT-START C3 10µF 35V VIN C4 220pF fADJ EXTVCC VOUT FCB C2 22µF VOSET LTM4602HV RUN + C5 330µF 4V R1 100k SVIN PGOOD COMP SGND PGND C3, C8: TAIYO YUDEN, GDK316BJ106ML C2, C9: TAIYO YUDEN, JMK316BJ226ML-T501 C5, C10: SANYO POS CAP, 4TPE330MI 4602HV TA02 Current Sharing Between Two LTM4602HV Modules 6 INDIVIDUAL SHARE 12VIN 2.5VOUT 12AMAX 4 IOUT2 IOUT1 2 0 0 6 TOTAL LOAD 12 4602HV TA03 4602hvf 20 5.7150 2.5400 0.3175 0.3175 2.7375 C(0.30) PAD 1 13.97 BSC 0.11 – 0.27 6.9850 4.4450 1.2700 0.0000 1.4675 4.0075 6.9421 94 83 72 61 50 39 5.7158 102 100 101 80 69 58 47 91 79 68 57 46 38 31 90 37 30 17 18 33 1 1 8 3 5 6 7 4 8 13 10 9 11 6 28 35 55 14 44 13 13.93 BSC 12 10 7 29 36 15 45 56 67 78 89 100 14 11 15 16 30 37 BOTTOM VIEW 9 5 27 34 54 43 66 77 88 99 16 46 57 68 79 90 101 17 17 31 38 18 47 58 69 80 91 102 18 20 48 19 22 49 60 71 70 59 82 93 104 81 92 103 104 93 82 71 60 49 20 24 24 23 22 21 19 21 23 20 21 22 26 53 42 65 76 87 98 12.70 BSC 103 92 81 70 59 48 19 12 4 1.9042 16 3.1742 89 78 67 56 45 99 88 77 66 55 44 36 29 15 11 98 87 76 65 54 43 35 28 14 10 7 5.7142 23 2 3 41 52 40 51 50 86 97 64 85 96 63 61 34 27 13 9 6 4.4442 SUGGESTED SOLDER PAD LAYOUT TOP VIEW 62 73 72 97 86 75 64 53 42 75 84 83 96 85 74 63 52 41 33 26 4.4950 74 95 2 95 84 73 62 51 40 1.0900 94 39 4.4458 2.3600 3.1758 5.7650 1.9058 5 6.9865 25 32 32 25 12 6.3500 8 5.0800 0.0000 1.2700 5.2775 3.8100 0.6358 0.3175 0.3175 0.0000 4 2.5400 0.6342 1.2700 3 2.5400 2 3.8100 1 5.0800 6.9888 6.3500 6.5475 A C E G J L M N P B D F H K LGA104 02-18 eee M X Y DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER IS A MARKED FEATURE OR A NOTCHED BEVELED PAD 4 SYMBOL TOLERANCE 0.15 aaa 0.10 bbb 0.15 eee 6. THE TOTAL NUMBER OF PADS: 104 5. PRIMARY DATUM -Z- IS SEATING PLANE LAND DESIGNATION PER JESD MO-222, SPP-010 3 2. ALL DIMENSIONS ARE IN MILLIMETERS DETAIL B PAD 1 CORNER R 0.27 – 0.37 SUBSTRATE 4 aaa Z NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 DETAIL B MOLD CAP 2.72 – 2.92 (Reference LTM DWG # 05-05-1800) Z PADS SEE NOTES T 3 2.45 – 2.55 bbb Z LGA Package 104-Lead (15mm × 15mm) TOP VIEW 15 BSC X 15 BSC Y aaa Z LTM4602HV PACKAGE DESCRIPTIO 4602hvf 21 U LTM4602HV U PACKAGE DESCRIPTIO Pin Assignment Tables (Arranged by Pin Number) PIN NAME A1 A2 A3 VIN A4 A5 VIN A6 A7 VIN A8 A9 VIN A10 A11 VIN A12 A13 VIN A14 A15 fADJ A16 A17 SVIN A18 A19 EXTVCC A20 A21 VOSET A22 A23 - PIN NAME B1 VIN B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 COMP PIN NAME C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 VIN C11 C12 VIN C13 C14 VIN C15 C16 C17 C18 C19 C20 C21 C22 C23 - PIN NAME D1 VIN D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 SGND PIN NAME E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 VIN E11 E12 VIN E13 E14 VIN E15 E16 E17 E18 E19 E20 E21 E22 E23 - PIN NAME F1 VIN F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 RUN/SS PIN NAME G1 PGND G2 G3 G4 G5 G6 G7 G8 G9 G10 G11 G12 G13 G14 G15 G16 G17 G18 G19 G20 G21 G22 G23 FCB PIN NAME H1 H2 H3 H4 H5 H6 H7 PGND H8 H9 PGND H10 H11 PGND H12 H13 PGND H14 H15 PGND H16 H17 PGND H18 H19 H20 H21 H22 H23 - PIN NAME J1 PGND J2 J3 J4 J5 J6 J7 J8 J9 J10 J11 J12 J13 J14 J15 J16 J17 J18 J19 J20 J21 J22 J23 PGOOD PIN NAME K1 K2 K3 K4 K5 K6 K7 PGND K8 K9 PGND K10 K11 PGND K12 K13 PGND K14 K15 PGND K16 K17 PGND K18 K19 K20 K21 K22 K23 - PIN NAME L1 L2 PGND L3 L4 PGND L5 L6 PGND L7 L8 PGND L9 L10 PGND L11 L12 PGND L13 L14 PGND L15 L16 PGND L17 L18 PGND L19 L20 PGND L21 L22 PGND L23 - PIN NAME M1 M2 PGND M3 M4 PGND M5 M6 PGND M7 M8 PGND M9 M10 PGND M11 M12 PGND M13 M14 PGND M15 M16 PGND M17 M18 PGND M19 M20 PGND M21 M22 PGND M23 - PIN NAME N1 N2 PGND N3 N4 PGND N5 N6 PGND N7 N8 PGND N9 N10 PGND N11 N12 PGND N13 N14 PGND N15 N16 PGND N17 N18 PGND N19 N20 PGND N21 N22 PGND N23 - PIN NAME P1 P2 VOUT P3 P4 VOUT P5 P6 VOUT P7 P8 VOUT P9 P10 VOUT P11 P12 VOUT P13 P14 VOUT P15 P16 VOUT P17 P18 VOUT P19 P20 VOUT P21 P22 VOUT P23 - PIN NAME R1 R2 VOUT R3 R4 VOUT R5 R6 VOUT R7 R8 VOUT R9 R10 VOUT R11 R12 VOUT R13 R14 VOUT R15 R16 VOUT R17 R18 VOUT R19 R20 VOUT R21 R22 VOUT R23 - PIN NAME T1 T2 VOUT T3 T4 VOUT T5 T6 VOUT T7 T8 VOUT T9 T10 VOUT T11 T12 VOUT T13 T14 VOUT T15 T16 VOUT T17 T18 VOUT T19 T20 VOUT T21 T22 VOUT T23 4602hvf 22 LTM4602HV U PACKAGE DESCRIPTIO Pin Assignment Tables (Arranged by Pin Number) PIN NAME PIN NAME G1 PGND H7 H9 H11 H13 H15 H17 PGND PGND PGND PGND PGND PGND J1 PGND K7 K9 K11 K13 K15 K17 PGND PGND PGND PGND PGND PGND L2 L4 L6 L8 L10 L12 L14 L16 L18 L20 L22 PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND M2 M4 M6 M8 M10 M12 M14 M16 M18 M20 M22 PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND N2 N4 N6 N8 N10 N12 N14 N16 N18 N20 N22 PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND P2 P4 P6 P8 P10 P12 P14 P16 P18 P20 P22 VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT R2 R4 R6 R8 R10 R12 R14 R16 R18 R20 R22 VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT T2 T4 T6 T8 T10 T12 T14 T16 T18 T20 T22 VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT PIN NAME A3 A5 A7 A9 A11 A13 VIN VIN VIN VIN VIN VIN B1 VIN C10 C12 C14 VIN VIN VIN D1 VIN E10 E12 E14 VIN VIN VIN F1 VIN PIN NAME A15 fADJ A17 SVIN A19 EXTVCC A21 VOSET B23 COMP D23 SGND F23 RUN/SS G23 FCB J23 PGOOD 4602hvf Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 23 LTM4602HV U TYPICAL APPLICATIO 1.8V, 5A Regulator VIN 4.5V TO 24V C1 10µF 35V VIN C5 100pF fADJ EXTVCC VOUT 1.8V AT 6A VOUT FCB VOSET R1 100k LTM4602HV RUN C3 22µF + C4 330µF 4V SVIN PGOOD COMP SGND PGND 4602HV TA04 PGOOD RSET 49.9k 1% C1: TAIYO YUDEN, GMK316BJ106ML C3: TAIYO YUDEN, JMK316BJ226ML-T501 C4: SANYO POS CAP, 4TPE330MI RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC2900 Quad Supply Monitor with Adjustable Reset Timer Monitors Four Supplies; Adjustable Reset Timer LTC2923 Power Supply Tracking Controller Tracks Both Up and Down; Power Supply Sequencing LT3825/LT3837 Synchronous Isolated Flyback Controllers No Optocoupler Required; 3.3V, 12A Output; Simple Design LTM4600 10A DC/DC µModule 10A Basic DC/DC µModule LTM4601 12A DC/DC µModule with PLL, Output Tracking/ Margining and Remote Sensing Synchronizable, PolyPhase® Operation to 48A, LTM4601-1 Version has no Remote Sensing, Fast Transient Response LTM4603 6A DC/DC µModule with PLL and Output Tracking/ Margining and Remote Sensing Synchronizable, PolyPhase Operation, LTM4603-1 Version has no Remote Sensing, Fast Transient Response Polyphase is a registered trademark of Linear Technology Corporation. This product contains technology licensed from Silicon Semiconductor Corporation. 24 Linear Technology Corporation ® 4602hvf LT 0107 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2007