MAXIM MAX3787AWL

19-0406; Rev 2; 2/08
KIT
ATION
EVALU
E
L
B
AVAILA
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
Features
♦ No Power Supply Required
The MAX3787 is a 1Gbps to 12.5Gbps equalization
network that compensates for transmission medium losses encountered with FR4 and cables. The equalization
network is composed entirely of passive components
and functions equally well for 8b/10b or scrambled signals. It is packaged in a small 1.5mm x 1.5mm chipscale package (UCSP™) that can be placed anywhere
along the transmission medium to increase jitter margin
for high-speed interconnects. Roughly the size of two
0603 components, the MAX3787 easily provides placement and routing flexibility.
At 8.5Gbps, the MAX3787 compensates for spans up to
18in of FR4 and 7m of cable. At 12.5Gbps, the MAX3787
compensates for spans up to 12in of FR4 and 3m of
cable. Input and output impedance is 100Ω differential.
The MAX3787 requires no power and operates over a
-40°C to +125°C temperature range.
♦ Small 1.5mm x 1.5mm Chip-Scale Package
♦ Passive Equalization Reduces ISI
♦ Operates from 1Gbps to 12.5Gbps
♦ Extends Board Link
♦ Extends Cable Link
♦ Coding Independent, 8b/10b or Scrambled
Ordering Information
PART
PINPACKAGE
TEMP RANGE
PKG
CODE
MAX3787ABL
-40°C to +125°C
4 UCSP
B9-7
MAX3787AWL+
-40°C to +125°C
4 WLP
W91B1+3
+Denotes a lead-free package.
Applications
Pin Configuration
Backplane Interconnect Compensation
TOP VIEW
Cable Interconnect Compensation
Chip-to-Chip Link Extensions
1
2
3
A
Ethernet and Fibre-Channel Serial Modules
OUT+
IN+
Chassis Life Extension
B
MAX3787
C
IN-
UCSP is a trademark of Maxim Integrated Products, Inc.
OUT-
UCSP/WLP
Typical Application Circuits
LINE CARD
ALL PASSIVE BACKPLANE INTERCONNECT
(100Ω)
Tx
IN+
IN-
MAX3787
OUT+
OUT-
(100Ω)
Rx
OUT+
OUT-
MAX3787
IN+
IN-
SWITCH CARD
100Ω FR4
Rx (100Ω)
100Ω FR4
Tx (100Ω)
Typical Application Circuits continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX3787
General Description
MAX3787
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
ABSOLUTE MAXIMUM RATINGS
Voltage between (IN+ and OUT+) or (IN- and OUT-) ..............+2V
Voltage between (IN+ and IN-) or (OUT+ and OUT-) ..............+4V
Voltage between (IN+ and OUT-) or (IN- and OUT+) ..............+4V
Continuous Power Dissipation (TA = +70°C)
4-Bump UCSP (derate 3.0mW/°C above +70°C) .........238mW
Operating Junction Temperature........................................+150°C
Storage Ambient Temperature Range .................-55°C to +150°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
OPERATING CONDITIONS
PARAMETER
Operating Ambient Temperature
SYMBOL
CONDITIONS
TA
Bit Rate
NRZ data
CID Tolerance
Consecutive identical digits
MIN
TYP
MAX
-40
+25
+125
°C
12.5
Gbps
100
Bits
MAX
UNITS
1
UNITS
ELECTRICAL CHARACTERISTICS
(Specifications guaranteed over specified operating conditions. Typical values measured at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
Supply Current
Input Swing
TYP
0.0
Measured differentially at point A in Figure 1
mA
3600
mVP-P
Compensation
5GHz relative to 100MHz
6
dB
Input Impedance
Differential, ZLOAD = 100Ω
100
Ω
Output Impedance
Differential, ZSOURCE = 100Ω
100
Ω
Through Response
Relative to ideal load, see Figure 2 for setup
Input Return Loss
100MHz to 6GHz
15
dB
Output Return Loss
100MHz to 6GHz
15
dB
Resistance IN+ to IN- and OUT+
to OUT-
No load, high impedance on all ports
112
152
Ω
Resistance IN+ to OUT+ and
IN- to OUT-
No load, high impedance on all ports
32
44
Ω
Resistance IN+ to OUT- and
IN- to OUT+
No load, high impedance on all ports
112
152
Ω
DC Gain (OUT/IN)
ZLOAD = 100Ω
0.5
3.125Gbps and 6.25Gbps, 18in of 6mil
microstrip FR4
0.05
8.5Gbps, 10.0Gbps, and 12.5Gbps,
18in of 6mil microstrip FR4
0.10
Residual Deterministic Jitter
(Table 1, Notes 1, 2)
See Figure 3 for limits
UI
Note 1: Signal applied differentially at point A as shown in Figure 1. The deterministic jitter at point B is from media-induced loss,
not from clock-source modulation. Deterministic jitter is measured at the 50% vertical level of the signal at point C.
Note 2: Difference in deterministic jitter between reference points A and C in Figure 1. Stress pattern: 27 PRBS, 100 zeros, 1, 0, 1, 0,
27 PRBS, 100 ones, 0, 1, 0, 1.
2
_______________________________________________________________________________________
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
SIGNAL SOURCE
MAX3787
ROGERS 4350 BOARD
FR4 TEST BOARD
OSCILLOSCOPE
0in ≤ L ≤ 18in
MAX3787
SEE TABLE 1 FOR PCB PARAMETERS.
A
C
B
REPRESENTS EDGE-MOUNTED SMA CONNECTOR.
Figure 1. Residual Deterministic Jitter Test Circuit
ROGERS 4350 BOARD
VNA SOURCE
1in DUAL 50Ω
MICROSTRIP LINE
1in DUAL 50Ω
MICROSTRIP LINE
VNA DETECTOR
MAX3787
REPRESENTS EDGE-MOUNTED SMA CONNECTOR.
Figure 2. Frequency Response Test Circuit Using Vector Network Analyzer (VNA)
_______________________________________________________________________________________
3
FREQUENCY
MIN
(dB)
TYP
(dB)
MAX
(dB)
100MHz
-8.2
-7.4
-6.8
200MHz
-7.9
-7.0
-6.4
300MHz
-7.5
-6.6
-6.0
500MHz
-6.8
-6.0
-5.3
1.0GHz
-5.5
-4.8
-4.2
2.0GHz
-4.2
-3.2
-2.5
3.0GHz
-3.1
-2.2
-1.5
4.0GHz
-2.3
-1.5
-0.8
-6
5.0GHz
-2.1
-1.3
-0.5
-7
5.5GHz
-2.4
-1.6
-0.6
-8
6.0GHz
-2.9
-2.1
-1.1
-9
6.5GHz
—
-2.6
—
7.0GHz
—
-3.1
—
7.5GHz
—
-3.6
—
8.0GHz
—
-4.1
—
8.5GHz
—
-4.7
—
9.0GHz
—
-5.5
—
9.5GHz
—
-7.0
—
10.0GHz
—
-9.0
—
THROUGH-RESPONSE LIMITS
(RELATIVE TO IDEAL LOAD)
0
-1
-2
-3
S21 (dB)
MAX3787
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
MAX
-4
-5
TYP
MIN
0
1
2
3
4
5
6
7
8
9
10
FREQUENCY (GHz)
Figure 3. Through Response Limits
Table 1. PCB Assumptions (Board Material is FR4)
PARAMETER
CONDITIONS
Transmission Line
Edge-coupled microstrip line
Relative Permittivity at 1GHz
Loss Tangent
MIN
TYP
MAX
UNITS
6
mil
FR4 or similar
4.0
—
FR4 or similar
0.02
—
Metal Thickness
1oz copper
1.4
mil
Impedance
Differential
4
90
100
_______________________________________________________________________________________
110
Ω
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
(TA = +25°C, unless otherwise noted. All measurements were done with 1VP-P at the source. Stress pattern: 27 PRBS, 100 zeros, 1, 0, 1,
0, 27 PRBS, 100 ones, 0, 1, 0, 1. Residual deterministic jitter graphs were measured using Tektronix’s FrameScan®. Deterministic jitter of
the system was subtracted from the measured value. Eye diagrams acquired by FrameScan include deterministic jitter of the system
(approximately 9ps) but not random jitter. Twin-ax cable: Amphenol Spectra-Strip® Skewclear® 100Ω 24AWG.)
VERTICAL EYE OPENING vs. LENGTH
(4.25Gbps, STRESS PATTERN)
WITHOUT EQUALIZER
700
600
500
400
WITH EQUALIZER
300
200
700
600
500
400
WITH EQUALIZER
300
200
100
0
0
5
WITHOUT EQUALIZER
10 15 20 25 30 35 40 45 50
900
MAX3787toc03
800
100
0
MAX3787toc02
800
900
VERTICAL EYE OPENING vs. LENGTH
(10.3125Gbps, STRESS PATTERN)
800
VERTICAL EYE OPENING (mVP-P)
700
WITHOUT EQUALIZER
600
500
400
WITH EQUALIZER
300
200
100
0
0
5
10
15
20
25
30
35
40
0
5
10
15
20
25
30
35
40
FR4 BOARD LENGTH (in)
EYE DIAGRAM OF UNEQUALIZED SIGNAL
(18in FR4, 12.5Gbps, STRESS PATTERN)
EYE DIAGRAM OF EQUALIZED SIGNAL
(18in FR4, 12.5Gbps, STRESS PATTERN)
EYE DIAGRAM OF EQUALIZED SIGNAL (ZOOM)
(18in FR4, 12.5Gbps, STRESS PATTERN)
50mV/div
MAX3787toc05
120mV/div
120mV/div
14ps/div
EYE DIAGRAM OF EQUALIZED SIGNAL (ZOOM)
(12in FR4, 12.5Gbps, STRESS PATTERN)
60mV/div
120mV/div
MAX3787toc08
EYE DIAGRAM OF EQUALIZED SIGNAL
(12in FR4, 12.5Gbps, STRESS PATTERN)
MAX3787toc07
120mV/div
14ps/div
14ps/div
EYE DIAGRAM OF UNEQUALIZED SIGNAL
(12in FR4, 12.5Gbps, STRESS PATTERN)
14ps/div
MAX3787toc06
FR4 BOARD LENGTH (in)
MAX3787toc04
FR4 BOARD LENGTH (in)
MAX3787toc09
VERTICAL EYE OPENING (mVP-P)
900
VERTICAL EYE OPENING (mVP-P)
MAX3787toc01
1000
VERTICAL EYE OPENING vs. LENGTH
(8.5Gbps, STRESS PATTERN)
14ps/div
14ps/div
FrameScan is a registered trademark of Tektronix.
Spectra-Strip and Skewclear are registered trademarks of Amphenol.
_______________________________________________________________________________________
5
MAX3787
Typical Operating Characteristics
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted. All measurements were done with 1VP-P at the source. Stress pattern: 27 PRBS, 100 zeros, 1, 0, 1,
0, 27 PRBS, 100 ones, 0, 1, 0, 1. Residual deterministic jitter graphs were measured using Tektronix’s FrameScan. Deterministic jitter of
the system was subtracted from the measured value. Eye diagrams acquired by FrameScan include deterministic jitter of the system
(approximately 9ps) but not random jitter. Twin-ax cable: Amphenol Spectra-Strip Skewclear 100Ω 24AWG.)
EYE DIAGRAM OF EQUALIZED SIGNAL
(18in FR4, 10.3125Gbps, STRESS PATTERN)
120mV/div
EYE DIAGRAM OF EQUALIZED SIGNAL (ZOOM)
(12in FR4, 10.3125Gbps, STRESS PATTERN)
60mV/div
MAX3787toc15
MAX3787toc14
120mV/div
120mV/div
18ps/div
EYE DIAGRAM OF EQUALIZED SIGNAL
(12in FR4, 10.3125Gbps, STRESS PATTERN)
MAX3787toc13
EYE DIAGRAM OF UNEQUALIZED SIGNAL
(12in FR4, 10.3125Gbps, STRESS PATTERN)
18ps/div
18ps/div
EYE DIAGRAM OF EQUALIZED SIGNAL (ZOOM)
(18in FR4, 8.5Gbps, STRESS PATTERN)
EYE DIAGRAM OF EQUALIZED SIGNAL
(18in FR4, 8.5Gbps, STRESS PATTERN)
50mV/div
120mV/div
MAX3787toc16
MAX3787toc17
EYE DIAGRAM OF UNEQUALIZED SIGNAL
(18in FR4, 8.5Gbps, STRESS PATTERN)
MAX3787toc18
18ps/div
6
MAX3787toc12
50mV/div
MAX3787toc10
120mV/div
18ps/div
18ps/div
22ps/div
EYE DIAGRAM OF EQUALIZED SIGNAL (ZOOM)
(18in FR4, 10.3125Gbps, STRESS PATTERN)
MAXt3787toc11
EYE DIAGRAM OF UNEQUALIZED SIGNAL
(18in FR4, 10.3125Gbps, STRESS PATTERN)
120mV/div
MAX3787
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
22ps/div
22ps/div
_______________________________________________________________________________________
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
(TA = +25°C, unless otherwise noted. All measurements were done with 1VP-P at the source. Stress pattern: 27 PRBS, 100 zeros, 1, 0, 1,
0, 27 PRBS, 100 ones, 0, 1, 0, 1. Residual deterministic jitter graphs were measured using Tektronix’s FrameScan. Deterministic jitter of
the system was subtracted from the measured value. Eye diagrams acquired by FrameScan include deterministic jitter of the system
(approximately 9ps) but not random jitter. Twin-ax cable: Amphenol Spectra-Strip Skewclear 100Ω 24AWG.)
EYE DIAGRAM OF EQUALIZED SIGNAL
(12in FR4, 8.5Gbps, STRESS PATTERN)
EYE DIAGRAM OF EQUALIZED SIGNAL (ZOOM)
(12in FR4, 8.5Gbps, STRESS PATTERN)
22ps/div
22ps/div
22ps/div
EYE DIAGRAM OF EQUALIZED SIGNAL
(18in FR4, 6.25Gbps, STRESS PATTERN)
MAX3787toc24
50mV/div
120mV/div
MAX3787toc22
120mV/div
28ps/div
EYE DIAGRAM OF UNEQUALIZED SIGNAL
(12in FR4, 6.25Gbps, STRESS PATTERN)
28ps/div
EYE DIAGRAM OF EQUALIZED SIGNAL (ZOOM)
(12in FR4, 6.25Gbps, STRESS PATTERN)
60mV/div
120mV/div
MAX3787toc26
MAX3787toc25
EYE DIAGRAM OF EQUALIZED SIGNAL
(12in FR4, 6.25Gbps, STRESS PATTERN)
MAX3787toc27
28ps/div
120mV/div
EYE DIAGRAM OF EQUALIZED SIGNAL (ZOOM)
(18in FR4, 6.25Gbps, STRESS PATTERN)
MAX3787toc23
EYE DIAGRAM OF UNEQUALIZED SIGNAL
(18in FR4, 6.25Gbps, STRESS PATTERN)
28ps/div
MAX3787toc21
60mV/div
120mV/div
120mV/div
MAX3787toc19
MAX3787toc20
EYE DIAGRAM OF UNEQUALIZED SIGNAL
(12in FR4, 8.5Gbps, STRESS PATTERN)
28ps/div
28ps/div
_______________________________________________________________________________________
7
MAX3787
Typical Operating Characteristics (continued)
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted. All measurements were done with 1VP-P at the source. Stress pattern: 27 PRBS, 100 zeros, 1, 0, 1,
0, 27 PRBS, 100 ones, 0, 1, 0, 1. Residual deterministic jitter graphs were measured using Tektronix’s FrameScan. Deterministic jitter of
the system was subtracted from the measured value. Eye diagrams acquired by FrameScan include deterministic jitter of the system
(approximately 9ps) but not random jitter. Twin-ax cable: Amphenol Spectra-Strip Skewclear 100Ω 24AWG.)
40ps/div
40ps/div
40ps/div
MAX3787toc33
60mV/div
120mV/div
120mV/div
EYE DIAGRAM OF EQUALIZED SIGNAL (ZOOM)
(12in FR4, 4.25Gbps, STRESS PATTERN)
MAX3787toc32
EYE DIAGRAM OF EQUALIZED SIGNAL
(12in FR4, 4.25Gbps, STRESS PATTERN)
MAX3787toc31
EYE DIAGRAM OF UNEQUALIZED SIGNAL
(12in FR4, 4.25Gbps, STRESS PATTERN)
40ps/div
40ps/div
EYE DIAGRAM OF EQUALIZED SIGNAL
(5m TWIN-AX CABLE, 10.3125Gbps,
STRESS PATTERN)
EYE DIAGRAM OF EQUALIZED SIGNAL (ZOOM)
(5m TWIN-AX CABLE, 10.3125Gbps,
STRESS PATTERN)
MAX3787toc36
50mV/div
120mV/div
MAX3787toc34
MAX3787toc35
EYE DIAGRAM OF UNEQUALIZED SIGNAL
(5m TWIN-AX CABLE, 10.3125Gbps,
STRESS PATTERN)
8
MAX3787toc30
50mV/div
120mV/div
120mV/div
40ps/div
18ps/div
EYE DIAGRAM OF EQUALIZED SIGNAL (ZOOM)
(18in FR4, 4.25Gbps, STRESS PATTERN)
MAX3787toc29
EYE DIAGRAM OF EQUALIZED SIGNAL
(18in FR4, 4.25Gbps, STRESS PATTERN)
MAX3787toc28
EYE DIAGRAM OF UNEQUALIZED SIGNAL
(18in FR4, 4.25Gbps, STRESS PATTERN)
120mV/div
MAX3787
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
18ps/div
18ps/div
_______________________________________________________________________________________
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
(TA = +25°C, unless otherwise noted. All measurements were done with 1VP-P at the source. Stress pattern: 27 PRBS, 100 zeros, 1, 0, 1,
0, 27 PRBS, 100 ones, 0, 1, 0, 1. Residual deterministic jitter graphs were measured using Tektronix’s FrameScan. Deterministic jitter of
the system was subtracted from the measured value. Eye diagrams acquired by FrameScan which include deterministic jitter of the system (approximately 9ps) but not random jitter. Twin-ax cable: Amphenol Spectra-Strip Skewclear 100Ω 24AWG.)
MAX3787toc38
60mV/div
120mV/div
120mV/div
18ps/div
18ps/div
EYE DIAGRAM OF EQUALIZED SIGNAL (ZOOM)
(7m TWIN-AX CABLE, 8.5Gbps,
STRESS PATTERN)
EYE DIAGRAM OF UNEQUALIZED SIGNAL
(5m TWIN-AX CABLE, 8.5Gbps,
STRESS PATTERN)
EYE DIAGRAM OF EQUALIZED SIGNAL (ZOOM)
(5m TWIN-AX CABLE, 8.5Gbps,
STRESS PATTERN)
EYE DIAGRAM OF EQUALIZED SIGNAL
(5m TWIN-AX CABLE, 8.5Gbps,
STRESS PATTERN)
50mV/div
120mV//div
MAX3787toc44
MAX3787toc43
120mV//div
22ps/div
22ps/div
MAX3787toc45
22ps/div
50mV/div
120mV/div
120mV/div
MAX3787toc41
EYE DIAGRAM OF EQUALIZED SIGNAL
(7m TWIN-AX CABLE, 8.5Gbps,
STRESS PATTERN)
MAX3787toc40
EYE DIAGRAM OF UNEQUALIZED SIGNAL
(7m TWIN-AX CABLE, 8.5Gbps,
STRESS PATTERN)
MAX3787toc42
18ps/div
22ps/div
MAX3787toc39
EYE DIAGRAM OF EQUALIZED SIGNAL (ZOOM)
(3m TWIN-AX CABLE, 10.3125Gbps,
STRESS PATTERN)
EYE DIAGRAM OF EQUALIZED SIGNAL
(3m TWIN-AX CABLE, 10.3125Gbps,
STRESS PATTERN)
MAX3787toc37
EYE DIAGRAM OF UNEQUALIZED SIGNAL
(3m TWIN-AX CABLE, 10.3125Gbps,
STRESS PATTERN)
22ps/div
22ps/div
_______________________________________________________________________________________
9
MAX3787
Typical Operating Characteristics (continued)
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted. All measurements were done with 1VP-P at the source. Stress pattern: 27 PRBS, 100 zeros, 1, 0, 1,
0, 27 PRBS, 100 ones, 0, 1, 0, 1. Residual deterministic jitter graphs were measured using Tektronix’s FrameScan. Deterministic jitter of
the system was subtracted from the measured value. Eye diagrams acquired by FrameScan include deterministic jitter of the system
(approximately 9ps) but not random jitter. Twin-ax cable: Amphenol Spectra-Strip Skewclear 100Ω 24AWG.)
50mV/div
MAX3787toc50
40ps/div
50mV/div
120mV/div
120mV/div
MAX3787toc51
EYE DIAGRAM OF EQUALIZED SIGNAL (ZOOM)
(5m TWIN-AX CABLE, 4.25Gbps,
STRESS PATTERN)
EYE DIAGRAM OF EQUALIZED SIGNAL
(5m TWIN-AX CABLE, 4.25Gbps,
STRESS PATTERN)
MAX3787toc49
EYE DIAGRAM OF UNEQUALIZED SIGNAL
(5m TWIN-AX CABLE, 4.25Gbps,
STRESS PATTERN)
40ps/div
40ps/div
EYE DIAGRAM OF EQUALIZED SIGNAL
(0in FR4, 10Gbps, STRESS PATTERN)
100mV/div
100mV/div
MAX3787toc53
MAX3787toc54
EYE DIAGRAM OF EQUALIZED SIGNAL
(0in FR4, 5Gbps, STRESS PATTERN)
MAX3787toc52
EYE DIAGRAM OF EQUALIZED SIGNAL
(0in FR4, 1Gbps, STRESS PATTERN)
160ps/div
MAX3787toc48
MAX3787toc47
MAX3787toc46
120mV/div
120mV/div
40ps/div
40ps/div
40ps/div
10
EYE DIAGRAM OF EQUALIZED SIGNAL (ZOOM)
(7m TWIN-AX CABLE, 4.25Gbps,
STRESS PATTERN)
EYE DIAGRAM OF EQUALIZED SIGNAL
(7m TWIN-AX CABLE, 4.25Gbps,
STRESS PATTERN)
EYE DIAGRAM OF UNEQUALIZED SIGNAL
(7m TWIN-AX CABLE, 4.25Gbps,
STRESS PATTERN)
100mV/div
MAX3787
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
34ps/div
18ps/div
______________________________________________________________________________________
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
(TA = +25°C, unless otherwise noted. All measurements were done with 1VP-P at the source. Stress pattern: 27 PRBS, 100 zeros, 1, 0, 1,
0, 27 PRBS, 100 ones, 0, 1, 0, 1. Residual deterministic jitter graphs were measured using Tektronix’s FrameScan. Deterministic jitter of
the system was subtracted from the measured value. Eye diagrams acquired by FrameScan include deterministic jitter of the system
(approximately 9ps) but not random jitter. Twin-ax cable: Amphenol Spectra-Strip Skewclear 100Ω 24AWG.)
DIFFERENTIAL S22 vs. FREQUENCY
-20
-1
-2
DIFFERENTIAL S21 (dB)
-5
DIFFERENTIAL S22 (dB)
-15
0
MAX3787toc56
MAX3787toc55
-10
-10
-15
-20
-3
-4
-5
-6
-7
-8
-25
-25
-9
-10
-30
-30
6
7
8
9
0
10
1
2
3
4
5
6
7
8
9
10
0
1
2
FREQUENCY (GHz)
FREQUENCY (GHz)
5
6
7
8
9
10
RESIDUAL DETERMINISTIC JITTER
vs. FR4 BOARD LENGTH
STRESS PATTERN
25
20
4.25Gbps
3.125Gbps
2.125Gbps
1Gbps
5
30
RESIDUAL DETERMINISTIC JITTER (ps)
30
10
4
FREQUENCY (GHz)
RESIDUAL DETERMINISTIC JITTER
vs. FR4 BOARD LENGTH
15
3
0
MAX3787toc59
5
STRESS PATTERN
12.5Gbps
25
10.3125Gbps
20
8.5Gbps
15
6.25Gbps
10
5
0
5
10
15
20
25
30
10
15
20
25
FR4 BOARD LENGTH (in)
RESIDUAL DETERMINISTIC JITTER
vs. FR4 BOARD LENGTH
RESIDUAL DETERMINISTIC JITTER
vs. FR4 BOARD LENGTH
30
RPAT PATTERN
25
20
15
5
FR4 BOARD LENGTH (in)
4.25Gbps
3.125Gbps
10
2.125Gbps
1Gbps
5
0
30
RPAT PATTERN
12.5Gbps
25
30
MAX3787toc61
4
RESIDUAL DETERMINISTIC JITTER (ps)
3
MAX3787toc58
2
MAX3787toc60
1
RESIDUAL DETERMINISTIC JITTER (ps)
0
RESIDUAL DETERMINISTIC JITTER (ps)
DIFFERENTIAL S11 (dB)
-5
DIFFERENTIAL S21 vs. FREQUENCY
0
MAX3787toc57
DIFFERENTIAL S11 vs. FREQUENCY
0
10.3125Gbps
20
8.5Gbps
6.25Gbps
15
10
5
0
5
10
15
20
FR4 BOARD LENGTH (in)
25
30
5
10
15
20
25
30
FR4 BOARD LENGTH (in)
______________________________________________________________________________________
11
MAX3787
Typical Operating Characteristics (continued)
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted. All measurements were done with 1VP-P at the source. Stress pattern: 27 PRBS, 100 zeros, 1, 0, 1,
0, 27 PRBS, 100 ones, 0, 1, 0, 1. Residual deterministic jitter graphs were measured using Tektronix’s FrameScan. Deterministic jitter of
the system was subtracted from the measured value. Eye diagrams acquired by FrameScan include deterministic jitter of the system
(approximately 9ps) but not random jitter. Twin-ax cable: Amphenol Spectra-Strip Skewclear 100Ω 24AWG.)
RESIDUAL DETERMINISTIC JITTER
vs. TWIN-AX CABLE LENGTH
RESIDUAL DETERMINISTIC JITTER
vs. TWIN-AX CABLE LENGTH
25
20
4.25Gbps
15
10
1Gbps
2.125Gbps
3.125Gbps
5
30
STRESS PATTERN
12.5Gbps
25
10.3125Gbps
20
8.5Gbps
6.25Gbps
15
10
5
0
0
2
3
4
5
6
1
7
2
3
4
5
6
TWIN-AX CABLE LENGTH (m)
TWIN-AX CABLE LENGTH (m)
RESIDUAL DETERMINISTIC JITTER
vs. TWIN-AX CABLE LENGTH
RESIDUAL DETERMINISTIC JITTER
vs. TWIN-AX CABLE LENGTH
RPAT PATTERN
25
20
15
4.25Gbps
3.125Gbps
2.125Gbps
10
1Gbps
5
0
7
30
MAX3787toc65
MAX3787toc64
30
RESIDUAL DETERMINISTIC JITTER (ps)
1
RPAT PATTERN
25
20
6.25Gbps
8.5Gbps
12.5Gbps
10.3125Gbps
15
10
5
0
1
2
3
4
5
TWIN-AX CABLE LENGTH (m)
12
MAX3787toc63
STRESS PATTERN
RESIDUAL DETERMINISTIC JITTER (ps)
MAX3787toc62
RESIDUAL DETERMINISTIC JITTER (ps)
30
RESIDUAL DETERMINISTIC JITTER (ps)
MAX3787
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
6
7
1
2
3
4
5
6
7
TWIN-AX CABLE LENGTH (m)
______________________________________________________________________________________
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
PIN
NAME
FUNCTION
A1
IN+
A3
OUT+
Positive Data Input
Positive Data Output
C1
IN-
Negative Data Input
C3
OUT-
Negative Data Output
Z1
MAX3787
ESD DIODES
OUT+
IN+
MAX3787
Z2
AT 0Hz (DC)
Z1 = OPEN, Z2 = 0Ω
OUT+
IN+
EQUALIZATION
NETWORK
IN-
IN-
OUT-
OUTZ1
ESD DIODES
Figure 5. ESD Protection Diodes
Figure 4. Functional Diagram
Detailed Description
The MAX3787 is an entirely passive network composed
of both resistive and reactive components (Figure 4).
Two symmetric-T networks with bypassing for highpass characteristics are used to create a differential
symmetric-H network. The entire network acts as a filter
specifically tuned to compensate for transmission medium losses encountered with FR4 and cables.
Input and Output Terminations
The MAX3787 input impedance is 100Ω differential with
the output connected to a 100Ω differential load. The
network is designed for 100Ω-balanced differential signals and is not intended for single-ended transmission.
ESD Protection Diodes
The MAX3787 contains ESD diodes that bypass
the equalization network in case of static discharge
(Figure 5).
Due to the symmetry of the equalization network, signals can pass from IN to OUT or OUT to IN with the
same compensation. The equalizer can also be placed
at the beginning or end of the transmission medium
and provide the same compensation at the receiving
circuit. For example, two equalizers can be placed in
one transceiver module, one for the transmit path and
one for the receive path (see Typical Application
Circuits).
UCSP Assembly Considerations
For the latest application details on UCSP construction,
dimensions, tape carrier information, PCB techniques,
bump-pad layout, and recommended reflow temperature profile, as well as the latest information on reliability
testing results, refer to Application Note 1891: UCSP–A
Wafer-Level Chip-Scale Package available on Maxim’s
website at www.maxim-ic.com/ucsp.
Applications Information
Equalizer Integration and Placement
The MAX3787 is packaged in a small 1.5mm x 1.5mm
UCSP that can be placed anywhere along the transmission medium. The small size allows placement and
routing flexibility.
Chip Information
TRANSISTOR COUNT: 0
PROCESS: SiGe BiPOLAR
______________________________________________________________________________________
13
MAX3787
Pin Description
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
MAX3787
Typical Application Circuits (continued)
FIBRE-CHANNEL
HOST BUS ADAPTER
ALL PASSIVE COPPER-CABLE ASSEMBLY
(100Ω)
Tx
(100Ω)
Rx
100Ω 24AWG TWIN-AX CABLE
100Ω 24AWG TWIN-AX CABLE
EQ
FIBRE-CHANNEL
FABRIC SWITCH
MAX3787
EQ
Rx (100Ω)
Tx (100Ω)
MAX3787
Package Information
(For the latest package outline information, go to
www.maxim-ic.com/packages.)
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
4 UCSP
B9-7
21-0093
4 WLP
W91B1+3
21-0067
14
______________________________________________________________________________________
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
REVISION
NUMBER
REVISION
DATE
0
7/05
1
12/05
2
2/08
DESCRIPTION
PAGES
CHANGED
Initial release.
—
Added lead-free package to Ordering Information table.
1
In the Ordering Information table, changed lead-free part number from ABL+ to
AWL+; added WLP package information.
1, 14
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15
© 2008 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
MAX3787
Revision History