MC54/74F181 4-BIT ARITHMETIC LOGIC UNIT The MC54/74F181 is a 4-bit Arithmetic Logic Unit (ALU) which can perform all the possible 16 logic operations on two variables and a variety of arithmetic operations. It is 40% faster than the Schottky ALU and only consumes 30% as much power. • Provides 16 Arithmetic Operations, ie, Add, Subtract, Compare, 4-BIT ARITHMETIC LOGIC UNIT Double, Plus Twelve Other Arithmetic Operations • Provides all 16 Logic Operations of Two Variables, ie, Exclusive-OR, Compare, AND, NAND, OR, NOR, Plus Ten Other Logic Operations • Full Lookahead for High-Speed Arithmetic Operation on Long Words FAST SCHOTTKY TTL CONNECTION DIAGRAM VCC A1 24 23 B1 22 A2 21 B2 20 A3 19 B3 18 G Cn+4 17 16 P 15 N SUFFIX PLASTIC CASE 724-03 A = B F3 14 13 24 1 ORDERING INFORMATION 1 B0 2 A0 3 S3 4 S2 5 S1 6 S0 7 Cn 8 M 9 F0 10 F1 11 12 F2 GND MC54/74FXXXN Plastic GUARANTEED OPERATING RANGES Symbol Parameter Min Typ Max Unit 54, 74 4.5 5.0 5.5 V 54 – 55 25 125 74 0 25 70 VCC Supply Voltage TA Operating Ambient Temperature Range IOH Output Current — High 54, 74 –1.0 mA VOH Output Voltage — High A = B output 54, 74 5.5 V IOL Output Current — Low 54, 74 20 mA FAST AND LS TTL DATA 4-92 °C MC54/74F181 LOGIC SYMBOLS 7 8 6 5 4 3 ACTIVE-HIGH OPERANDS ACTIVE-LOW OPERANDS 2 1 23 22 21 20 19 18 2 1 23 22 21 20 19 18 A0 B0 A1 B1 A2 B2 A3 B3 Cn Cn + 4 M A=B S0 S1 G S2 S3 7 16 8 14 6 17 5 4 P F0 F1 F2 F3 9 10 11 13 15 3 A0 B0 A1 B1 A2 B2 A3 B3 Cn Cn + 4 M A=B S0 S1 G S2 S3 16 14 17 P F0 F1 F2 F3 9 10 11 13 15 VCC = PIN 24 GND = PIN 12 LOGIC DIAGRAM Cn M A0 B0 A1 B1 A2 B2 A3 B3 S0 S1 F0 F1 A=B F2 F3 FAST AND LS TTL DATA 4-93 P Cn + 4 G S2 S3 MC54/74F181 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol Parameter Min Typ Max VIH Input HIGH Voltage VIL Input LOW Voltage VIK Input Clamp Diode Voltage IOH Output Current — HIGH 250 VOH Output HIGH Voltage VOL Output LOW Voltage IIH Input HIGH Current IIL 2.0 Unit V Guaranteed Input HIGH Voltage 0.8 V Guaranteed Input LOW Voltage –1.2 V IIN = –18 mA VCC = MIN µA VOH = 5.5 V VCC = MIN, A = B 54, 74 2.5 3.4 V IOH = –1.0 mA VCC = 4.5 V 74 2.7 3.4 V IOH = –1.0 mA VCC = 4.75 V 0.5 V IOL = 20 mA VCC = MIN 0.35 20 µA VIN = 2.7 V 100 µA VIN = 7.0 V M Input – 0.6 mA A and B Inputs –1.8 mA S0 – 3 Inputs – 2.4 mA Cn Input – 3.0 mA –150 65 Input LOW Current IOS Output Short Circuit Current (Note 2) ICC Power Supply Current Test Conditions – 60 43 VCC = MAX VIN = 0.5 V VCC = MAX mA VOUT = 0 V VCC = MAX mA VCC = MAX NOTES: 1. For conditions such as MIN or MAX, use the appropriate value specified under guaranteed operating ranges. 2. Not more than one output should be shorted at a time, nor for more than 1 second. FUNCTIONAL DESCRIPTION each group of four F181 devices. Carry lookahead can be provided at various levels and offers high-speed capability over extremely long word lengths. The A = B output from the device goes HIGH when all four F outputs are HIGH and can be used to indicate logic equivalence over four bits when the unit is in the Subtract mode. The A = B output is open collector and can be wired-AND with other A = B outputs to give a comparison for more than four bits. The A = B signal can be used with the Cn + 4 signal to indicate A > B and A < B. The Function Table lists the arithmetic operations that are performed without a carry in. An incoming carry adds a one to each operation. Thus, select code LHHL generates A minus B minus 1 (2s complement notation) without a carry in and generates A minus B when a carry is applied. Because subtraction is actually performed by complementary addition (1s complement), a carry out means borrow; thus a carry is generated when there is no underflow and no carry is generated when there is underflow. As indicated, this device can be used with either active-LOW inputs producing active-LOW outputs or with active-HIGH inputs producing active-HIGH outputs. For either case the table lists the operations that are performed to the operands labeled inside the logic symbol. The F181 is a 4-bit high-speed parallel Arithmetic Logic Unit (ALU). Controlled by the four Function Select inputs (S0 – S3) and the Mode Control input (M), it can perform all the 16 possible logic operations or 16 different arithmetic operations on active-HIGH or active-LOW operands. The Function Table lists these operations. When the Mode Control input (M) is HIGH, all internal carries are inhibited and the device performs logic operations on the individual bits as listed. When the Mode Control input is LOW, the carries are enabled and the device performs arithmetic operations on the two 4-bit words. The device incorporates full internal carry lookahead and provides for either ripple carry between devices using the Cn + 4 output, or for carry lookahead between packages using the signals P (Carry Propagate) and G (Carry Generate). In the Add mode, P indicates that F is 15 or more, while G indicates that F is 16 or more. In the Subtract mode, P indicates that F is zero or less, while G indicates that F is less than zero. P and G are not affected by carry in. When speed requirements are not stringent, it can be used in a simple Ripple Carry mode by connecting the Carry output (Cn + 4) signal to the Carry input (Cn) of the next unit. For high-speed operation the device is used in conjunction with a carry lookahead circuit. One carry lookahead package is required for FAST AND LS TTL DATA 4-94 MC54/74F181 AC CHARACTERISTICS Parameter Symbol Path tPLH tPHL Cn to Cn + 4 tPLH tPHL A or B to Cn + 4 tPLH tPHL A or B to Cn + 4 tPLH tPHL Cn to F tPLH tPHL Mode 54/74F 54F 74F TA = +25°C VCC = +5.0 V CL = 50 pF TA = –55 to +125°C VCC = 5.0 V ±10% CL = 50 pF TA = 0 to +70°C VCC = 5.0 V ±10% CL = 50 pF Min Max Min Max Min Max Unit 3.0 3.0 8.5 8.0 3.0 3.0 10.5 10 3.0 3.0 9.5 9.0 ns Sum 5.0 5.0 13 12 5.0 5.0 15 14 5.0 5.0 14 13 ns Dif 5.0 5.0 14 13 5.0 5.0 16 15 5.0 5.0 15 14 ns Any 3.0 3.0 8.5 8.5 3.0 3.0 10.5 10.5 3.0 3.0 9.5 9.5 ns A or B to G Sum 3.0 3.0 7.5 7.5 3.0 3.0 9.5 9.5 3.0 3.0 8.5 8.5 ns tPLH tPHL A or B to G Dif 3.0 3.0 8.5 9.5 3.0 3.0 10.5 11.5 3.0 3.0 9.5 10.5 ns tPLH tPHL A or B to P Sum 3.0 3.0 7.0 7.5 3.0 3.0 9.0 9.5 3.0 3.0 8.0 8.5 ns tPLH tPHL A or B to P Dif 4.0 3.5 7.5 8.5 4.0 3.5 9.5 10.5 4.0 3.5 8.5 9.5 ns tPLH tPHL Ai or Bi to Fi Sum 3.0 3.0 9.0 10 3.0 3.0 11 11 3.0 3.0 10 10 ns tPLH tPHL Ai or Bi to Fi Dif 3.0 3.0 11 11 3.0 3.0 13 13 3.0 3.0 12 12 ns tPLH tPHL Any A or B to Any F Sum 4.0 4.0 10.5 10 4.0 4.0 12.5 12 4.0 4.0 11.5 11 ns tPLH tPHL Any A or B to Any F Dif 4.5 4.5 12 12 4.5 4.5 14 14 4.5 4.5 13 13 ns tPLH tPHL A or B to F Logic 4.0 4.0 9.0 10 4.0 4.0 11 12 4.0 4.0 10 11 ns tPLH tPHL A or B to A = B Dif 11 7.0 27 12.5 11 7.0 31 14.5 11 7.0 29 13.5 ns FAST AND LS TTL DATA 4-95 MC54/74F181 FUNCTION TABLE Mode Select Inputs Active-LOW Operands & Fn Outputs Active-HIGH Operands & Fn Outputs S3 S2 S1 S0 Logic (M = H) Arithmetic** (M = L) (Cn = L) Logic (M = H) Arithmetic** (M = L) (Cn = H) L L L L L L L L L L H H L H L H A AB A+B Logic 1 A minus 1 AB minus 1 AB minus 1 minus 1 A A+B AB Logic 0 A A+B A+B minus 1 L L L L H H H H L L H H L H L H A+B B A⊕B A+B A plus (A + B) AB plus (A + B) A minus B minus 1 A+B AB B A⊕B AB A plus AB (A + B) plus AB A minus B minus 1 AB minus 1 H H H H L L L L L L H H L H L H AB A⊕B B A+B A plus (A + B) A plus B AB plus (A + B) A+B A+B A⊕B B AB A plus AB A plus B (A + B) plus AB AB minus 1 H H H H H H H H L L H H L H L H Logic 0 AB AB A A plus A* AB plus A AB minus A A Logic 1 A+B A+B A A plus A* (A + B) plus A (A + B) plus A A minus 1 *Each bit is shifted to the next more significant position. **Arithmetic operations expressed in 2s complement notation. H = HIGH Voltage Level L = LOW Voltage Level FAST AND LS TTL DATA 4-96