27C512A 512K (64K x 8) CMOS EPROM PACKAGE TYPES TSOP 27C512A A complete family of packages is offered to provide the most flexibility in applications. For surface mount applications, PLCC, VSOP, TSOP or SOIC packaging is available. Tape or reel packaging is also available for PLCC or SOIC packages. A10 CE D7 D6 D5 D4 D3 21 20 19 18 17 16 15 VSS D2 D1 D0 A0 A1 A2 30 1 31 2 32 4 29 6 28 7 27 27C512A 5 8 9 10 11 12 26 25 24 23 22 13 A8 A9 A11 NC OE/VPP A10 CE O7 O6 20 19 21 15 A6 A5 A4 A3 A2 A1 A0 NC O0 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 27C512A DIP/SOIC DESCRIPTION The Microchip Technology Inc. 27C512A is a CMOS 512K bit electrically Programmable Read Only Memory (EPROM). The device is organized into 64K words by 8 bits (64K bytes). Accessing individual bytes from an address transition or from power-up (chip enable pin going low) is accomplished in less than 90 ns. This very high speed device allows the most sophisticated microprocessors to run at full speed without the need for WAIT states. CMOS design and processing enables this part to be used in systems where reduced power consumption and high reliability are requirements. 28 27 26 25 24 23 22 A7 A12 A15 NU Vcc A14 A13 PLCC 18 8 9 10 11 12 13 14 17 A15 A12 A7 A6 A5 A4 A3 16 1 2 3 4 5 6 7 3 OE/VPP A11 A9 A8 A13 A14 VCC 14 • High speed performance • CMOS Technology for low power consumption - 25 mA Active current - 30 µA Standby current • Factory programming available • Auto-insertion-compatible plastic packages • Auto ID aids automated programming • High speed express programming algorithm • Organized 64K x 8: JEDEC standard pinouts - 28-pin Dual-in-line package - 32-pin PLCC Package - 28-pin SOIC package - 28-pin TSOP package - 28-pin VSOP package - Tape and reel • Data Retention > 200 years • Available for the following temperature ranges - Commercial: 0˚C to +70˚C - Industrial: -40˚C to +85˚C - Automotive: -40˚C to +125˚C O1 O2 VSS NU O3 O4 O5 FEATURES 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC A14 A13 A8 A9 A11 OE/VPP A10 CE O7 O6 O5 O4 O3 VSOP OE/VPP A11 A9 A8 A13 A14 VCC A15 A12 A7 A6 A5 A4 A3 22 23 24 25 26 27 28 1 2 3 4 5 6 7 1996 Microchip Technology Inc. 27C512A 21 20 19 18 17 16 15 14 13 12 11 10 9 8 A10 CE O7 O6 O5 O4 O3 VSS O2 O1 O0 A0 A1 A2 DS11173E-page 1 This document was created with FrameMaker 4 0 4 27C512A 1.0 ELECTRICAL CHARACTERISTICS 1.1 Maximum Ratings* TABLE 1-1: PIN FUNCTION TABLE Name Function VCC and input voltages w.r.t. VSS ........ -0.6V to +7.25V A0-A15 VPP voltage w.r.t. VSS during programming ......................................... -0.6V to +14V CE Address Inputs Chip Enable OE/VPP Output Enable/Programming Voltage Output voltage w.r.t. VSS ............... -0.6V to VCC +1.0V O0 - O7 Data Output Storage temperature .......................... -65˚C to +150˚C VCC +5V Power Supply Ambient temp. with power applied ..... -65˚C to +125˚C VSS Ground *Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. NC No Connection; No Internal Connection NU Not Used; No External Connection is Allowed Voltage on A9 w.r.t. VSS ...................... -0.6V to +13.5V TABLE 1-2: READ OPERATION DC CHARACTERISTICS VCC = +5V ±10% Commercial: Industrial: Extended (Automotive): Parameter Tamb = 0˚C to +70˚C Tamb = -40˚C to +85˚C Tamb = -40˚C to +125˚C Part* Status Symbol Min Max Units Conditions Input Voltages all Logic "1" Logic "0" VIH VIL 2.0 -0.5 VCC+1 0.8 V V Input Leakage all ILI -10 10 µA VIN = 0 to VCC Output Voltages all Logic "1" Logic "0" VOH VOL 2.4 0.45 V V IOH = - 400 µA IOL = 2.1 mA Output Leakage all — ILO -10 10 µA VOUT = 0V to VCC Input Capacitance all — CIN — 6 pF VIN = 0V; Tamb = 25°C; f = 1 MHz Output Capacitance all — COUT — 12 pF VOUT = 0V; Tamb = 25°C; f = 1 MHz Power Supply Current, Active C I, E TTL input TTL input ICC ICC — — 25 35 mA mA VCC = 5.5V f = 1 MHz; OE/VPP = CE = VIL; IOUT = 0 mA; VIL = -0.1 to 0.8V; VIH = 2.0 to VCC; Note 1 Power Supply Current, Standby C I, E all — — — 1 2 30 mA mA µA ICC(S)TLL TTL input TTL input ICC(S)TLL CMOS input ICC(S)CMOS CE = Vcc±0.2V * Parts: C=Commercial Temperature Range; I, E=Industrial and Extended Temperature Ranges Note 1: Typical active current increases .75 mA per MHz up to operating frequency for all temperature ranges. DS11173E-page 2 1996 Microchip Technology Inc. 27C512A TABLE 1-3: READ OPERATION AC CHARACTERISTICS AC Testing Waveform: Output Load: Input Rise and Fall Times: Ambient Temperature: Parameter VIH = 2.4V and VIL = .45V; 1 TTL Load + 100 pF 10 ns Commercial: Industrial: Extended (Automotive): VOH = 2.0V and VOL = 0.8V Tamb = 0˚C to +70˚C Tamb = -40˚C to +85˚C Tamb = -40˚C to +125˚C 27C512-90* 27C512-10* 27C512-12 27C512-15 Min Max Min Max Min Max Min Max Sym Units Conditions Address to Output Delay tACC — 90 — 100 — 120 — 150 ns CE = OE/ VPP = VIL CE to Output Delay tCE — 90 — 100 — 120 — 150 ns OE/VPP = VIL OE to Output Delay tOE — 40 — 40 — 50 — 60 ns CE = VIL OE to Output High Impedance tOFF 0 35 0 35 0 40 0 45 ns Output Hold from Address, CE or OE/ VPP, whichever occurred first tOH 0 — 0 — 0 — 0 — ns *90/10 AC Testing Waveforms: VIH = 3.0V and VIL = 0V; VOH = 1.5V and VOL = 1.5V Output Load: 1 TTL Load + 30 pF FIGURE 1-1: READ WAVEFORMS VIH Address Valid Address VIL VIH CE VIL t CE(2) VIH OE VIL Outputs O0 - O7 VOH t OFF(1,3) t OH t OE(2) High Z Valid Output High Z VOL t ACC Notes: (1) tOFF is specified for OE or CE, whichever occurs first (2) OE may be delayed up to t CE - t OE after the falling edge of CE without impact on tCE (3) This parameter is sampled and is not 100% tested. 1996 Microchip Technology Inc. DS11173E-page 3 27C512A TABLE 1-4: PROGRAMMING DC CHARACTERISTICS Ambient Temperature: Tamb = 25°C ± 5°C VCC = 6.5V ± 0.25V, OE/VPP = VH = 13.0V ± 0.25V Parameter Status Symbol Min. Max. Units Input Voltages Logic “1” Logic “0” VIH VIL 2.0 -0.1 VCC+1 0.8 V V Input Leakage — ILI -10 10 µA VIN = 0V to VCC Logic “1” Logic “0” VOH VOL 2.4 — 0.45 V V IOH = -400 µA IOL = 2.1 mA VCC Current, program & verify — ICC2 — 35 mA OE/VPP Current, program — IPP2 — 25 mA A9 Product Identification — VID 11.5 12.5 V Output Voltages Conditions (See Note 1) CE = VIL Note 1: VCC must be applied simultaneously or before VPP voltage on OE/VPP and removed simultaneously or after the VPP voltage on OE/VPP. TABLE 1-5: PROGRAMMING AC CHARACTERISTICS for Program, Program Verify and Program Inhibit Modes AC Testing Waveform: VIH=2.4V and VIL=0.45V; VOH=2.0V; VOL=0.8V Ambient Temperature: 25°C ±5°C VCC = 6.5V ± 0.25V, OE/VPP = VH = 13.0V ± 0.25 V Parameter Symbol Min. Max. Units Address Set-Up Time tAS 2 — µs Data Set-Up Time tDS 2 — µs Data Hold Time tDH 2 — µs Address Hold Time tAH 0 — µs Float Delay (2) tDF 0 130 ns VCC Set-Up Time tVCS 2 — µs Program Pulse Width (1) tPW 95 105 µs CE Set-Up Time tCES 2 — µs OE Set-Up Time tOES 2 — µs OE Hold Time tOEH 2 — µs OE Recovery Time tOR 2 — µs OE /VPP Rise Time During Programming tPRT 50 — ns Remarks 100 µs typical Note 1: For express algorithm, initial programming width tolerance is 100 µs ±5%. 2: This parameter is only sampled and not 100% teted. Output float is defined as the point where data is no longer driven (see timing diagram). DS11173E-page 4 1996 Microchip Technology Inc. 27C512A FIGURE 1-2: PROGRAMMING WAVEFORMS (1) Program Verify VIH Address Stable Address VIL t AH t AS VIH Data In Stable Data VIL t DF (2) t DH t DS 6.5 V (3) Data Out Valid VCC 5.0V t CE t VCS VIH CE VIL t CES (2) t PW t OES t OEH t OR 13.0 V (3) OE/V PP t OPW VIL t PRT Notes: (1) The input timing reference level is 0.8V for VIL and 2.0V for VIH. (2) t DF and tOE are characteristics of the device but must be accommodated by the programmer. (3) VCC = 6.5V ±0.25V, V PP = VH = 13.0V ±0.5V for express programming algorithm. TABLE 1-6: MODES Operation Mode CE OE/VPP A9 O0 - O7 Read VIL VIL X DOUT Program VIL VH X DIN Program Verify VIL VIL X DOUT Program Inhibit VIH VH X High Z Standby VIH X X High Z Output Disable VIL VIH X High Z Identity VIL VIL VH Identity Code X = Don’t Care 1.2 Read Mode (See Timing Diagrams and AC Characteristics) Read Mode is accessed when a) b) For Read operations, if the addresses are stable, the address access time (tACC) is equal to the delay from CE to output (tCE). Data is transferred to the output after a delay (tOE) from the falling edge of OE/VPP. the CE pin is low to power up (enable) the chip the OE/VPP pin is low to gate the data to the output pins 1996 Microchip Technology Inc. DS11173E-page 5 27C512A 1.3 Standby Mode When this conditions are met, the supply current will drop from 25 mA to 30 µA. Since the erased state is “1” in the array, programming of “0” is required. The address to be programmed is set via pins A0 - A15 and the data to be programmed is presented to pins O0 - O7. When data and address are stable, a low going pulse on the CE line programs that location. 1.4 1.7 The standby mode is entered when the CE pin is high, and the program mode is not identified. Output Enable OE/VPP This multifunction pin eliminates bus connection in multiple bus microprocessor systems and the outputs go to high impedance when: • the OE/VPP pin is high (VIH). When a VH input is applied to this pin, it supplies the programming voltage (VPP) to the device. 1.5 Erase Mode (UV Windowed Versions) Windowed products offer the ability to erase the memory array. The memory matrix is erased to the all “1's” state as a result of being exposed to ultraviolet light. To ensure complete erasure, a dose of 15 watt-second/ cm2 is required. This means that the device window must be placed within one inch and directly underneath an ultraviolet lamp with a wavelength of 2537 Angstroms, intensity of 12,000 mW/cm2 for approximately 40 minutes. 1.6 Programming Mode The Express algorithm must be used for best results. It has been developed to improve programming yields and throughput times in a production environment. Up to 10 100-microsecond pulses are applied until the byte is verified. A flowchart of the Express algorithm is shown in Figure 1-3. Programming takes place when: a) b) c) VCC is brought to the proper voltage, OE/VPP is brought to the proper VH level, and CE line is low. Verify After the array has been programmed it must be verified to ensure all the bits have been correctly programmed. This mode is entered when all the following conditions are met: a) b) c) VCC is at the proper level, the OE/VPP pin is low, and the CE line is low. 1.8 Inhibit When programming multiple devices in parallel with different data, only CE needs to be under separate control to each device. By pulsing the CE line low on a particular device, that device will be programmed; all other devices with CE held high will not be programmed with the data (although address and data will be available on their input pins). 1.9 Identity Mode In this mode specific data is output which identifies the manufacturer as Microchip Technology Inc. and the device type. This mode is entered when Pin A9 is taken to VH (11.5V to 12.5V). The CE and OE/VPP lines must be at VIL. A0 is used to access any of the two non-erasable bytes whose data appears on O0 through O7. Pin Identity Manufacturer Device Type* Input Output H e x A0 0 O O O O O O O 7 6 5 4 3 2 1 0 VIL VIH 0 0 1 0 1 0 0 1 29 1 0 0 0 1 1 0 0 0D * Code subject to change DS11173E-page 6 1996 Microchip Technology Inc. 27C512A FIGURE 1-3: PROGRAMMING EXPRESS ALGORITHM Conditions: Tamb = 25˚C ±5˚C VCC = 6.5 ±0.25V VPP = 13.0 ±0.25V Start ADDR = First Location VCC = 6.5V VPP = 13.0V X=0 Program one 100 µs pulse Increment X Verify Byte Pass Fail No X = 10 ? Last Address? Yes Device Failed Yes No Increment Address VCC = VPP = 4.5V, 5.5V Device Passed 1996 Microchip Technology Inc. Yes All bytes = original data? No Device Failed DS11173E-page 7 27C512A NOTES: DS11173E-page 8 1996 Microchip Technology Inc. 27C512A NOTES: 1996 Microchip Technology Inc. DS11173E-page 9 27C512A NOTES: DS11173E-page 10 1996 Microchip Technology Inc. 27C512A 27C512A Product Identification System To order or to obtain information (e.g., on pricing or delivery),, please use listed part numbers, and refer to factory or listed sales offices. 27C512A – 70 I /P Package: Temperature Range: 1996 Microchip Technology Inc. L P SO TS VS = = = = = Blank = I = E = Access Time: 90 10 12 15 Device: 27C512A = = = = Plastic Leaded Chip Carrier Plastic DIP (600 Mil) Plastic SOIC (300 Mil) Thin Small Outline Package(TSOP) 8x20mm Very Small Outline Package(VSOP) 8x13.4mm 0˚C to +70˚C -40˚C to +85˚C -40˚C to +125˚C 90 ns 100 ns 120 ns 150 ns 512K (64K x 8) CMOS EPROM DS11173E-page 11 WORLDWIDE SALES & SERVICE AMERICAS ASIA/PACIFIC EUROPE Corporate Office Microchip Technology Inc. 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 602 786-7200 Fax: 602 786-7277 Technical Support: 602 786-7627 Web: http://www.microchip.com Atlanta Microchip Technology Inc. 500 Sugar Mill Road, Suite 200B Atlanta, GA 30350 Tel: 770 640-0034 Fax: 770 640-0307 Boston Microchip Technology Inc. 5 Mount Royal Avenue Marlborough, MA 01752 Tel: 508 480-9990 Fax: 508 480-8575 Chicago Microchip Technology Inc. 333 Pierce Road, Suite 180 Itasca, IL 60143 Tel: 708 285-0071 Fax: 708 285-0075 Dallas Microchip Technology Inc. 14651 Dallas Parkway, Suite 816 Dallas, TX 75240-8809 Tel: 972 991-7177 Fax: 972 991-8588 Dayton Microchip Technology Inc. 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Unit 6, The Courtyard Meadow Bank, Furlong Road Bourne End, Buckinghamshire SL8 5AJ Tel: 44 1628 850303 Fax: 44 1628 850178 France Arizona Microchip Technology SARL Zone Industrielle de la Bonde 2 Rue du Buisson aux Fraises 91300 Massy - France Tel: 33 1 69 53 63 20 Fax: 33 1 69 30 90 79 Germany Arizona Microchip Technology GmbH Gustav-Heinemann-Ring 125 D-81739 Muenchen, Germany Tel: 49 89 627 144 0 Fax: 49 89 627 144 44 Italy Arizona Microchip Technology SRL Centro Direzionale Colleone Pas Taurus 1 Viale Colleoni 1 20041 Agrate Brianza Milan Italy Tel: 39 39 6899939 Fax: 39 39 689 9883 JAPAN Microchip Technology Intl. Inc. Benex S-1 6F 3-18-20, Shin Yokohama Kohoku-Ku, Yokohama Kanagawa 222 Japan Tel: 81 45 471 6166 Fax: 81 45 471 6122 9/3/96 All rights reserved. 1996, Microchip Technology Incorporated, USA. 9/96 Printed on recycled paper. Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. The Microchip logo and name are registered trademarks of Microchip Technology Inc. All rights reserved. All other trademarks mentioned herein are the property of their respective companies. DS11173E-page 12 1996 Microchip Technology Inc.