MM54HC299/MM74HC299 8-Bit TRI-STATEÉ Universal Shift Register General Description This 8-bit TRI-STATE shift/storage register utilizes advanced silicon-gate CMOS technology. Along with the low power consumption and high noise immunity of standard CMOS integrated circuits, it has the ability to drive 15 LS-TTL loads. This circuit also features operating speeds comparable to the equivalent low power Schottky device. The MM54HC299/MM74HC299 features multiplexed inputs/outputs to achieve full 8-bit data handling in a single 20-pin package. Due to the large output drive capability and TRI-STATE feature, this device is ideally suited for interfacing with bus lines in a bus oriented system. Two function select inputs and two output control inputs are used to choose the mode of operation as listed in the function table. Synchronous parallel loading is accomplished by taking both function select lines S0 and S1 high. This places the TRI-STATE outputs in a high impedance state, which permits data applied to the input/output lines to be clocked into the register. Reading out of the register can be done while the outputs are enabled in any mode. A direct overriding CLEAR input is provided to clear the register whether the outputs are enabled or disabled. The 54HC/74HC logic family is functionally as well as pinout compatible with the standard 54LS/74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground. Features Y Y Y Y Y Typical operating frequency 40 MHz Typical propagation delay: 20 ns Low quiescent current: 80 mA maximum (74HC) High output drive for bus applications Low quiescent current: 1 mA maximum Connection Diagram Dual-In-Line Package TL/F/5207 – 1 Order Number MM54HC299 or MM74HC299 TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation TL/F/5207 RRD-B30M105/Printed in U. S. A. MM54HC299/MM74HC299 8-Bit TRI-STATE Universal Shift Register January 1988 Absolute Maximum Ratings (Notes 1 & 2) Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (VCC) Supply Voltage (VCC) DC Input Voltage (VIN) DC Output Voltage (VOUT) Clamp Diode Current (ICD) DC Output Current, per pin (IOUT) Operating Temp. Range (TA) MM74HC MM54HC DC Input or Output Voltage (VIN, VOUT) b 0.5 to a 7.0V b 1.5 to VCC a 1.5V b 0.5 to VCC a 0.5V g 20 mA g 25 mA (QA’, QH’) g 35 mA (others) Min 2 Max 6 0 VCC Units V V b 40 b 55 a 85 a 125 §C §C 1000 500 400 ns ns ns Input Rise or Fall Times VCC e 2.0V (tr, tf) VCC e 4.5V VCC e 6.0V g 70 mA DC VCC or GND Current, per pin (ICC) b 65§ C to a 150§ C Storage Temperature Range (TSTG) Power Dissipation (PD) (Note 3) 600 mW S.O. Package only 500 mW Lead Temp. (TL) (Soldering 10 seconds) 260§ C DC Electrical Characteristics (Note 4) Symbol Parameter Conditions VCC TA e 25§ C Typ 74HC TA eb40 to 85§ C 54HC TA eb55 to 125§ C Units Guaranteed Limits VIH Minimum High Level Input Voltage 2.0V 4.5V 6.0V 1.5 3.15 4.2 1.5 3.15 4.2 1.5 3.15 4.2 V V V VIL Maximum Low Level Input Voltage** 2.0V 4.5V 6.0V 0.5 1.35 1.8 0.5 1.35 1.8 0.5 1.35 1.8 V V V VOH Minimum High Level Output Voltage VIN e VIH or VIL lIOUTl s20 mA QA' & QH' Outputs A/QA thru H/QH Outputs VOL 2.0V 4.5V 6.0V 2.0 4.5 6.0 1.9 4.4 5.9 1.9 4.4 5.9 1.9 4.4 5.9 V V V VIN e VIH or VIL lIOUTl s4.0 mA lIOUTl s5.2 mA 4.5V 6.0V 4.2 5.7 3.98 5.48 3.84 5.34 3.7 5.2 V V V VIN e VIH or VIL lIOUTl s6.0 mA lIOUTl s7.8 mA 4.5V 6.0V 4.2 5.7 3.98 5.48 3.84 5.34 3.7 5.2 V V V 2.0V 4.5V 6.0V 0 0 0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 V V V Maximum Low Level Output Voltage VIN e VIH or VIL lIOUTl s20 mA QA' and QH' Outputs VIN e VIH or VIL lIOUTl s4 mA lIOUTl s5.2 mA 4.5V 6.0V 0.2 0.2 0.26 0.26 0.33 0.33 0.4 0.4 V V V VIN e VIH or VIL lIOUTl s6 mA lIOUTl s7.8 mA 4.5V 6.0V 0.2 0.2 0.26 0.26 0.33 0.33 0.4 0.4 V V V A/QA thru H/QH Outputs IIN Maximum Input Current VIN e VCC or GND 6.0V g 0.1 g 1.0 g 1.0 mA IOZ Maximum TRI-STATE Output 6.0V g 0.5 g 0.5 g 1.0 mA Leakage Currrent VOUT e VCC or GND G e VIH Maximum Quiescent Supply Current VIN e VCC or GND IOUT e 0 mA 6.0V 8.0 80 160 mA ICC Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Note 2: Unless otherwise specified all voltages are referenced to ground. Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package: b 12 mW/§ C from 65§ C to 85§ C; ceramic ‘‘J’’ package: b 12 mW/§ C from 100§ C to 125§ C. Note 4: For a power supply of 5V g 10% the worst-case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst-case VIH and VIL occur at VCC e 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst-case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used. ** VIL limits are currently tested at 20% of VCC. The above VIL specification (30% of VCC) will be implemented no later than Q1, CY’89. 2 AC Electrical Characteristics VCC e 5V, TA e 25§ C, tr e tf e 6 ns, CL e 45 pF Symbol Parameter Conditions Typ Guaranteed Limit Units fMAX Maximum Operating Frequency 40 25 MHz tPHL, tPLH Maximum Propagation Delay, Clock to QA' or QH' 25 35 ns tPHL Maximum Propagation Delay, Clear to QA' or QH' 39 40 ns tPHL, tPLH Maximum Propagation Delay, Clock to QA ± QH CL e 45 pF 25 35 ns tPHL Maximum Propagation Delay, Clear to QA ± QH CL e 45 pF 28 40 ns tPZL, tPZH Maximum Enable Time CL e 45 pF RL e 1 kX 10 35 ns tPHZ, tPLZ Maximum Disable Time CL e 5 pF RL e 1 kX 18 25 ns tS Minimum Setup Time Select 20 ns Data 20 ns tH Minimum Hold Time Select 0 ns Data 0 ns 20 ns 10 ns tW Minimum Pulse Width tREM Clear Removal Time 12 AC Electrical Characteristics CL e 50 pF, tr e tf e 6 ns unless otherwise specified Symbol Parameter Conditions VCC TA e 25§ C Typ fMAX Maximum Operating Frequency 2.0V 4.5V 6.0V tPHL, tPLH Maximum Propagation Delay, Clock to QA' or QH' 2.0V 4.5V 6.0V tPHL Maximum Propagation Delay, Clear to QA' or QH' tPHL, tPLH Maximum Propagation Delay, Clock to QA ± QH tPHL Maximum Propagation Delay, Clear to QA ± QH 74HC TA eb40 to 85§ C 54HC TA eb55 to 125§ C Units Guaranteed Limits 5 25 29 4 20 23 3.5 18 20 MHz MHz MHz 15 27 25 170 38 35 210 48 44 240 54 49 ns ns ns 2.0V 4.5V 6.0V 70 30 26 200 44 38 250 55 46 280 62 52 ns ns ns CL e 50 pF CL e 150 pF 2.0V 2.0V 65 100 170 206 210 260 240 295 ns ns CL e 50 pF CL e 150 pF 4.5V 4.5V 27 34 38 46 48 57 54 66 ns ns CL e 50 pF CL e 150 pF 6.0V 6.0V 25 31 35 39 44 49 49 55 ns ns CL e 50 pF CL e 150 pF 2.0V 2.0V 70 110 200 236 250 295 280 325 ns ns CL e 50 pF CL e 150 pF 4.5V 4.5V 30 37 44 52 55 65 62 75 ns ns CL e 50 pF CL e 150 pF 6.0V 6.0V 26 32 38 46 46 57 52 64 ns ns 3 AC Electrical Characteristic (Continued) CL e 50 pF, tr e tf e 6 ns unless otherwise specified Symbol Parameter Conditions VCC TA e 25§ C Typ tPZH, tPZL Maximum Output Enable 74HC 54HC TA eb40 to 85§ C TA eb55 to 125§ C Units Guaranteed Limits RL e 1 kX CL e 50 pF CL e 150 pF 2.0V 2.0V 70 90 160 220 200 275 225 310 ns ns CL e 50 pF CL e 150 pF 4.5V 4.5V 22 30 32 44 40 55 45 62 ns ns CL e 50 pF CL e 150 pF 6.0V 6.0V 19 24 28 47 34 47 38 51 ns ns tPHZ, tPLZ Maximum Output Disable Time RL e 1 kX CL e 50 pF 2.0V 4.5V 6.0V 70 22 19 160 32 28 200 40 34 225 45 38 ns ns ns tS Minimum Setup Time, Data Select SL or SR 2.0V 4.5V 6.0V 100 20 17 125 25 21 140 28 25 ns ns ns tH Minimum Hold Time, Data Select SL or SR 2.0V 4.5V 6.0V 0 0 0 0 0 0 0 0 0 ns ns ns tREM Minimum Clear Removal Time 2.0V 4.5V 6.0V 10 10 10 10 10 10 10 10 10 ns ns ns tW Minimum Pulse Width, Clock and Clear 2.0V 4.5V 6.0V 100 20 17 125 25 21 140 28 25 ns ns ns tr, tf Maximum Input Rise and Fall Time 2.0V 4.5V 6.0V 1000 500 400 1000 500 400 100 500 400 ns ns ns 2.0V 4.5V 6.0V 60 12 10 75 15 13 90 18 15 ns ns ns tTHL, tTLH Maximum Output Rise and Fall Time, Clock CPD Power Dissipation Capacitance Outputs Enabled Outputs Disabled 240 110 pF pF CIN Maximum Input Capacitance Capacitance 5 10 10 10 pF COUT Maximum TRI-STATE Output Capacitance 15 20 20 20 pF Note 5: CPD determines the no load dynamic power consumption, PD e CPD VCC2 f a ICC VCC, and the no load dynamic current consumption, IS e CPD VCC f a ICC. Function Table Inputs Mode Function Clear Select Output Control S1 S0 G1 ² G2 ² Inputs/Outputs Outputs Clock Serial A/QA B/QB C/QC D/QD E/QE F/QF G/QG H/QH QA’ QH’ SL SR Clear L L X L L X L L L L X X X X X X L L L L L L L L L L L L L L L L L L L L Hold H H L X L X L L L L X L or H X X X X QA0 QA0 QB0 QB0 QC0 QC0 QD0 QD0 QE0 QE0 QF0 QF0 QG0 QG0 Shift Right H H L L H H L L L L X X H L H L QAn QAn QBn QBn QCn QCn QDn QDn QEn QEn QFn QFn Shift Left H H H H L L L L L L H L X X QBn QBn QCn QCn QDn QDn QEn QEn QFn QFn QGn QGn QHn QHn H L QBn QBn H L Load H H H X X u u u u u X X a b c d e f g h a h QH0 QA0 QH0 QH0 QA0 QH0 QGn H QGN QGn L QGN ² When one or both controls are high the eight input/output terminals are disabled to the high-impedance state; however, sequential operation or clearing of the register is not affected. 4 Logic Diagram TL/F/5207 – 2 5 MM54HC299/MM74HC299 8-Bit TRI-STATE Universal Shift Register Physical Dimensions inches (millimeters) Order Number MM54HC299J or MM74HC299J NS Package J20A LIFE SUPPORT POLICY Order Number MM74HC299N NS Package N20A NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 1111 West Bardin Road Arlington, TX 76017 Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Europe Fax: (a49) 0-180-530 85 86 Email: cnjwge @ tevm2.nsc.com Deutsch Tel: (a49) 0-180-530 85 85 English Tel: (a49) 0-180-532 78 32 Fran3ais Tel: (a49) 0-180-532 93 58 Italiano Tel: (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd. 13th Floor, Straight Block, Ocean Centre, 5 Canton Rd. Tsimshatsui, Kowloon Hong Kong Tel: (852) 2737-1600 Fax: (852) 2736-9960 National Semiconductor Japan Ltd. Tel: 81-043-299-2309 Fax: 81-043-299-2408 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. This datasheet has been download from: www.datasheetcatalog.com Datasheets for electronics components.