Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC Features e·MMC™ Memory MTFC4GMVEA-4M IT, MTFC8GLVEA-4M IT, MTFC16GJVEC-4M IT, MTFC32GJVED-4M IT, MTFC64GJVDN-4M IT Features Figure 1: Micron e·MMC Device • MultiMediaCard (MMC) controller and NAND Flash • 153- or 169-ball WFBGA/VFBGA/LFBGA (RoHS 6/6compliant) • VCC: 2.7–3.6V • VCCQ (dual voltage): 1.65–1.95V; 2.7–3.6V • Temperature ranges – Industrial temperature: –40˚C to +85˚C – Storage temperature: –40˚C to +85˚C • Typical current consumption – Standby current: 120µA for 4GB–16GB; 140µA for 32GB; 160µA for 64GB – Active current (RMS): 80mA (4GB–64GB) MMC power NAND Flash power MMC controller MMC interface NAND Flash MMC-Specific Features • JEDEC/MMC standard version 4.41-compliant (JEDEC Standard No. 84-A441) – SPI mode not supported (see www.jedec.org/sites/default/files/ docs/JESD84-A441.pdf) – Advanced 11-signal interface – x1, x4, and x8 I/Os, selectable by host – MMC mode operation – Command classes: class 0 (basic); class 2 (block read); class 4 (block write); class 5 (erase); class 6 (write protection); class 7 (lock card) – MMCplus™ and MMCmobile™ protocols – Temporary write protection – 52 MHz clock speed (MAX) – Boot operation (high-speed boot) – Sleep mode – Replay-protected memory block (RPMB) – Secure erase and trim – Hardware reset signal – Multiple partitions with enhanced attribute – Permanent and power-on write protection – Double data rate (DDR) function – High-priority interrupt (HPI) PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN MMC-Specific Features (Continued) – Enhanced reliable write – Configurable reliability settings – Background operation – Fully enhanced configurable – Backward-compatible with previous MMC modes • ECC and block management implemented 1 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC Features e·MMC Performance Table 1: MLC Partition Performance Part Number MTFC4GMVEA-4M IT MTFC8GLVEA-4M IT MTFC16GJVEC-4M IT MTFC32GJVED-4M IT MTFC64GJVDN-4M IT Units Sequential write 13.5 20 MB/s Sequential read 44 44 MB/s Condition Note: 1. Sequential access of 1MB chunk. Additional performance data, such as power consumption or timing for different device modes, will be provided in a separate document upon customer request. Ordering Information Table 2: Ordering Information Base Part Number Density Package NAND Flash Type Shipping Media MTFC4GMVEA-4M IT 4GB 153-ball WFBGA 11.5mm x 13.0mm x 0.8mm 2 x 16Gb, MLC, 25nm Tray MTFC8GLVEA-4M IT 8GB 153-ball WFBGA 11.5mm x 13.0mm x 0.8mm 2 x 32Gb, MLC, 25nm Tape and reel Tape and reel MTFC16GJVEC-4M IT 16GB 169-ball WFBGA 14.0mm x 18.0mm x 0.8mm 2 x 64Gb, MLC, 25nm MTFC32GJVED-4M IT 32GB 169-ball VFBGA 14.0mm x 18.0mm x 1.0mm 4 x 64Gb, MLC, 25nm 169-ball LFBGA 14.0mm x 18.0mm x 1.4mm 8 x 64Gb, MLC, 25nm MTFC64GJVDN-4M IT 64GB PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN 2 Tray Tray Tape and reel Tray Tape and reel Tray Tape and reel Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC Features Part Numbering Information Micron®e·MMC memory devices are available in different configurations and densities. Verify valid part numbers by using Micron’s part catalog search at www.micron.com. To compare features and specifications by device type, visit www.micron.com/products. Contact the factory for devices not found. Figure 2: Marketing Part Number Chart MT FC 4G M V x EA - 0 Micron Technology M WT Production Status Blank = Production Product Family ES = Engineering samples FC = NAND Flash + controller MS = Mechanical samples NAND Flash Density Operating Temperature Range Blank = 0°C to 70°C WT = Standard (–25°C to +85°C) IT = Extended (–40°C to +85)°C 2G = 2GB 4G = 4GB 8G = 8GB 16G = 16GB 32G = 32GB SLC Enhanced Area 64G = 64GB F = 40% M = 100% NAND Flash Component Mark Device Maximum Boot Size J MLC 64Gb, x8, 3.3V (25nm) 0 = 1MB L MLC 32Gb, x8, 3.3V (25nm) 1 = 2MB M MLC 16Gb, x8, 3.3V (25nm) 2 = 4MB 3 = 8MB Controller Revision 4 = 16MB Mark (Rev.) Controller ID T Enhanced Package Codes (Pb-free) V Combo DN = 169 LFBGA 14mm x 18mm x 1.4mm DQ = 100 LFBGA 14mm x 18mm x 1.4mm EA = 153 WFBGA 11.5mm x 13mm x 0.8mm EC = 169 WFBGA 14mm x 18mm x 0.8mm ED = 169 VFBGA 14mm x 18mm x 1.0mm Reserved for Future Use Note: 1. Not all combinations are necessarily available. For a list of available devices or for further information on any aspect of these products, please contact your nearest Micron sales office. PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN 3 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC General Description General Description Micron e·MMC is a communication and mass data storage device that includes a MultiMediaCard (MMC) interface, a NAND Flash component, and a controller on an advanced 11-signal bus, which is compliant with the MMC system specification. Its cost per bit, small package sizes, and high reliability make it an ideal choice for industrial applications like infrastructure and networking equipment, PC and servers, a variety of other industrial products. The nonvolatile e·MMC draws no power to maintain stored data, delivers high performance across a wide range of operating temperatures, and resists shock and vibration disruption. PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN 4 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC Signal Descriptions Signal Descriptions Table 3: Signal Descriptions Symbol Type Description CLK Input Clock: Each cycle of the clock directs a transfer on the command line and on the data line(s). The frequency can vary between the minimum and the maximum clock frequency. RST_n Input Reset: The RST_n signal is used by the host for resetting the device, moving the device to the preidle state. By default, the RST_n signal is temporarily disabled in the device. The host must set ECSD register byte 162, bits[1:0] to 0x1 to enable this functionality before the host can use it. CMD I/O Command: This signal is a bidirectional command channel used for command and response transfers. The CMD signal has two bus modes: open-drain mode and push-pull mode (see Operating Modes). Commands are sent from the MMC host to the device, and responses are sent from the device to the host. DAT[7:0] I/O Data I/O: These are bidirectional data signals. The DAT signals operate in push-pull mode. By default, after power-on or assertion of the RST_n signal, only DAT0 is used for data transfer. The MMC controller can configure a wider data bus for data transfer either using DAT[3:0] (4-bit mode) or DAT[7:0] (8-bit mode). e·MMC includes internal pull-up resistors for data lines DAT[7:1]. Immediately after entering the 4-bit mode, the device disconnects the internal pull-up resistors on the DAT[3:1] lines. Upon entering the 8-bit mode, the device disconnects the internal pull-ups on the DAT[7:1] lines. VCC Supply VCC: NAND interface (I/F) I/O and NAND Flash power supply. VCCQ Supply VCCQ: e·MMC controller core and e·MMC I/F I/O power supply. VSS1 Supply VSS: NAND I/F I/O and NAND Flash ground connection. VSSQ1 Supply VSSQ: e·MMC controller core and e·MMC I/F ground connection. VDDI Internal voltage node: At least a 0.1μF capacitor is required to connect VDDI to ground. A 1μF capacitor is recommended. Do not tie to supply voltage or ground. NC – No connect: No internal connection is present. RFU – Reserved for future use: No internal connection is present. Leave it floating externally. Note: 1. VSS and VSSQ are connected internally. PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN 5 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC 153-Ball Signal Assignments 153-Ball Signal Assignments Figure 3: 153-Ball FBGA (top view, ball down) 1 2 3 6 7 8 9 10 11 12 13 14 A NC NC DAT0 RFU RFU NC NC NC NC NC NC NC B NC DAT3 DAT4 DAT5 DAT6 DAT7 NC NC NC NC NC NC NC NC C NC VDDI NC VSSQ RFU NC NC NC NC NC NC NC NC D NC NC NC NC NC NC NC E NC NC NC RFU RFU NC NC NC F NC NC NC VCC RFU NC NC NC G NC NC RFU VSS RFU NC NC NC H NC NC NC RFU VSS NC NC NC J NC NC NC RFU VCC NC NC NC K NC NC NC RST_n RFU NC NC NC L NC NC NC NC NC NC M NC NC NC VCCQ CMD CLK NC NC NC NC NC NC NC NC N NC VSSQ NC VCCQ VSSQ NC NC NC NC NC NC NC NC NC P NC NC VCCQ VSSQ VCCQ VSSQ RFU NC NC RFU NC NC NC NC Notes: 4 5 DAT1 DAT2 VCCQ VCC RFU VSS RFU RFU VSS RFU VCC 1. Some test pads on the device are not shown. They are not solder balls and are for Micron internal use only. 2. Some previous versions of the JEDEC product or mechanical specification had defined reserved for future use (RFU) balls as no connect (NC) balls. NC balls assigned in the previous specifications could have been connected to ground on the system board. To enable new feature introduction, some of these balls are assigned as RFU in the v4.4 mechanical specification. Any new PCB footprint implementations should use the new ball assignments and leave the RFU balls floating on the system board. PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN 6 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC 169-Ball Signal Assignments 169-Ball Signal Assignments Figure 4: 169-Ball FBGA (top view, ball down) 1 2 3 A 4 5 7 8 9 10 11 12 1 NC 13 14 NC NC NC NC B 6 NC C D NC NC E F G H NC J NC DAT3 DAT4 K NC VDDI NC VSSQ L NC NC NC NC M NC NC NC RFU N NC NC NC P NC NC R NC T RFU NC NC NC NC NC NC NC DAT5 DAT6 DAT7 NC NC NC NC NC NC NC NC RFU NC NC NC NC NC NC NC NC NC NC NC RFU NC NC NC VCC RFU NC NC NC RFU VSS RFU NC NC NC NC NC RFU VSS NC NC NC NC NC NC RFU VCC NC NC NC U NC NC NC RST_n RFU NC NC NC V NC NC NC NC NC NC W NC NC NC VCCQ CMD CLK NC NC NC NC NC NC NC NC Y NC VSSQ NC VCCQ VSSQ NC NC NC NC NC NC NC NC NC AA NC NC VCCQ VSSQ VCCQ VSSQ RFU NC NC RFU NC NC NC NC NC DAT0 DAT1 DAT2 RFU VCCQ VCC RFU VSS RFU RFU VSS RFU VCC AB AC AD NC AE NC AF NC AG NC AH Notes: NC NC NC NC 1. Empty balls do not denote actual solder balls; they are position indicators only. PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN 7 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC 169-Ball Signal Assignments 2. Some test pads on the device are not shown. They are not solder balls and are for Micron internal use only. 3. Some previous versions of the JEDEC product or mechanical specification had defined reserved for future use (RFU) balls as no connect (NC) balls. NC balls assigned in the previous specifications could have been connected to ground on the system board. To enable new feature introduction, some of these balls are assigned as RFU in the v4.4 mechanical specification. Any new PCB footprint implementations should use the new ball assignments and leave the RFU balls floating on the system board. PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN 8 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC Package Dimensions Package Dimensions Figure 5: 153-Ball WFBGA – 11.5mm x 13.0mm x 0.8mm (Package Code: EA) Seating plane A 153X Ø0.30 Dimensions apply to solder balls postreflow on Ø0.30 SMD ball pads. 0.08 A Ball A1 ID (covered by SR) Ball A1 ID 14 12 10 8 6 4 2 13 11 9 7 5 3 1 A B C D E F G H J K L M N P 6.5 CTR 13 ±0.1 0.5 TYP 0.5 TYP 0.7 ±0.1 6.5 CTR 0.17 MIN 11.5 ±0.1 Note: 1. Dimensions are in millimeters. PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN 9 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC Package Dimensions Figure 6: 169-Ball WFBGA – 14.0mm x 18.00mm x 0.8mm (Package Code: EC) Seating plane A 169X Ø0.3 Dimensions apply to solder balls post-reflow on Ø0.30 SMD OSP ball pads. 0.08 A Ball A1 ID Ball A1 ID 14 12 10 8 6 4 2 13 11 9 7 5 3 1 A B C D E F G H J K L M N P R T U V W Y AA AB AC AD AE AF AG AH 13.5 CTR 6.5 CTR 18 ±0.1 0.7 ±0.1 0.5 TYP 0.5 TYP 6.5 CTR 0.17 MIN 14 ±0.1 Note: 1. Dimensions are in millimeters. PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN 10 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC Package Dimensions Figure 7: 169-Ball VFBGA – 14.0mm x 18.00mm x 1.0mm (Package Code: ED) Seating plane A 169X Ø0.3 Dimensions apply to solder balls post-reflow on Ø0.30 SMD ball pads. 0.08 A Ball A1 ID Ball A1 ID 14 12 10 8 6 4 2 13 11 9 7 5 3 1 A B C D E F G H J K L M N P R T U V W Y AA AB AC AD AE AF AG AH 13.5 CTR 6.5 CTR 18 ±0.1 0.5 TYP 0.9 ±0.1 0.5 TYP 6.5 CTR 0.17 MIN 14 ±0.1 Note: 1. Dimensions are in millimeters. PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN 11 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC Package Dimensions Figure 8: 169-Ball LFBGA – 14.0mm x 18.00mm x 1.4mm (Package Code: DN) Seating plane A 169X Ø0.3 Dimensions apply to solder balls postreflow on Ø0.30 SMD ball pads. 0.08 A Ball A1 ID (covered by SR) Ball A1 ID 14 12 10 8 6 4 2 13 11 9 7 5 3 1 A B C D E F G H J K L M N P R T U V W Y AA AB AC AD AE AF AG AH 13.5 CTR 6.5 CTR 18 ±0.1 0.5 TYP 1.3 ±0.1 0.5 TYP 6.5 CTR 0.16 MIN 14 ±0.1 Note: 1. Dimensions are in millimeters. PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN 12 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC Architecture Architecture Figure 9: e·MMC Functional Block Diagram e·MMC MMC controller RST_n VDDI VCCQ Registers CMD CLK VCC DAT[7:0] OCR CSD RCA CID ECSD DSR VSS1 VSSQ1 NAND Flash Note: 1. VSS and VSSQ are internally connected. MMC Protocol Independent of NAND Flash Technology The MMC specification defines the communication protocol between a host and a device. The protocol is independent of the NAND Flash features included in the device. The device has an intelligent on-board controller that manages the MMC communication protocol. The controller also handles block management functions such as logical block allocation and wear leveling. These management functions require complex algorithms and depend entirely on NAND Flash technology (generation or memory cell type). The device handles these management functions internally, making them invisible to the host processor. Defect and Error Management Micron e·MMC incorporates advanced technology for defect and error management. If a defective block is identified, the device completely replaces the defective block with one of the spare blocks. This process is invisible to the host and does not affect data space allocated for the user. The device also includes a built-in error correction code (ECC) algorithm to ensure that data integrity is maintained. To make the best use of these advanced technologies and ensure proper data loading and storage over the life of the device, the host must exercise the following precautions: • Check the status after WRITE, READ, and ERASE operations. • Avoid power-down during WRITE and ERASE operations. PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN 13 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC CID Register CID Register The card identification (CID) register is 128 bits wide. It contains the device identification information used during the card identification phase as required by e·MMC protocol. Each device is created with a unique identification number. Table 4: CID Register Field Parameters Name Field Width CID Bits CID Value Manufacturer ID MID 8 [127:120] FEh Reserved – 6 [119:114] – Card/BGA CBX 2 [113:112] 01h OEM/application ID OID 8 [111:104] – Product name PNM 48 [103:56] MMC04G MMC08G MMC16G MMC32G MMC64G Product revision PRV 8 [55:48] – Product serial number PSN 32 [47:16] – Manufacturing date MDT 8 [15:8] – CRC7 checksum CRC 7 [7:1] – – 1 0 – Not used; always 1 PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN 14 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC CSD Register CSD Register The card-specific data (CSD) register provides information about accessing the device contents. The CSD register defines the data format, error correction type, maximum data access time, and data transfer speed, as well as whether the DS register can be used. The programmable part of the register (entries marked with W or E in the following table) can be changed by the PROGRAM_CSD (CMD27) command. Table 5: CSD Register Field Parameters Name Cell Width Type1 Field CSD Bits CSD Value CSD structure CSD_STRUCTURE 2 R [127:126] 03h System specification version SPEC_VERS 4 R [125:122] 4h 2 TBD [121:120] – Reserved2 – Data read access time 1 TAAC 8 R [119:112] 4Fh Data read access time 2 in CLK cycles (NSAC × 100) NSAC 8 R [111:104] 01h Maximum bus clock frequency TRAN_SPEED 8 R [103:96] 32h Card command classes CCC 12 R [95:84] 0F5h Maximum read data block length READ_BL_LEN 4 R [83:80] 9h Partial blocks for reads supported READ_BL_PARTIAL 1 R 79 0h Write block misalignment WRITE_BLK_MISALIGN 1 R 78 0h Read block misalignment READ_BLK_MISALIGN 77 R 77 0h DS register implemented DSR_IMP 1 R 76 1h 2 R [75:74] – Reserved – Device size C_SIZE 12 R [73:62] FFFh Maximum read current at VDD,min VDD_R_CURR_MIN 3 R [61:59] 7h Maximum read current at VDD,max VDD_R_CURR_MAX 3 R [58:56] 7h Maximum write current at VDD,min VDD_W_CURR_MIN 3 R [55:53] 7h Maximum write current at VDD,max VDD_W_CURR_MAX 3 R [52:50] 7h Device size multiplier C_SIZE_MULT 3 R [49:47] 7h Erase group size ERASE_GRP_SIZE 5 R [46:42] 1Fh Erase group size multiplier ERASE_GRP_MULT 5 R [41:37] 1Fh Write protect group size WP_GRP_SIZE 5 R [36:32] 07h MTFC4GMVEA-4M IT MTFC8GLVEA-4M IT 0Fh MTFC16GJVEC-4M IT, MTFC32GJVED-4M IT, MTFC64GJVDN-4M IT 1Fh Write protect group enable WP_GRP_ENABLE 1 R 31 1h Manufacturer default ECC DEFAULT_ECC 2 R [30:29] 0h Write-speed factor R2W_FACTOR 3 R [28:26] 2h Maximum write data block length WRITE_BL_LEN 4 R [25:22] 9h Partial blocks for writes supported WRITE_BL_PARTIAL 1 R 21 0h PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN 15 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC CSD Register Table 5: CSD Register Field Parameters (Continued) Name Cell Width Type1 Field Reserved – CSD Bits CSD Value 4 R [20:17] – Content protection application CONTENT_PROT_APP 1 R 16 0h File-format group FILE_FORMAT_GRP 1 R/W 15 0h Copy flag (OTP) COPY 1 R/W 14 0h Permanent write protection PERM_WRITE_PROTECT 1 R/W 13 0h Temporary write protection TMP_WRITE_PROTECT 1 R/W/E 12 0h File format FILE_FORMAT 2 R/W [11:10] 0h ECC ECC 2 R/W/E [9:8] 0h CRC CRC 7 R/W/E [7:1] – 1 – 0 1h Not used; always 1 – Notes: 1. R = Read-only R/W = One-time programmable and readable R/W/E = Multiple writable with value kept after a power cycle, assertion of the RST_n signal, and any CMD0 reset, and readable TBD = To be determined 2. Reserved bits should be read as 0. PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN 16 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC ECSD Register ECSD Register The 512-byte extended card-specific data (ECSD) register defines device properties and selected modes. The most significant 320 bytes are the properties segment. This segment defines device capabilities and cannot be modified by the host. The lower 192 bytes are the modes segment. The modes segment defines the configuration in which the device is working. The host can change the properties of modes segments using the SWITCH command. Table 6: ECSD Register Field Parameters Name Field Size (Bytes) Cell Type1 ECSD Bytes ECSD Value – 7 – [511:505] – 1 R 504 1h Properties Segment Reserved2 Supported command sets S_CMD_SET HPI features HPI_FEATURES 1 R 503 3h Background operations support BKOPS_SUPPORT 1 R 502 1h 255 – [501:247] – Reserved – Background operations status BKOPS_STATUS 1 R 246 0h Number of correctly programmed sectors CORRECTLY_PRG_ SECTORS_NUM 4 R [245:242] – 1 R 241 78h First initialization time after par- INI_TIMEOUT_PA titioning (first CMD1 to device ready) Reserved MTFC4GMVEA-4M IT MTFC8GLVEA-4M IT F4h MTFC16GJVEC-4M IT F6h MTFC32GJVED-4M IT, MTFC64GJVDN-4M IT FFh – 1 – 240 – Power class for 52 MHz, DDR at 3.6V3 PWR_CL_DDR_52_360 1 R 239 0h Power class for 52 MHz, DDR at 1.95V3 PWR_CL_DDR_52_195 1 R 238 0h Reserved 2 – [237:236] – Minimum write performance for MIN_PERF_DDR_W_8_52 8-bit at 52 MHz in DDR mode – 1 R 235 0h Minimum read performance for 8-bit at 52 MHz in DDR mode MIN_PERF_DDR_R_8_52 1 R 234 0h – 1 – 233 – 1 R 232 06h Reserved TRIM multiplier TRIM_MULT MTFC4GMVEA-4M IT, MTFC8GLVEA-4M IT MTFC16GJVEC-4M IT, MTFC32GJVED-4M IT, MTFC64GJVDN-4M IT Secure feature support PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN SEC_FEATURE_SUPPORT 0Fh 1 17 R 231 15h Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC ECSD Register Table 6: ECSD Register Field Parameters (Continued) Name SECURE ERASE multiplier Field SEC_ERASE_MULT MTFC4GMVEA-4M IT, MTFC8GLVEA-4M IT Size (Bytes) Cell Type1 ECSD Bytes ECSD Value 1 R 230 02h MTFC16GJVEC-4M IT, MTFC32GJVED-4M IT, MTFC64GJVDN-4M IT SECURE TRIM multiplier SEC_TRIM_MULT MTFC4GMVEA-4M IT, MTFC8GLVEA-4M IT 06h 1 R 229 MTFC16GJVEC-4M IT, MTFC32GJVED-4M IT, MTFC64GJVDN-4M IT Boot information BOOT_INFO Reserved – Boot partition size BOOT_SIZE_MULT Access size ACC_SIZE MTFC4GMVEA-4M IT, MTFC8GLVEA-4M IT 09h 1 R 228 7h 1 – 227 – 1 R 226 80h 1 R 225 06h MTFC16GJVEC-4M IT, MTFC32GJVED-4M IT, MTFC64GJVDN-4M IT High-capacity erase unit size HC_ERASE_GRP_SIZE MTFC4GMVEA-4M IT, MTFC8GLVEA-4M IT 03h 07h 1 R 224 MTFC16GJVEC-4M IT, MTFC32GJVED-4M IT, MTFC64GJVDN-4M IT 08h 10h High-capacity erase timeout ERASE_TIMEOUT_MULT 1 R 223 01h Reliable write-sector count REL_WR_SEC_C 1 R 222 01h High-capacity write protect group size HC_WP_GRP_SIZE 1 R 221 01h MTFC4GMVEA-4M IT MTFC8GLVEA-4M IT, MTFC16GJVEC-4M IT 02h MTFC32GJVED-4M IT 04h MTFC64GJVDN-4M IT 08h Sleep current (VCC) S_C_VCC 1 R 220 08h Sleep current (VCCQ) S_C_VCCQ 1 R 219 08h 1 – 218 – 1 R 217 10h 1 – 216 – 4 R Reserved Sleep/awake timeout – S_A_TIMEOUT Reserved Sector count PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN – SEC_COUNT MTFC4GMVEA-4M IT [215:212] 0070C000h MTFC8GLVEA-4M IT 00E88000h MTFC16GJVEC-4M IT 01D30000h MTFC32GJVED-4M IT 03B20000h MTFC64GJVDN-4M IT 07700000h 18 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC ECSD Register Table 6: ECSD Register Field Parameters (Continued) Field Size (Bytes) Cell Type1 ECSD Bytes ECSD Value – 1 – 211 – Minimum write performance for MIN_PERF_W_8_52 8-bit at 52 MHz 1 R 210 08h Minimum read performance for 8-bit at 52 MHz 1 R 209 08h Minimum write performance for MIN_PERF_W_8_26_4_52 8-bit at 26 MHz and 4-bit at 52 MHz 1 R 208 08h Minimum read performance for 8-bit at 26 MHz and 4-bit at 52 MHz 1 R 207 08h Minimum write performance for MIN_PERF_W_4_26 4-bit at 26 MHz 1 R 206 08h Minimum read performance for 4-bit at 26 MHz 1 R 205 08h Name Reserved MIN_PERF_R_8_52 MIN_PERF_R_8_26_4_52 MIN_PERF_R_4_26 Reserved 1 – 204 – Power class for 26 MHz at 3.6V3 PWR_CL_26_360 – 1 R 203 00h Power class for 52 MHz at 3.6V3 PWR_CL_52_360 1 R 202 00h Power class for 26 MHz at 1.95V3 PWR_CL_26_195 1 R 201 00h Power class for 52 MHz at 1.95V3 PWR_CL_52_195 1 R 200 00h Partition switching timing PARTITION_SWITCH_TIME 1 R 199 1h Out-of-interrupt busy timing OUT_OF_INTERRUPT_TIME 1 R 198 02h 1 – 197 – 1 R 196 07h 1 – 195 – 1 R 194 2h 1 – 193 – EXT_CSD_REV 1 R 192 5h CMD_SET 1 R/W/E_ P 191 0h 1 – 190 – 1 R 189 0h 1 – 188 – 1 R/W/E_ P 187 0h 1 – 186 – 1 R/W/E_ P 185 0h 1 – 184 – Reserved Card type – CARD_TYPE Reserved CSD structure version – CSD_STRUCTURE Reserved Extended CSD revision – Modes Segment Command set Reserved Command set revision – CMD_SET_REV Reserved Power class – POWER_CLASS Reserved High-speed interface timing Reserved PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN – HS_TIMING – 19 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC ECSD Register Table 6: ECSD Register Field Parameters (Continued) Name Bus width mode Field BUS_WIDTH Reserved Erased memory content – ERASED_MEM_CONT Reserved – Size (Bytes) Cell Type1 ECSD Bytes ECSD Value 1 W/E_P 183 0h 1 – 182 – 1 R 181 0h 1 – 180 – Partition configuration PARTITION_CONFIG 1 R/W/E, R/W/E_ P 179 0h Boot configuration protection BOOT_CONFIG_PROT 1 R/W, R/W/C_ P 178 0h Boot bus width BOOT_BUS_WIDTH 1 R/W/E 177 0h 1 – 176 – 1 R/W/E_ P 175 00h 1 – 174 – 1 R/W, R/W/C_ P 173 0h 1 – 172 – 1 R/W, R/W/ C_P, R/W/E_ P 171 0h 1 – 170 – R/W 169 0h Reserved – High-density erase group defini- ERASE_GROUP_DEF tion Reserved – Boot area write protection regis- BOOT_WP ter Reserved User write protection register – USER_WP Reserved – Firmware configuration FW_CONFIG 1 RPMB size RPMB_SIZE_MULT 1 R 168 1h Write reliability setting register3 WR_REL_SET 1 R/W 167 00h4 Write reliability parameter regis- WR_REL_PARAM ter 1 R 166 05h 1 – 165 – Manually start background oper- BKOPS_START ations 1 W/E_P 164 – Enable background operations handshake BKOPS_EN 1 R/W 163 0h Hardware reset function RST_n_FUNCTION 1 R/W 162 0h HPI management HPI_MGMT 1 R/W/E_ P 161 0h Partitioning support PARTITIONING_SUPPORT 1 R 160 3h Reserved PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN – 20 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC ECSD Register Table 6: ECSD Register Field Parameters (Continued) Field Size (Bytes) Cell Type1 ECSD Bytes ECSD Value MAX_ENH_SIZE_MULT MTFC4GMVEA-4M IT 3 R [159:157] 0001C3h Name Maximum enhanced area size MTFC8GLVEA-4M IT 0001D1h MTFC16GJVEC-4M IT 0001D3h MTFC32GJVED-4M IT 0001D9h MTFC64GJVDN-4M IT 0001DCh Partitions attribute PARTITIONS_ATTRIBUTE 1 R/W 156 0h Partitioning setting PARTITION_SETTING_COMPLETED 1 R/W 155 0h General-purpose partition size GP_SIZE_MULT 12 R/W [154:143] 0h Enhanced user data area size ENH_SIZE_MULT 3 R/W [142:140] 0h 4 R/W [139:136] 0h 1 – 135 – 1 R/W 134 0h 134 – [133:0] – Enhanced user data start address ENH_START_ADDR Reserved – Bad block management mode SEC_BAD_BLK_MGMNT Reserved – Notes: 1. R = Read-only R/W = One-time programmable and readable R/W/E = Multiple writable with the value kept after a power cycle, assertion of the RST_n signal, and any CMD0 reset, and readable R/W/C_P = Writable after the value is cleared by a power cycle and assertion of the RST_n signal (the value not cleared by CMD0 reset) and readable R/W/E_P = Multiple writable with the value reset after a power cycle, assertion of the RST_n signal, and any CMD0 reset, and readable W/E_P = Multiple writable with the value reset after power cycle, assertion of the RST_n signal, and any CMD0 reset, and not readable TBD = To be determined 2. Reserved bits should be read as 0. 3. Micron has tested power failure under best application knowledge conditions with positive results. Customers may request a dedicated test for their specific application condition. 4. Set at 00h when shipped for optimized write performance; can be set to 1Fh to enable protection on previously written data if power failure occurs during a WRITE operation. This byte is one-time programmable. PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN 21 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC DC Electrical Specifications – Device Power DC Electrical Specifications – Device Power The device current consumption for various device configurations is defined in the power class fields of the ECSD register. VCC is used for the NAND Flash device and its interface voltage; V CCQ is used for the controller and the e·MMC interface voltage. A CREG capacitor must be connected to the VDDI terminal to stabilize regulator output on the system. Figure 10: Device Power Diagram VCC VCCQ Core regulator NAND control signals CLK CMD Core logic block NAND Flash NAND I/O block CREG MMC I/O block VDDI NAND data bus DAT[7:0] MMC controller Note: Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not guaranteed. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Table 7: Absolute Maximum Ratings Parameters Symbol Min Max Unit Voltage input VIN –0.6 4.6 V VCC supply VCC –0.6 4.6 V VCCQ supply VCCQ –0.6 4.6 V Storage temperature TSTG –40 85 °C Note: 1. Voltage on any pin relative to VSS. PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN 22 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC DC Electrical Specifications – Device Power Table 8: Operating Conditions Parameters Supply voltage (controller and I/O) Supply voltage (NAND) Symbol Min Typ Max Unit VCCQ 1.65 – 1.95 V 2.70 – 3.6 3.6 V VCC 2.70 – Supply power-on for 3.3V tPRUH – – 35 ms Supply power-on for 1.8V tPRUL – – 25 ms VDDI capacitance value CREG1 0.1 – – µF Operating temperature TA –40 – 85 ºC Note: 1. CREG is used to stabilize the internal regulator output to controller core logic voltages. Micron recommends using the following capacitor values: CVCC (capacitor for VCC) = 4.3µF. CVCCQ (capacitor for VCCQ) = 4.3µF CREG = 1.0µF. PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN 23 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Micron Confidential and Proprietary 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC Revision History Revision History Rev. D – 07/12 • • • • • Updated MMC-Specific Features Updated Ordering Information table Added Part Numbering information Updated 169-ball LFBGA package dimension drawing (package code DN) Corrected typographical error in ECSD Register table and updated note 4 Rev. C – 05/12 • Updated CSD Register and ECSD Register • Corrected Ordering Information • To Production status Rev. B – 02/12 • Changed the part numbers and the minimum operating temperature from -25 to -40 degrees C Rev. A – 01/12 • Initial release 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 www.micron.com/productsupport Customer Comment Line: 800-932-4992 Micron and the Micron logo are trademarks of Micron Technology, Inc. All other trademarks are the property of their respective owners. This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein. Although considered final, these specifications are subject to change, as further product development and data characterization sometimes occur. PDF: 09005aef84a4d6f8 emmc_4gb_8gb_16gb_32gb_64gb-it.pdf - Rev. D 07/12 EN 24 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved.