2N5460, 2N5461, 2N5462 JFET Amplifier P−Channel − Depletion Features • Pb−Free Packages are Available* http://onsemi.com 2 DRAIN MAXIMUM RATINGS Rating Symbol Value Unit Drain − Gate Voltage VDG 40 Vdc Reverse Gate − Source Voltage VGSR 40 Vdc Forward Gate Current IG(f) 10 mAdc Total Device Dissipation @ TA = 25°C Derate above 25°C PD 350 2.8 mW mW/°C Junction Temperature Range TJ −65 to +135 °C Storage Channel Temperature Range Tstg −65 to +150 °C 3 GATE 1 SOURCE Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. TO−92 CASE 29 STYLE 7 12 3 MARKING DIAGRAM 2N 546x AYWWG G 2N546x = Device Code x = 0, 1, or 2 A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. Preferred devices are recommended choices for future use and best overall value. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 March, 2006 − Rev. 5 1 Publication Order Number: 2N5460/D 2N5460, 2N5461, 2N5462 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Symbol Min Typ Max Unit 40 − − Vdc 2N5460, 2N5461, 2N5462 − − 5.0 nAdc 2N5460, 2N5461, 2N5462 − − 1.0 mAdc 0.75 1.0 1.8 − − − 6.0 7.5 9.0 Vdc 0.5 0.8 1.5 − − − 4.0 4.5 6.0 Characteristic OFF CHARACTERISTICS Gate −Source Breakdown Voltage (IG = 10 mAdc, VDS = 0) Gate Reverse Current (VGS = 20 Vdc, VDS = 0) (VGS = 30 Vdc, VDS = 0) (VGS = 20 Vdc, VDS = 0, TA = 100°C) (VGS = 30 Vdc, VDS = 0, TA = 100°C) V(BR)GSS 2N5460, 2N5461, 2N5462 IGSS Gate −Source Cutoff Voltage (VDS = 15 Vdc, ID = 1.0 mAdc) 2N5460 2N5461 2N5462 Gate −Source Voltage (VDS = 15 Vdc, ID = 0.1 mAdc) (VDS = 15 Vdc, ID = 0.2 mAdc) (VDS = 15 Vdc, ID = 0.4 mAdc) 2N5460 2N5461 2N5462 VGS(off) VGS Vdc ON CHARACTERISTICS Zero −Gate −Voltage Drain Current (VDS = 15 Vdc, VGS = 0, f = 1.0 kHz) 2N5460 2N5461 2N5462 IDSS −1.0 −2.0 −4.0 − − − −5.0 −9.0 −16 mAdc 2N5460 2N5461 2N5462 ⎪yfs⎪ 1000 1500 2000 − − − 4000 5000 6000 mmhos Output Admittance (VDS = 15 Vdc, VGS = 0, f = 1.0 kHz) ⎪yos⎪ − − 75 mmhos Input Capacitance (VDS = 15 Vdc, VGS = 0, f = 1.0 MHz) Ciss − 5.0 7.0 pF Reverse Transfer Capacitance (VDS = 15 Vdc, VGS = 0, f = 1.0 MHz) Crss − 1.0 2.0 pF en − 60 115 nVń ǸHz SMALL−SIGNAL CHARACTERISTICS Forward Transfer Admittance (VDS = 15 Vdc, VGS = 0, f = 1.0 kHz) FUNCTIONAL CHARACTERISTICS Equivalent Short−Circuit Input Noise Voltage (VDS = 15 Vdc, VGS = 0, f = 100 Hz, BW = 1.0 Hz) ORDERING INFORMATION Device 2N5460 2N5460G 2N5461 2N5461G 2N5461RLRA 2N5461RLRAG 2N5462 2N5462G Package Shipping† TO−92 TO−92 (Pb−Free) TO−92 1000 Units / Box TO−92 (Pb−Free) TO−92 TO−92 (Pb−Free) 2000 / Tape & Reel TO−92 TO−92 (Pb−Free) 1000 Units / Box †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 2 2N5460, 2N5461, 2N5462 4.0 VDS = 15 V 3.5 I D, DRAIN CURRENT (mA) FORWARD TRANSFER ADMITTANCE versus DRAIN CURRENT 3.0 2.5 TA = −55°C 2.0 25°C 1.5 125°C 1.0 0.5 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VGS, GATE−SOURCE VOLTAGE (VOLTS) 1.8 2.0 Yfs FORWARD TRANSFER ADMITTANCE (m mhos) DRAIN CURRENT versus GATE SOURCE VOLTAGE 4000 3000 2000 1000 700 500 VDS = 15 V f = 1.0 kHz 300 200 0.2 0.3 10 I D, DRAIN CURRENT (mA) VDS = 15 V 8.0 TA = −55°C 7.0 6.0 25°C 125°C 5.0 4.0 3.0 2.0 1.0 0 0.5 1.0 1.5 2.0 2.5 3.0 VGS, GATE−SOURCE VOLTAGE (VOLTS) 3.5 4.0 5000 3000 2000 1000 VDS = 15 V f = 1.0 kHz 700 500 0.5 0.7 12 TA = −55°C 10 8.0 25°C 125°C 6.0 4.0 2.0 0 1.0 2.0 3.0 4.0 5.0 6.0 VGS, GATE−SOURCE VOLTAGE (VOLTS) 2.0 3.0 ID, DRAIN CURRENT (mA) 5.0 7.0 10000 VDS = 15 V 14 1.0 Figure 5. VGS(off) = 4.0 V 7.0 Yfs FORWARD TRANSFER ADMITTANCE (m mhos) 16 I D, DRAIN CURRENT (mA) 4.0 7000 Figure 2. VGS(off) = 4.0 V 0 3.0 10000 9.0 0 2.0 Figure 4. VGS(off) = 2.0 V Yfs FORWARD TRANSFER ADMITTANCE (m mhos) Figure 1. VGS(off) = 2.0 V 0.5 0.7 1.0 ID, DRAIN CURRENT (mA) 8.0 7000 5000 3000 2000 1000 VDS = 15 V f = 1.0 kHz 700 500 0.5 0.7 1.0 2.0 3.0 ID, DRAIN CURRENT (mA) Figure 6. VGS(off) = 5.0 V Figure 3. VGS(off) = 5.0 V http://onsemi.com 3 5.0 7.0 10 2N5460, 2N5461, 2N5462 10 VDS = 15 V f = 1.0 kHz 8.0 IDSS = 3.0 mA 100 70 50 6.0 mA 10 mA 30 C, CAPACITANCE (pF) 200 7.0 6.0 Ciss 5.0 4.0 3.0 2.0 20 10 0.1 f = 1.0 MHz VGS = 0 9.0 300 Coss 1.0 0.2 0.5 1.0 2.0 ID, DRAIN CURRENT (mA) 5.0 0 10 Crss 0 Figure 7. Output Resistance versus Drain Current 10 20 30 VDS, DRAIN−SOURCE VOLTAGE (VOLTS) Figure 8. Capacitance versus Drain−Source Voltage 10 9.0 NF, NOISE FIGURE (dB) r oss , OUTPUT RESISTANCE (k ohms) 1000 700 500 VDS = 15 V VGS = 0 f = 100 Hz 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 1.0 10 100 1000 RS, SOURCE RESISTANCE (k Ohms) 10,000 Figure 9. Noise Figure versus Source Resistance COMMON SOURCE y PARAMETERS FOR FREQUENCIES BELOW 30 MHz vi Crss Ciss ross Coss | yfs | vi yis = jW Ciss yos = jW Cosp * + 1/ross yfs = yfs | yrs = −jW Crss *Cosp is Coss in parallel with Series Combination of Ciss and Crss. NOTE: 1. Graphical data is presented for dc conditions. Tabular data is given for pulsed conditions (Pulse Width = 630 ms, Duty Cycle = 10%). Figure 10. Equivalent Low Frequency Circuit http://onsemi.com 4 40 2N5460, 2N5461, 2N5462 PACKAGE DIMENSIONS TO−92 CASE 29−11 ISSUE AL A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. B R P L SEATING PLANE K DIM A B C D G H J K L N P R V D X X G J H V C SECTION X−X 1 N N INCHES MIN MAX 0.175 0.205 0.170 0.210 0.125 0.165 0.016 0.021 0.045 0.055 0.095 0.105 0.015 0.020 0.500 −−− 0.250 −−− 0.080 0.105 −−− 0.100 0.115 −−− 0.135 −−− MILLIMETERS MIN MAX 4.45 5.20 4.32 5.33 3.18 4.19 0.407 0.533 1.15 1.39 2.42 2.66 0.39 0.50 12.70 −−− 6.35 −−− 2.04 2.66 −−− 2.54 2.93 −−− 3.43 −−− STYLE 7: PIN 1. SOURCE 2. DRAIN 3. GATE ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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