INTEGRATED CIRCUITS NE56631-XX Active-LOW system reset Product data Supersedes data of 2002 Oct 07 2003 Feb 14 Philips Semiconductors Product data Active-LOW system reset NE56631-XX GENERAL DESCRIPTION The NE56631-XX is a family of Active-LOW, power-on resets that offers precision threshold voltage detection within ±3% and super low operating supply current of typically 1.5 µA. Several detection threshold voltages are available at 1.9 V, 2.0 V, 2.7 V, 2.8 V, 2.9 V, 3.0 V, 3.1 V, 4.2 V, 4.3 V, 4.4 V, 4.5 V, and 4.6 V. Other thresholds are offered upon request at 100 mV steps from 1.9 V to 4.6 V. With its ultra low supply current and high precision voltage threshold detection capability, the NE56631-XX is well suited for various battery powered applications such as reset circuits for logic and microprocessors, voltage check, and level detecting. FEATURES • High precision threshold detection voltage: • Super low operating supply current: APPLICATIONS • Reset for microprocessor and logic circuits • Voltage level detection circuit • Battery voltage check circuit • Detection circuit for battery backup VS ±3% ICCH=1.5 µA typ.; ICCL=1.0 µA typ. • Hysteresis voltage: 50 mV typ. • Internal Power-On-Reset Delay time: 20 µs typ. • Detection threshold voltage: 1.9 V, 2.0 V, 2.7 V, 2.8 V, 2.9 V, 3.0 V, 3.1 V, 4.2 V, 4.3 V, 4.4 V, 4.5 V, and 4.6 V • Other detection threshold voltages available upon request at 100 mV steps from 1.9 V to 4.6 V • Large low reset output current: 30 mA typ. • Reset assertion with VCC down to 0.65 V typ. SIMPLIFIED SYSTEM DIAGRAM VCC VCC NE56631-XX RESET VOUT LOGIC SYSTEM GND SL01739 Figure 1. Simplified system diagram. 2003 Feb 14 2 Philips Semiconductors Product data Active-LOW system reset NE56631-XX ORDERING INFORMATION PACKAGE TYPE NUMBER NE56631-XXD NAME DESCRIPTION TEMPERATURE RANGE SOT23-5 / SOT25 (SO5) plastic small outline package; 5 leads (see dimensional drawing) –20 to +75 °C NOTE: The device has 12 voltage output options, indicated by the XX on the ‘Type number’. XX VOLTAGE (Typical) 19 1.9 V 20 2.0 V 27 2.7 V 28 2.8 V 29 2.9 V 30 3.0 V 31 3.1 V 42 4.2 V 43 4.3 V 44 4.4 V 45 4.5 V 46 4.6 V PIN CONFIGURATION PIN DESCRIPTION PIN NC 1 SUB 2 GND 3 5 VCC NE56631-XX 4 SYMBOL DESCRIPTION 1 NC No connection. 2 SUB Substrate. Connect to ground (GND). 3 GND Ground. Negative supply. 4 VOUT Reset output (RESET). Active-LOW, open collector. 5 VCC Positive supply voltage VOUT SL01737 Figure 2. Pin configuration. MAXIMUM RATINGS MIN. MAX. UNIT VCC SYMBOL Supply voltage –0.3 +10 V Tamb Ambient operating temperature –20 +75 °C Tstg Storage temperature –40 +125 °C PD Power dissipation – 150 mW 2003 Feb 14 PARAMETER 3 Philips Semiconductors Product data Active-LOW system reset NE56631-XX ELECTRICAL CHARACTERISTICS Tamb = 25 °C, unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT RL = 470 Ω; VOL ≤ 0.4 V; VCC = HIGH-to-LOW 0.97 VS VS 1.03 VS V RL = 470 Ω; VCC = LOW-to-HIGH-to-LOW 30 50 100 mV RL = 470 Ω; Tamb = –20 °C to +75 °C – ±0.01 – %/°C VCC = VS(min) – 0.05 V; RL = 470 Ω – 0.2 0.4 V VCC = 10 V; VO = VCC – – ±0.1 V Supply current (LOW Reset) VCC = VS(min) – 0.05 V; RL = ∞ – 1.0 2.0 µA ICCH Supply current (HIGH Reset) VCC = VS(typ) / 0.85 V; RL = ∞ – 1.5 2.5 µA tPLH HIGH-to-LOW delay time CL = 100 pF; RL = 4.7 kΩ – 20 60 µs tPHL LOW–to-HIGH delay time CL = 100 pF; RL = 4.7 kΩ – 20 60 µs VOPL Minimum operating threshold voltage RL = 4.7 kΩ; VOL ≤ 0.4 V – 0.65 0.80 V IOL1 Output current (LOW Reset) 1 VO = 0.4 V; RL = 0; VCC = VS(min) – 0.05 V – 30 – mA IOL2 Output current (LOW Reset) 2 VO = 0.4 V; RL = 0; VCC = VS(min) – 0.15 V; Tamb = –30 °C to +80 °C – 23 – mA VS Detection threshold voltage ∆VS Hysteresis voltage VS/∆T Detection threshold voltage temperature coefficient VOL LOW-level output voltage ILO Output leakage current ICCL 2003 Feb 14 4 Philips Semiconductors Product data Active-LOW system reset NE56631-XX TYPICAL PERFORMANCE CURVES OUTPUT CURRENT (RESET LOW), I OL (mA) 4.60 RL = 470 Ω VOL ≤ 0.4 V VCC = HIGH-to-LOW DETECTION VOLTAGE, VS (mV) 4.55 4.50 4.45 4.40 –25 0 25 50 34 VO = 0.4 V RL = 0 VCC = VS(min) – 0.05 V 33 32 31 30 29 28 –25 75 AMBIENT TEMPERATURE, Tamb (°C) 0 25 50 SL01845 SL01841 Figure 3. Detection voltage versus ambient temperature. Figure 4. Detection voltage versus ambient temperature. 80 SUPPLY CURRENT (RESET LOW), I CCL ( µ A) 1.8 HYSTERESIS VOLTAGE, ∆ VS (mV) VCC = VS(min) – 0.05 V RL = ∞ 1.7 1.6 1.5 1.4 1.3 –25 0 25 50 RL = 470 Ω VCC = LOW-to-HIGH-to-LOW 70 60 50 40 30 20 –25 75 AMBIENT TEMPERATURE, Tamb (°C) 0 25 50 SL01842 Figure 6. Hysteresis voltage versus ambient temperature. 0.9 190 RL = 4.7 kΩ VOL ≤ 0.4 V LOW-LEVEL OUTPUT VOLTAGE, VOL (V) MINIMUM OPERATING THRESHOLD VOLTAGE, VOPL (V) Figure 5. Supply current (Reset LOW) versus ambient temperature. 0.8 0.7 0.6 0.5 0 25 50 VCC = VS(min) – 0.05 V RL = 470 Ω 170 150 130 110 –25 75 AMBIENT TEMPERATURE, Tamb (°C) 0 25 50 75 AMBIENT TEMPERATURE, Tamb (°C) SL01844 SL01843 Figure 7. Minimum operating threshold voltage versus ambient temperature. 2003 Feb 14 75 AMBIENT TEMPERATURE, Tamb (°C) SL01840 0.4 –25 75 AMBIENT TEMPERATURE, Tamb (°C) Figure 8. LOW-level output voltage versus ambient temperature. 5 Philips Semiconductors Product data Active-LOW system reset NE56631-XX TECHNICAL DISCUSSION The NE56631-XX is a Bipolar IC designed to provide power source monitoring and a system reset function in the event the power sags below an acceptable level for the system to operate reliably. The IC is designed to generate a reset signal for a wide range of microprocessor and other logic systems. The NE56631-XX can operate at supply voltage up to 10 volts. The series includes several devices with precision threshold reset voltage values of 1.9, 2.0, 2.7, 2.8, 2.9, 3.0, 3.1, 4.2, 4.3, 4.4, 4.5, 4.6 V. The reset threshold incorporates a typical hysteresis of 50 mV to prevent erratic reasserts from being generated. An internal fixed delay time circuit provides a fixed power-on-reset delay of typically 20 µs with a guaranteed maximum delay of 60 µs. output of the comparator to go to a HIGH state. This causes the common emitter amplifier, Q1 to turn on pulling down the non-inverting terminal of the op amp, which causes its output to go to a HIGH state. This high output level turns on the output common emitter transistor, Q2. The collector output of Q2 is pulled LOW through the external pull-up resistor, thereby asserting the Active-LOW reset. The bipolar common emitter transistor, Q1and the op amp establishes threshold hysteresis by turning on when the threshold comparator goes to a HIGH state (when VCC sags to or below the threshold level). With the output of Q2 connected to the non-inverting terminal of the op amp, the non-inverting terminal of the op amp has a level near ground at about 0.4 V when the reset is asserted (Active-LOW). For the op amp to reverse its output, the comparator output and Q1 must overcome the additional pull-down voltage present on the op amp inverting input. The differential voltage required to do this establishes the hysteresis voltage of the sensed threshold voltage. Typically it is 50 mV. The output of the NE56631-XX utilizes an open collector topology, which requires an external pull-up resistor to VCC. Though this may be regarded as a disadvantage, it is advantageous in many sensitive applications. Since the open collector output cannot source reset current when both are operated from a common supply, the NE56631-XX offers a safe interconnect to a wide variety of microprocessors. When VCC voltage sags, and it is below the detection Threshold (VSL), the device will assert a Reset LOW output at or near ground potential. As VCC voltage rises from (VCC < VSL) to VSH or higher, the Reset is released and the output follows VCC. Conversely, decreases in VCC from (VCC > VSL) to VSL will cause the output to be pulled to ground. The NE56631-XX operates at low supply currents, typically 1.5 µA, while offering high precision of the threshold detection (±3%). Figure 9 is a functional block diagram of the NE56631-XX. The internal reference source voltage is typically 0.65 V over the temperature range. The reference voltage is connected to the non-inverting input of the threshold comparator while the inverting input monitors the supply voltage through a voltage divider network made up of R1 and R2. The output of the comparator drives the series base resistor, R3 of a common emitter amplifier, Q1. The collector of Q1 is connected through R4 to the inverting terminal of the op amp. The op amp output is connected to the series base resistor, R5 of the output common emitter transistor, Q2. The collector output of Q2 is connected to the non-inverting terminal of the op amp which drives it. Hysteresis Voltage = Released Voltage – Detection Threshold Voltage ∆VS = VSH – VSL where: VSH = VSL + ∆VS VSL = VSH – ∆VS When VCC drops below the minimum operating voltage, typically 0.65 V, the output is undefined and the output reset low assertion is not guaranteed. At this level of VCC the output will try to rise to VCC. When the supply voltage sags to the threshold detection voltage, the resistor divider network supplies a voltage to the inverting terminal of the threshold comparator which is less than VREF, causing the 5 VCC 4 VOUT 3 GND R1 CO1 R4 VREF R2 R3 OP1 R5 Q2 Q1 SL01738 Figure 9. Functional diagram. 2003 Feb 14 6 Philips Semiconductors Product data Active-LOW system reset NE56631-XX TIMING DIAGRAM The Timing Diagram in Figure 10 depicts the operation of the device. Letters A–J on the Time axis indicates specific events. D-E: Between “D” and “E”, VCC starts rising. E: At “E”, VCC rises to the VSH level. Once again, the device releases the hold on the VOUT reset. The Reset output tracks VCC as it rises above VSH. A: At “A”, VCC begins to increase. Also the VOUT voltage initially increases but abruptly decreases when VCC reaches the level (approximately 0.65 V) that activates the internal bias circuitry and RESET is asserted. F-G: At “F”, VCC is above the upper threshold and begins to fall, causing VOUT to follow it. As long as VCC remains above the VSH, no reset signal will be triggered. Before VCC falls to the VSH, it begins to rise, causing VOUT to follow it. At “G”, VCC returns to normal. B: At “B”, VCC reaches the threshold level of VSH. At this point the device releases the hold on the VOUT reset. The Reset output VOUT tracks VCC as it rises above VSH (assuming the reset pull-up resistor RPU is connected to VCC). In a microprocessor-based system these events release the reset from the microprocessor, allowing the microprocessor to function normally. H: At event “H”, VCC falls until the VSL undervoltage detection threshold is reached. At this level, a RESET signal is generated and VOUT goes LOW. C-D: At “C”, VCC begins to fall, causing VOUT to follow. VCC continues to fall until the VSL undervoltage detection threshold is reached at “D”. This causes a reset signal to be generated (VOUT RESET goes LOW). J: At “J”, the VCC voltage has decreased until normal internal circuit bias is unable to maintain a VOUT reset. As a result, VCC may rise to less than 0.65 V. As VCC decreases further, the VOUT reset also decreases to zero. ∆VS VSH VSL VCC 0 VOUT 0 A B C D E F G H J TIME SL01740 Figure 10. Timing diagram. 2003 Feb 14 7 Philips Semiconductors Product data Active-LOW system reset NE56631-XX APPLICATION INFORMATION VCC SUPPLY VCC RPU NE56631-XX VOUT CPU RESET VSS GND SL01741 Figure 11. Conventional reset application for NE56631-XX. VCC SUPPLY R D VCC RPU NE56631-XX VOUT CPU RESET VSS GND SL01742 Figure 12. Power On Reset circuit for NE56631-XX. The Power ON Reset Circuit shown in Figure 12 is an example of obtaining a stable reset condition upon power-up. If power supply rises abruptly, the RESET may go “HIGH” momentarily when VCC is below the minimum operating voltage (0.85 V). To overcome this undesirable response, a resistor in placed between positive supply, VCC and VCC pin and a capacitor from VCC pin to ground. The RC circuit solution works reasonably well for power-up as long as the 2003 Feb 14 power supply voltage rises faster than the RC time constant. The RC network provides the necessary reset delay to hold the microprocessor in reset until its circuitry settles down and normal operation begins. When the supply turns off, the diode provides a path for the capacitor to discharge to more quickly assert logic LOW reset. 8 Philips Semiconductors Product data Active-LOW system reset NE56631-XX PACKING METHOD The NE56631-XX is packed in reels, as shown in Figure 13. GUARD BAND TAPE REEL ASSEMBLY TAPE DETAIL COVER TAPE CARRIER TAPE BARCODE LABEL BOX SL01305 Figure 13. Tape and reel packing method. 2003 Feb 14 9 Philips Semiconductors Product data Active-LOW system reset NE56631-XX SOT23-5: plastic small outline package; 5 leads; body width 1.5 mm 1.35 2003 Feb 14 1.2 1.0 0.025 0.55 0.41 0.22 0.08 3.00 2.70 1.70 1.50 0.55 0.35 10 Philips Semiconductors Product data Active-LOW system reset NE56631-XX REVISION HISTORY Rev Date Description _2 20030214 Product data (9397 750 11131); ECN 853-2328 29155 of 06 November 2002. Supersedes data of 2002 Oct 07 (9397 750 10266). Modifications: • Page 6, Technical discussion; third paragraph: from “... typically 1.5 mA, ...” to “... typically 1.5 µA, ...” _1 20021007 Product data (9397 750 10266); ECN 853–2328 27919 of 25 March 2002. Data sheet status Level Data sheet status [1] Product status [2] [3] Definitions I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Koninklijke Philips Electronics N.V. 2003 All rights reserved. Printed in U.S.A. Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 Date of release: 02-03 For sales offices addresses send e-mail to: [email protected]. Document order number: 2003 Feb 14 11 9397 750 11131