NL17SZ17 Single Non-Inverting Buffer with Schmitt Trigger The NL17SZ17 is a single Non−inverting Schmitt Trigger Buffer in two tiny footprint packages. The device performs much as LCX multi−gate products in speed and drive. http://onsemi.com Features • • • • • • • Tiny SOT−353 and SOT−553 Packages Source/Sink 24 mA at 3.0 Volts Overvoltage Tolerant Inputs and Outputs Chip Complexity: FETs = 20 Designed for 1.65 V to 5.5 V VCC Operation These Devices are Pb−Free and are RoHS Compliant NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable MARKING DIAGRAMS 5 SC−88A (SC−70−5/SOT−353) LX MG DF SUFFIX G CASE 419A 1 5 1 5 SOT−553 XV5 SUFFIX CASE 463B 5 1 LX MG G 1 LX = Specific Device Code M = Date Code* G = Pb−Free Package NC 5 1 (Note: Microdot may be in either location) VCC *Date Code orientation and/or position may vary depending upon manufacturing location. A 2 PIN ASSIGNMENT GND 4 3 Y Figure 1. Pinout (Top View) Pin Function 1 NC 2 A 3 GND 4 Y 5 VCC FUNCTION TABLE Y A A Input Figure 2. Logic Symbol Y Output L L H H ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. © Semiconductor Components Industries, LLC, 2012 April, 2012 − Rev. 12 1 Publication Order Number: NL17SZ17/D NL17SZ17 MAXIMUM RATINGS Symbol VCC Parameter Value Units −0.5 to +7.0 V −0.5 ≤ VI ≤ +7.0 V −0.5 ≤ VO ≤ +7.0 V VI < GND −50 mA VO < GND −50 mA DC Supply Voltage VI DC Input Voltage VO DC Output Voltage Output in High or LOW State (Note 1) IIK DC Input Diode Current IOK DC Output Diode Current IO DC Output Sink Current ±50 mA ICC DC Supply Current per Supply Pin ±100 mA IGND DC Ground Current per Ground Pin ±100 mA TSTG Storage Temperature Range −65 to +150 °C TL Lead Temperature, 1 mm from Case for 10 Seconds 260 °C TJ Junction Temperature under Bias +150 °C SOT−353 (Note 2) SOT−553 350 496 °C/W SOT−353 SOT−553 186 135 mW qJA PD Thermal Resistance Power Dissipation in Still Air at 85°C MSL Moisture Sensitivity FR Flammability Rating ESD ILatchup Level 1 Oxygen Index: 28 to 34 ESD Classification UL 94 V−0 @ 0.125 in Human Body Model (Note 3) Machine Model (Note 4) Charged Device Model Latchup Performance Class 2 Class C N/A Above VCC and Below GND at 85°C (Note 5) mA ±500 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. IO absolute maximum rating must be observed. 2. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow. 3. Tested to EIA/JESD22−A114−A, rated to EIA/JESD22−A114−B. 4. Tested to EIA/JESD22−A115−A, rated to EIA/JESD22−A115−A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage VI Input Voltage, (Note 6) VO Output Voltage TA Operating Free−Air Temperature Dt/DV Input Transition Rise or Fall Rate Operating Data Retention Only (HIGH or LOW State) VCC = 2.5 V ±0.2 V VCC = 3.0 V ±0.3 V VCC = 5.0 V ±0.5 V Min Max Units 1.65 1.5 5.5 5.5 V 0 5.5 V 0 5.5 V −55 +125 °C 0 0 0 No Limit No Limit No Limit ns/V 6. Unused inputs may not be left open. All inputs must be tied to a high−logic voltage level or a low−logic input voltage level. http://onsemi.com 2 NL17SZ17 DC ELECTRICAL CHARACTERISTICS Symbol Parameter Condition TA = 255C −555C 3 TA 3 1255C VCC (V) Min Typ Max Min Max Units VT) Positive Input Threshold Voltage 1.65 2.3 2.7 3.0 4.5 5.5 0.6 1.0 1.2 1.3 1.9 2.2 1.0 1.5 1.7 1.9 2.7 3.3 1.4 1.8 2.0 2.2 3.1 3.6 0.6 1.0 1.2 1.3 1.9 2.2 1.4 1.8 2.0 2.2 3.1 3.6 V VT* Negative Input Threshold Voltage 1.65 2.3 2.7 3.0 4.5 5.5 0.2 0.4 0.5 0.6 1.0 1.2 0.5 0.75 0.87 1.0 1.5 1.9 0.8 1.15 1.4 1.5 2.0 2.3 0.2 0.4 0.5 0.6 1.0 1.2 0.8 1.15 1.4 1.5 2.0 2.3 V Input Hysteresis Voltage 1.65 2.3 2.7 3.0 4.5 5.5 0.1 0.25 0.3 0.4 0.6 0.7 0.48 0.75 0.83 0.93 1.2 1.4 0.9 1.1 1.15 1.2 1.5 1.7 0.1 0.25 0.3 0.4 0.6 0.7 0.9 1.1 1.15 1.2 1.5 1.7 V VCC *0.1 1.29 1.9 2.2 2.4 2.3 3.8 VCC 1.52 2.1 2.4 2.7 2.5 4.0 VH VOH High−Level Output Voltage VIN = VIH or VIL IOH = −100 mA IOH = −3 mA IOH = *8 mA IOH = *12 mA IOH = *16 mA IOH = *24 mA IOH = *32 mA 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 VOL Low−Level Output Voltage VIN = VIH or VIL IOL = 100 mA IOL = 4 mA IOL = 8 mA IOL = 12 mA IOL = 16 mA IOL = 24 mA IOL = 32 mA 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 Input Leakage Current VIN = 5.5 V or GND IOFF Power Off Leakage Current VIN = 5.5 V or VOUT = 5.5 V ICC Quiescent Supply Current VIN = 5.5 V or GND IIN VCC *0.1 1.29 1.9 2.2 2.4 2.3 3.8 V 0.1 0.24 0.3 0.4 0.4 0.55 0.55 0.1 0.24 0.3 0.4 0.4 0.55 0.55 V 0 to 5.5 ±0.1 ±1.0 mA 0 1.0 10 mA 5.5 1.0 10 mA 0.08 0.2 0.22 0.28 0.38 0.42 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) Symbol tPLH tPHL Propagation Delay Input A to Y (Figures 3 and 4) TA = 255C −555C 3 TA 3 1255C VCC (V) Min Typ Max Min Max Units RL = 1 MW, CL = 15 pF 1.65 1.8 2.5 ± 0.2 3.3 ± 0.3 5.0 ± 0.5 2.0 2.0 1.0 1.0 0.5 9.1 7.6 5.0 3.7 3.1 15 12.5 9.0 6.3 5.2 2.0 2.0 1.0 1.0 0.5 15.6 13 9.5 6.5 5.5 ns RL = 500 W, CL = 50 pF 3.3 ± 0.3 5.0 ± 0.5 1.5 0.8 4.4 3.7 7.2 5.9 1.5 0.8 7.5 6.2 Parameter Condition CAPACITIVE CHARACTERISTICS Symbol Parameter Condition CIN Input Capacitance VCC = 5.5 V, VI = 0 V or VCC CPD Power Dissipation Capacitance (Note 7) 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 10 MHz, VCC = 5.5 V, VI = 0 V or VCC Typical Units u2.5 pF 9 11 pF 7. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. http://onsemi.com 3 NL17SZ17 A or B INPUT VCC 50% GND tPLH Y OUTPUT RL tPHL A 1 MHz square input wave is recommended for propagation delay tests. 50% VCC Figure 4. Test Circuit Figure 3. Switching Waveforms VT , TYPICAL INPUT THRESHOLD VOLTAGE (VOLTS) CL 4 3 (VT)) 2 VHtyp (VT*) 1 2 3 2.5 3.5 VCC, POWER SUPPLY VOLTAGE (VOLTS) VHtyp = (VT) typ) − (VT* typ) 3.6 Figure 5. Typical Input Threshold, VT), VT* versus Power Supply Voltage VCC VH VT) VT* Vin VCC VH VT) VT* Vin GND GND VOH VOH Vout Vout VOL (a) A Schmitt−Trigger Squares Up Inputs With Slow Rise and Fall Times (b) A Schmitt−Trigger Offers Maximum Noise Immunity VOL Figure 6. Typical Schmitt−Trigger Applications DEVICE ORDERING INFORMATION Device Order Number Package Type Tape/Reel Size† NL17SZ17DFT2G SC−88A/SC−70−5/SOT−353 (Pb−Free) 3000 Units / Tape & Reel NLV17SZ17DFT2G* SC−88A/SC−70−5/SOT−353 (Pb−Free) 3000 Units / Tape & Reel NL17SZ17XV5T2G SOT−553 (Pb−Free) 4000 Units / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. http://onsemi.com 4 NL17SZ17 PACKAGE DIMENSIONS SC−88A (SC−70−5/SOT−353) DF SUFFIX CASE 419A−02 ISSUE K A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A−01 OBSOLETE. NEW STANDARD 419A−02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. G 5 4 −B− S 1 2 DIM A B C D G H J K N S 3 D 5 PL 0.2 (0.008) M B M N J C H K http://onsemi.com 5 INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 NL17SZ17 PACKAGE DIMENSIONS SOT−553 XV5 SUFFIX CASE 463B ISSUE B D −X− 5 A 4 1 e 2 L E −Y− 3 b HE DIM A b c D E e L HE c 5 PL 0.08 (0.003) NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. M X Y MILLIMETERS NOM MAX 0.55 0.60 0.22 0.27 0.13 0.18 1.60 1.70 1.20 1.30 0.50 BSC 0.10 0.20 0.30 1.50 1.60 1.70 MIN 0.50 0.17 0.08 1.50 1.10 INCHES NOM 0.022 0.009 0.005 0.063 0.047 0.020 BSC 0.004 0.008 0.059 0.063 MIN 0.020 0.007 0.003 0.059 0.043 MAX 0.024 0.011 0.007 0.067 0.051 0.012 0.067 SOLDERING FOOTPRINT* 0.3 0.0118 0.45 0.0177 1.35 0.0531 1.0 0.0394 0.5 0.5 0.0197 0.0197 SCALE 20:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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