NLAS4684 Ultra−Low Resistance Dual SPDT Analog Switch The NLAS4684 is an advanced CMOS analog switch fabricated in Sub−micron silicon gate CMOS technology. The device is a dual Independent Single Pole Double Throw (SPDT) switch featuring Ultra−Low RON of 0.5 , for the Normally Closed (NC) switch, and 0.8 for the Normally Opened switch (NO) at 2.7 V. The part also features guaranteed Break Before Make switching, assuring the switches never short the driver. The NLAS4684 is available in a 2.0 x 1.5 mm bumped die array. The pitch of the solder bumps is 0.5 mm for easy handling. • Ultra−Low RON, 0.5 at 2.7 V • Threshold Adjusted to Function with 1.8 V Control at • • MARKING DIAGRAMS Microbump−10 CASE 489AA VCC = 2.7−3.3 V Single Supply Operation from 1.8−5.5 V Tiny 2 x 1.5 mm Bumped Die Low Crosstalk, 83 dB at 100 kHz Full 0−VCC Signal Handling Capability High Isolation, −65 dB at 100 kHz Low Standby Current, 50 nA Low Distortion, 0.14% THD RON Flatness of 0.15 Pin for Pin Replacement for MAX4684 High Continuous Current Capability 300 mA Through Each Switch Large Current Clamping Diodes at Analog Inputs 300 mA Continuous Current Capability Pb−Free Package is Available* 1 QFN−10 CASE 485C A1 Cell Phone Speaker Switching Power Switching Modems Automotive 1 NLAS 4684 ALYW 1 Micro10 CASE 846B A L Y WW, W 4684 AYWW A1 1 Applications • • • • • 4684 AYWW A1 Features • • • • • • • • • • http://onsemi.com NLAS 4684 ALYW NLAS 4684 ALYW = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package FUNCTION TABLE IN 1, 2 NO 1, 2 NC 1, 2 0 1 OFF ON ON OFF ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 2004 August, 2004 − Rev. 11 1 Publication Order Number: NLAS4684/D NLAS4684 GND 6 5 NC1 NC2 7 4 IN1 IN2 8 3 COM1 COM2 9 2 NO1 NO2 10 1 VCC (Top View) Figure 1. Pin Connections and Logic Diagram (QFN−10 and Micro10) GND B1 NC1 C1 A1 NC2 IN1 C2 A2 IN2 COM1 C3 A3 COM2 NO1 C4 A4 NO2 B4 VCC (Top View) Figure 2. Pin Connections and Logic Diagram (Microbump−10) http://onsemi.com 2 NLAS4684 MAXIMUM RATINGS Symbol Parameter Value Unit 0.5 to 7.0 V 0.5 VIS VCC 0.5 V 0.5 VI 7.0 V VCC Positive DC Supply Voltage VIS Analog Input Voltage (VNO, VNC, or VCOM) VIN Digital Select Input Voltage Ianl1 Continuous DC Current from COM to NC/NO 300 mA Ianl−pk 1 Peak Current from COM to NC/NO, 10 duty cycle (Note 1) 500 mA Iclmp Continuous DC Current into COM/NO/NC 300 mA Iclmp 1 Peak Current into Input Clamp Diodes at COM/NC/NO 500 mA Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Defined as 10% ON, 90% off duty cycle. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit 1.8 5.5 V VCC DC Supply Voltage VIN Digital Select Input Voltage GND 5.5 V VIS Analog Input Voltage (NC, NO, COM) GND VCC V TA Operating Temperature Range 55 125 °C tr, tf Input Rise or Fall Time, SELECT 0 0 100 20 ns/V VCC = 3.3 V 0.3 V VCC = 5.0 V 0.5 V DC CHARACTERISTICS − Digital Section (Voltages Referenced to GND) Guaranteed Limit Symbol Parameter Condition VCC 10% 55C to 25C 85C 125C Unit VIH Minimum High−Level Input Voltage, Select Inputs (Figure 10) 2.0 2.5 3.0 5.0 1.4 1.4 1.4 2.0 1.4 1.4 1.4 2.0 1.4 1.4 1.4 2.0 V VIL Maximum Low−Level Input Voltage, Select Inputs (Figure 10) 2.0 2.5 3.0 5.0 0.5 0.5 0.5 0.8 0.5 0.5 0.5 0.8 0.5 0.5 0.5 0.8 V IIN Maximum Input Leakage Current, Select Inputs VIN = 5.5 V or GND 5.5 1.0 1.0 1.0 A IOFF Power Off Leakage Current VIN = 5.5 V or GND 0 10 10 10 A ICC Maximum Quiescent Supply Current (Note 2) Select and VIS = VCC or GND 5.5 50 200 200 nA 2. Guaranteed by design. http://onsemi.com 3 NLAS4684 DC ELECTRICAL CHARACTERISTICS − Analog Section Guaranteed Maximum Limit −55C to 25C Symbol Parameter VCC 10% Condition Min Max 85C Min Max 125C Min Max Unit RON (NC) NC “ON” Resistance (Note 3) VIN VIL VIS = GND to VCC IINI 100 mA 2.5 3.0 5.0 0.6 0.5 0.4 0.7 0.5 0.4 0.8 0.5 0.5 RON (NO) NO “ON” Resistance (Note 3) VIN VIH VIS = GND to VCC IINI 100 mA 2.5 3.0 5.0 2.0 0.8 0.8 2.0 0.8 0.8 2.0 1.0 0.9 RFLAT (NC) NC_On−Resistance Flatness (Notes 3, 5) ICOM = 100 mA VIS = 0 to VCC 2.5 3.0 5.0 0.15 0.15 0.15 0.15 0.15 0.15 0.15 0.15 0.15 RFLAT (NO) NO_On−Resistance Flatness (Notes 3, 5) ICOM = 100 mA VIS = 0 to VCC 2.5 3.0 5.0 0.35 0.35 0.35 0.35 0.35 0.35 0.35 0.35 0.35 RON On−Resistance Match Between Channels (Notes 3 and 4) VIS = 1.3 V; ICOM = 100 mA VIS = 1.5 V; ICOM = 100 mA VIS = 2.8 V; ICOM = 100 mA 2.5 0.18 0.18 0.18 3.0 0.06 0.06 0.06 5.0 0.06 0.06 0.06 INC(OFF) INO(OFF) NC or NO Off Leakage Current (Figure 13) (Note 3) VIN = VIL or VIH VNO or VNC = 1.0 VCOM = 4.5 V 5.5 −1 1 −10 10 −100 100 nA ICOM(ON) COM ON Leakage Current (Figure 13) (Note 3) VIN = VIL or VIH VNO 1.0 V or 4.5 V with VNC floating or VNC 1.0 V or 4.5 V with VNO floating VCOM = 1.0 V or 4.5 V 5.5 −2 2 −20 20 −200 200 nA 3. Guaranteed by design. Resistance measurements do not include test circuit or package resistance. 4. RON = RON(MAX) − RON(MIN) between NC1 and NC2 or between NO1 and NO2. 5. Flatness is defined as the difference between the maximum and minimum value of on−resistance as measured over the specified analog signal ranges. http://onsemi.com 4 NLAS4684 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) (Typical characteristics are at 25°C) Guaranteed Maximum Limit Symbol Parameter Test Conditions VCC (V) VIS (V) 55C to 25C Min Typ Max 85C Min Max 125C Min Max Unit tON Turn−On Time RL = 50 CL = 35 pF (Figures 4 and 5) 2.5 3.0 5.0 1.3 1.5 2.8 60 50 30 70 60 35 70 60 35 ns tOFF Turn−Off Time RL = 50 CL = 35 pF (Figures 4 and 5) 2.5 3.0 5.0 1.3 1.5 2.8 50 40 30 55 50 35 55 50 35 ns tBBM Minimum Break−Before−Make Time (Note 6) VIS = 3.0 RL = 300 CL = 35 pF (Figure 3) 3.0 1.5 ns 2 15 Typical @ 25, VCC = 5.0 V CNC Off CNO Off CNC On CNO On NC Off Capacitance, f = 1 MHz NO Off Capacitance, f = 1 MHz NC On Capacitance, f = 1 MHz NO On Capacitance, f = 1 MHz 102 104 322 330 pF ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted) Symbol BW VONL VISO Parameter Condition Maximum On−Channel −3dB Bandwidth or Minimum Frequency Response VIN = 0 dBm VIN centered between VCC and GND (Figure 6) Maximum Feed−through On Loss Off−Channel Isolation (Note 7) VCC V Typical 25C Unit MHz NC 3.0 6.5 NO 3.0 9.5 VIN = 0 dBm @ 100 kHz to 50 MHz VIN centered between VCC and GND (Figure 6) 3.0 −0.05 f = 100 kHz; VIS = 1 V RMS; CL = 5 nF VIN centered between VCC and GND(Figure 6) 3.0 −65 dB dB Q Charge Injection Select Input to Common I/O (Figures 10 and 11) VIN = VCC to GND, RIS = 0 , CL = 1 nF Q = CL − VOUT (Figure 7) 3.0 15 pC THD Total Harmonic Distortion THD + Noise (Figure 9) FIS = 20 Hz to 100 kHz, RL = Rgen = 600 , CL = 50 pF VIS = 1 V RMS 3.0 0.14 % VCT Channel−to−Channel Crosstalk f = 100 kHz; VIS = 1 V RMS, CL = 5 pF, RL = 50 VIN centered between VCC and GND (Figure 6) 3.0 −83 dB 6. −55°C specifications are guaranteed by design. 7. Off−Channel Isolation = 20log10 (Vcom/Vno) (See Figure 6). http://onsemi.com 5 NLAS4684 VCC DUT VCC Input Output GND VOUT 0.1 F 50 tBMM 35 pF 90% 90% of VOH Output Switch Select Pin GND Figure 3. tBBM (Time Break−Before−Make) VCC Input DUT VCC 0.1 F 50% 0V Output VOUT Open 50% 50 VOH 90% 35 pF 90% Output VOL Input tON tOFF Figure 4. tON/tOFF VCC VCC Input DUT Output 50 50% VOUT Open 50% 0V VOH 35 pF Output Input tOFF Figure 5. tON/tOFF http://onsemi.com 6 10% 10% VOL tON NLAS4684 50 DUT Reference Transmitted Input Output 50 Generator 50 Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction. VVOUT for VIN at 100 kHz IN VOUT for VIN at 100 kHz to 50 MHz VONL = On Channel Loss = 20 Log VIN VISO = Off Channel Isolation = 20 Log Bandwidth (BW) = the frequency 3 dB below VONL VCT = Use VISO setup and test to all other switch analog input/outputs terminated with 50 Figure 6. Off Channel Isolation/On Channel Loss (BW)/Crosstalk (On Channel to Off Channel)/VONL DUT VCC VIN Output Open GND CL Output Off On VIN Figure 7. Charge Injection: (Q) 10 THD (%) 1 NC1 0.1 NO1 0.01 1 10 100 1000 10000 100000 FREQUENCY (Hz) Figure 8. Total Harmonic Distortion Plus Noise Versus Frequency http://onsemi.com 7 Off VOUT NLAS4684 1.6 CHARGE INJECTION “Q” (pC) 200 CURRENT LEAKAGE (nA) 1.4 Threshold Rising 1.2 1 Threshold Falling NO, VCC = 5 V 0 NC, VCC = 5 V −200 0.8 −400 0.6 0.4 −600 0.2 0 0 2 4 −800 0 6 2 VCC (V) 6 Vin (V) Figure 9. Voltage in Threshold on Logic Pins Figure 10. Charge Injection versus Vis 70 100 90 60 80 T−on 2.5 V 50 T−on / T−off (ns) T−on / T−off (ns) 4 T−off 2.5 V 40 T−on 3.0 V 30 T−off 3.0 V 20 T−on 5.0 V T−off 5.0 V 70 T−on 60 50 40 T−off 30 20 10 10 0 −55 −30 −5 20 45 70 95 0 1.8 120 TEMPERATURE (°C) 3.8 4.8 VCC TEMPERATURE (°C) Figure 11. T−on / T−off Time versus Temperature Figure 12. T−on / T−off Time versus Temperature 1000 ICC CURRENT LEAKAGE (nA) 1000 NO/NC CURRENT LEAKAGE (nA) 2.8 100 Comm / Closed Switch 10 1 0.1 Open Switch 0.01 0.001 −55 −5 45 100 10 1 0.1 0.01 0.001 −55 95 −5 45 95 TEMPERATURE (°C) TEMPERATURE (°C) Figure 14. ICC Current Leakage versus Temperature VCC = 5.5 V Figure 13. NO/NC Current Leakage Off and On, VCC = 5 V http://onsemi.com 8 NLAS4684 3 4.5 1.8 V TA = +25°C ICOM = 100 mA 1.8 V 2.5 TA = +25°C ICOM = 100 mA 4 3.5 2.0 V RON () RON () 2.0 V 3 2 2.5 V 1.5 2.3 V 1 2.7 V 0.5 2.5 2.7 V 2.3 V 2 2.5 V 1.5 5.0 V 3.0 V 3.0 V 5.0 V 1 0.5 0 0.0 1.0 2.0 3.0 4.0 0 0.0 5.0 1.0 2.0 VCOM (V) Figure 15. NC On−Resistance versus COM Voltage 5.0 1.3 VCC = 2.5 V ICOM = 100 mA +85°C 0.4 VCC = 2.5 V ICOM = 100 mA 1.1 +85°C +25°C +25°C 0.9 0.3 RON () RON () 4.0 Figure 16. NO On−Resistance versus COM Voltage 0.45 0.35 3.0 VCOM (V) 0.25 0.7 −40°C 0.5 0.2 −40°C 0.3 0.15 0.1 0.0 0.5 1.0 1.5 2.0 0.1 2.5 0.0 1.0 2.0 VCOM (V) 3.0 4.0 5.0 VCOM (V) Figure 17. NC On−Resistance versus COM Voltage Figure 18. NO On−Resistance versus COM Voltage 0.35 0.9 +85°C +25°C 0.8 +85°C AVERAGE RON () AVERAGE RON () 0.3 +25°C 0.25 −40°C 0.2 0.15 VCC = 3 V ICOM = 100 mA 0.1 0.0 0.7 −40°C 0.6 0.5 0.4 0.3 0.2 1.0 2.0 0.1 0.0 3.0 VCOM (V) VCC = 3 V ICOM = 100 mA 1.0 2.0 VCOM (V) Figure 19. NC On−Resistance versus COM Voltage Figure 20. NC On−Resistance versus COM Voltage http://onsemi.com 9 3.0 NLAS4684 0.26 0.9 0.24 0.8 +85°C +25°C 0.2 AVERAGE RON () +25°C 0.18 0.16 +85°C 0.14 0.12 VCC = 5 V ICOM = 100 mA 0.6 −40°C 0.5 0.4 0.3 VCC = 5 V ICOM = 100 mA 0.2 0.1 0.0 0.1 0.0 0.7 1.0 2.0 3.0 4.0 5.0 1.0 2.0 VCOM (V) 3.0 4.0 5.0 VCOM (V) Figure 21. NC On−Resistance versus COM Voltage Figure 22. NO On−Resistance versus COM Voltage 0 Bandwidth (On − Loss) BANDWIDTH (dB/Div) −1 0 Phase Shift (Degrees) 10 0 Phase Shift (Degrees) −10 VCC = 3.0 V TA = 25°C 0.01 Bandwidth (On − Loss) −1 10 −10 0.001 PHASE (Degrees) BANDWIDTH (dB/Div) 0 −10 VCC = 3.0 V TA = 25°C 0.1 1.0 10 100 −10 0.001 0.01 FREQUENCY (MHz) 0.1 1.0 10 100 FREQUENCY (MHz) Figure 23. NC Bandwidth and Phase Shift versus Frequency Figure 24. NO Bandwidth and Phase Shift versus Frequency 0 0 −10 −10 NC Off−Isolation −100 0.001 PHASE (Degrees) AVERAGE RON () −40°C 0.22 0.01 0.1 1.0 NO Off−Isolation Crosstalk Crosstalk VCC = 3.0 V TA = 25°C VCC = 3.0 V TA = 25°C 10 −100 0.001 100 FREQUENCY (MHz) 0.01 0.1 1.0 10 FREQUENCY (MHz) Figure 25. NC Off Isolation and Crosstalk Figure 26. NO Off Isolation and Crosstalk http://onsemi.com 10 100 NLAS4684 ORDERING INFORMATION Device Package Shipping† NLAS4684FCT1 Microbump−10 3000 / Tape & Reel NLAS4684FCT1G Microbump−10 (Pb−Free) 3000 / Tape & Reel NLAS4684MNR2 QFN−10 2500 / Tape & Reel QFN−10 (Pb−Free) 2500 / Tape & Reel Micro10 4000 / Tape & Reel Micro10 (Pb−Free) 4000 / Tape & Reel NLAS4684MNR2G NLAS4684MR2 NLAS4684MR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 11 NLAS4684 PACKAGE DIMENSIONS Microbump−10 CASE 489AA−01 ISSUE A D 4X A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. B 0.10 C MILLIMETERS DIM MIN MAX A −−− 0.650 A1 0.210 0.270 A2 0.280 0.380 D 1.965 BSC E 1.465 BSC b 0.250 0.350 e 0.500 BSC D1 1.500 BSC E1 1.000 BSC E PIN ONE CORNER A1 0.10 C A2 A 0.075 C C SEATING PLANE D1 e 10 X b 0.15 C A B 0.05 C C E1 B A 1 2 3 4 e http://onsemi.com 12 NLAS4684 PACKAGE DIMENSIONS QFN−10 (DUAL SIDED) CASE 485C−01 ISSUE O −X− A M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION D APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. −Y− N B 2 PL 0.25 (0.010) T 2 PL 0.25 (0.010) T J R C −T− K SEATING PLANE E H L G 10 F P 1 10 PL D NOTE 3 0.10 (0.004) M T X Y http://onsemi.com 13 DIM A B C D E F G H J K L M N P R MILLIMETERS MIN MAX 3.00 BSC 3.00 BSC 0.80 1.00 0.20 0.30 2.45 2.55 1.75 1.85 0.50 BSC 1.23 1.28 0.20 REF 0.00 0.05 0.35 0.45 1.50 BSC 1.50 BSC 0.88 0.93 0.60 0.80 INCHES MIN MAX 0.118 BSC 0.118 BSC 0.031 0.039 0.008 0.012 0.096 0.100 0.069 0.073 0.020 BSC 0.048 0.050 0.008 REF 0.000 0.002 0.014 0.018 0.059 BSC 0.059 BSC 0.035 0.037 0.024 0.031 NLAS4684 PACKAGE DIMENSIONS Micro10 CASE 846B−03 ISSUE C −A− −B− K D 8 PL 0.08 (0.003) PIN 1 ID G 0.038 (0.0015) −T− SEATING PLANE M T B S A DIM A B C D G H J K L S C H NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION “A” DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION “B” DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. 846B−01 OBSOLETE. NEW STANDARD 846B−02 MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.95 1.10 0.20 0.30 0.50 BSC 0.05 0.15 0.10 0.21 4.75 5.05 0.40 0.70 INCHES MIN MAX 0.114 0.122 0.114 0.122 0.037 0.043 0.008 0.012 0.020 BSC 0.002 0.006 0.004 0.008 0.187 0.199 0.016 0.028 L J ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 14 For additional information, please contact your local Sales Representative. NLAS4684/D