NTE2062 Integrated Circuit PMOS Digital Alarm Clock Features: D Single–Chip ED MOS LSI D LED Direct Drive by Time–Sharing (Duplex) D Wide Operating Voltage Range D Alarm on a 24–Hour Basis D Two Selections of Time Format: AM/PM 12–Hour Basis & 24–Hour Basis D On–Chip CR Oscillator for Battery Backup D 50Hz or 60Hz Reference Frequency D Automatic Advance Capable: “Hours”, “Minutes” D Sleep Timer: Max. 59 Minutes or 1Hour, 59 Minutes D Repeatedly Usable Snooze D Power Failure Indicator D 900Hz Output for Alarm Tone Functions: D Real Time Display D Alarm with Snooze D Sleep Timer Applications: D Alarm Clock D Clock Radio Absolute Maximum Ratings: (VSS = 0, TA = +25°C unless otherwise specified) Maximum Supply Voltage, VDDmax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –15 to +0.3V Input Voltage, VIN 50/60Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –15 to +0.3V Other Than 50/60Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –15 to +0.3V Output Voltage, VOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –15 to +0.3V Input Clamp Current, IIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.4 to +0.4mA Allowable Power Dissipation (TA = +70°C), PDmax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 700mW Operating Temperature Range, Topr . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30° to +70°C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55° to +125°C Allowable Operating Ranges: (VSS = 0, TA = +25°C unless otherwise specified) Parameter Symbol Supply Voltage VDD Input “HIGH” Level Voltage VIH Input “LOW” Level Voltage Input Voltage on 50/60Hz VIL VAC–IN Test Conditions Min Typ Max Unit –14 – –7.5 V 50/60Hz Input –1.0 – – V Other Than 50/60Hz Input –1.5 – – V 50/60Hz – – VDD+2 V Other Than 50/60Hz – – VDD+2 V VLED – – V Referenced to VSS Electrical Characteristics: (VDD = –12V, TA = +25°C unless otherwise specified) Parameter Symbol Input “HIGH” Level Current IIH Input “LOW” Level Current IIL Output “HIGH” Level Current IOH Output Leakage Current IOF Test Conditions Min Typ Max Unit VIN = VSS, 50/60Hz – – 10 µA VIN = VDD, Input Pins other than 50/60Hz – – 20 µA VIN = VDD, 50/60Hz – – 10 µA VIN = VDD, Input Pins other than 50/60Hz – – 10 µA Alarm Out, Sleep Out, VOH = VSS–1V 5 – – mA 10’s Hr ag & de (24Hr Mode), VOUT = VSS–1V 36 – – mA Segment Outputs other than above, VOUT = VSS–1V 18 – – mA Alarm Out, Sleep Out, VOUT = VDD – – 10 µA 10’s Hr ag & de (24Hr Mode), VOUT = VDD – – 20 µA Segment Outputs other than above, VOUT = VDD – – 20 µA –7.5 –5.0 – V – 5 7 mA Power Failure Detect Voltage VDD Current Dissipation ICC Output: OFF, Input with Pull–Down Resistor: Open Stability of Oscillator for Backup FS Typical value, 900Hz, VDD = –9V ±10% –10 – +10 % Accuracy of Oscillator for Backup FA Typical value, 900Hz, VDD = –9V ±10% –10 – +10 % Operation Description: 50Hz/60Hz Input: The On–Chip Schmitt Trigger circuit allows a simple RC filter at the input to remove possible line voltage transients. An internal pull–up resistor is provided. CR Input: (Note 1) When AC power–down occurs, the time counter enters the “hold” mode and the on–chip clock oscillator starts operating immediately. If there is no input at “50/60Hz input” during 3–clock period, this oscillator controls the time counter advance instead of “50/60Hz input”. The values of CR determine the frequency of the on–chip clock oscillator. All segment outputs are off during backup operation. If the backup OSC is used at the power–down mode, “50/60Hz input” must be open or at VSS level. 50/60Hz Select Input: Connecting “50/60Hz select” to VSS enables 50Hz operation. For 60Hz operating, “50/60Hz select” is left unconnected: Pull–down to VDD is provided by the internal pull–down resistor. Display Mode Select Input (Alarm Display/Sleep Display): The internal pull–down resistor allows the use of 2 SPST (single–pole single–throw) switches to select 4 display modes listed in Table 1. Table 1. Display Mode Select Input Display Mode Digit No.1 Digit No. 2 Digit No. 3 Digit No. 4 N.C. Time Display 10’s Hour, AM/PM Hour 10’s Minute Minute VSS N.C. Alarm Display 10’s Hour, AM/PM Hour 10’s Minute Minute N.C. VSS Sleep Display Blanked Hour 10’s Minute Minute VSS VSS Seconds Display Blanked Minute 10’s Second Second Alarm Sleep N.C. Note 1. If VSS is applied to 2 input of “alarm display” and “sleep display” simultaneously, the seconds display mode is entered. Operation Description (Cont’d): Time Setting Input: Two setting inputs for ’Hours’ and ’Minutes’ are provided. The application of VSS causes the time setting in Table 2 to occur. An internal pull–down resistor each is provided. Table 2. Setting Contents Display Mode Set Input Time Hour Minute Both Seconds (Alarm & Sleep) Alarm Sleep Functions ’Hours’ are incremented +1 immediately and advance at a 2Hz rate 1/4 to 3/4 seconds later. ’Minutes’ are incremented +1 immediately and advance at a 2Hz rate 1/4 to 3/4 seconds later. Both operations shown above are preformed. Hour (Note 2) ’Seconds’ are cleared to [00]. Minute “Hold” mode. Both (Note 3) ’Hours” and ’Minutes’ are reset to [0:00] (24–Hour basis) or [12:00] (12–Hour basis) Hour ’Hours’ are incremented +1 immediately and advance at a 2Hz rate 1/4 to 3/4 seconds later. Minute ’Minutes’ are incremented +1 immediately and advance at a 2Hz rate 1/4 to 3/4 seconds later. Both ’Hours” and ’Minutes’ are reset to [0:00] (24–Hour basis) or [12:00] (12–Hour basis) – The moment VDD is applied to “Sleep Display”, the sleep counter is set to [:59]. Hour The moment VDD is applied to “Sleep Display” and “Hour Set” simultaneously, the sleep counter is set to [1:59]. Minute The sleep counter counts down at a 2Hz rate. Both The sleep counter counts down at a 2Hz rate. Note 2. When “Seconds” display is at 50 to 59, “Seconds” are reset to [00] and a carry occurs to increment “Minutes” +1. Note 3. Once the reset mode or hold mode is entered, another function is locked until both “Hour Set” input and “Minute Set” inputs are released. 12/24–Hour Select Input: Leaving this pin unconnected (VDD) causes the 12–Hour basis to be selected; connecting this pin to VSS causes the 24–Hour basis to be selected. An internal pull–down resistor is provided. Power Failure Indicator: If the power supply voltage drops and is applied again, all the on–segments flash and the power failure indication mode is entered. The power failure indication mode is released by applying VSS to “Hour Set” or “Minute Set”. Alarm Operation and Alarm Output: When the alarm set time is reached, the alarm signal is delivered. This signal continues to be delivered for 1 hour 59 minutes unless reset by “Alarm Off” or “Snooze Input”. This signal is provided for the tone–signal of 900Hz with 50% duty of 2Hz gated. A simple LPF can be used to turn this alarm signal into DC signal as required. Snooze Input: By momentarily connecting this pin to VSS at the alarm on–state, the alarm output is inhibited for 8 to 9 minutes, after which the alarm signal is delivered again. The snooze function can be used repeatedly for 1 hour 59 minutes. An internal pull–down resistor is provided. By connecting “Snooze Input” to VSS at the alarm off–state, the sleep timer counter is reset to [0:00]. (The sleep timer is reset with one touch). Operation Description (Cont’d): Alarm Off Input: Connecting this input pin to VSS inhibits the alarm output momentarily. An internal pull–down resistor is provided. Sleep Timer and Sleep Output: The sleep output can be used to keep the radio turned on for any period of time up to 59 minutes or 1 hour 59 minutes. Table 2 shows how to select the period (59 minutes or 1 hour 59 minutes). This sleep timer uses a down counter. When the counter contents reach [00], the output stops being delivered, turning off the radio. By connecting “Snooze Input” to VSS at the sleep output on–state, the sleep output is inhibited. Pin Connection Diagram AM & 10’s Hr ag & de 1 28 12/24 Hr Select PM & 10’s Hr b 2 27 CR Input 10’s Hr c & Hr c 3 Hr b & g 4 26 50/60Hz Select 25 50/60Hz Input Hr c & d 5 24 Snooze Input Hr a & f 6 23 Sleep Input 10’s Min a & f 7 22 Hour Set 10’s Min b & g 8 21 Min Set 10’s Min c & d 9 20 VDD 19 Alarm Disp 10’s Min e & Min e 10 Min b & g 11 Min c & d 12 Min a & f 13 18 Alarm Off Colon Out 14 15 VSS 17 Sleep Out 16 Alarm Out 28 15 1 14 1.070 (27.17) Max .338 (8.6) .194 (4.95) .070 (1.78) .910 (23.11) .122 (3.1) Min .400 (10.16)