BB OPA623AP

®
OPA623
OPA
623
OPA
623
Wide Bandwidth, Current-Feedback
OPERATIONAL AMPLIFIER
FEATURES
APPLICATIONS
● BANDWIDTH: 350MHz, 2.8Vp-p
● BROADCAST/HDTV EQUIPMENT
● HIGH OUTPUT CURRENT: ±70mA
● SLEW RATE: 2100V/µs, 5Vp-p
● HIGH-SPEED DIGITAL COMMUNICATIONS
● PULSE/RF AMPLIFIERS
● DIFFERENTIAL GAIN/PHASE: 0.12%/0.05°
● LOW QUIESCENT CURRENT: ±4mA
● LOW INPUT BIAS CURRENT: 1.2µA
● HIGH-SPEED ANALOG SIGNAL
PROCESSING
● LINE DRIVING (50Ω, 75Ω)
● RISE TIME: 1.9ns, 5Vp-p
● SETTLING TIME: 9ns, 0.1%
● DISTRIBUTION AMP
● CRT OUTPUT STAGE DRIVER
● ACTIVE FILTER
The OPA623 operates from a ±5V supply, is specified for the extended industrial temperature range
(–40°C to +85°C), and is available in plastic SO-8
and 8-pin plastic DIP packages.
DESCRIPTION
The OPA623 is a current-feedback operational amplifier designed for precision wide-bandwidth systems
including high-resolution video, RF and IF circuitry,
and communications equipment.
LARGE SIGNAL PULSE RESPONSE
The new circuit design, together with the complementary bipolar process, achieves performance previously unattainable in monolithic integrated circuit
technology.
Output voltage
+2.5V
The current-feedback op amp is optimized for wide
bandwidth, excellent pulse response, gain flatness,
low distortion, and operation at a low quiescent current of ±4mA.
OV
–2.5V
It provides a 350MHz large-signal bandwidth at
2.8Vp-p output voltage, as well as a 2100V/µs slew
rate. The gain flatness of 0.05dB over a 30MHz
bandwidth makes it suitable for HDTV designs. Another feature of the op amp is its high output current
of ±70mA, enabling it to drive two back-terminated
75Ω cables when using the amplifier as a line driver in
video routers, distribution amplifiers, and analog and
digital communications equipment.
Output Voltage - 5Vp-p, 5ns/DIV
RIN
VIN = 2.5Vp-p
180Ω
+VCC
3
2
7
OPA623
6
VOUT = 5.0Vp-p
4
–VCC
R2
R1
300Ω
300Ω
G = 1 + R2/R1 = +2V/V
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
®
©
1991 Burr-Brown Corporation
PDS-1132E
1
Printed in U.S.A. December, 1993
OPA623
SPECIFICATIONS
DC-SPECIFICATION
At VCC = ±5VDC, IQ = ±4mA, RL = 100Ω, RIN = 210Ω, and TAMB = +25°C, unless otherwise specified.
OPA623AP, AU
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
±25
45
–8
125
50
47
39
mV
µV/°C
dB
dB
dB
+INPUT BIAS CURRENT
Initial
vs Temperature
–1.2
7
±4
µA
nA/°C
–INPUT BIAS CURRENT
Initial
vs Temperature
+4.5
340
±20
µA
nA/°C
INPUT OFFSET VOLTAGE
Initial
vs Temperature
vs Supply (tracking)
vs Supply (non-tracking)
vs Supply (non-tracking)
VCC = ±4.5V to ±5.5V
VCC = +4.5V to +5.5V
VCC = –4.5V to –5.5V
INPUT IMPEDANCE
+Input
INPUT NOISE
Voltage Noise Density
Signal-to-Noise Ratio
POWER SUPPLY
Rated Voltage
Derated Performance
Quiescent Current
Rejection Ratio
MΩ || pF
10
89
nV/√ Hz
dB
±3
43
±3.2
50
V
dB
±3
±3.1
±70
0.12 || 1.5
V
mA
Ω || pF
S/N = 0.7/(Vn • √ 5MHz)
INPUT VOLTAGE RANGE
Common-Mode Input Range
Common-Mode Rejection
RATED OUTPUT
Voltage Output
Output Current
Closed-Loop Output Impedance
2.74 || 1
f = 100kHz to 100MHz
RL = 100Ω
Gain = +2
±4.5
±4
±3.5
45
IO = 0mA
±4
50
±5.5
±6
±4.5
VDC
VDC
mA
dB
ELECTRICAL (FULL TEMPERATURE RANGE, –40°C to +85°C)
At VCC = ±5VDC, IQ = ±4mA, RL = 100Ω, and RIN = 210Ω, unless otherwise specified.
OPA623AP, AU
PARAMETER
CONDITIONS
MIN
TYP
INPUT OFFSET VOLTAGE
MAX
UNITS
±30
mV
BIAS CURRENT
+Input
–1.5
±5
µA
BIAS CURRENT
–Input
27
±50
µA
RATED OUTPUT
Voltage Output
RL = 100Ω
±3
±3.1
POWER SUPPLY
Quiescent Current
IO = 0mA
±2
±4
V
±7
mA
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
®
OPA623
2
SPECIFICATIONS
AC-SPECIFICATION
At VCC = ±5VDC, IQ = ±4mA, RL = 100Ω, RIN = 210Ω, and TAMB = +25°C, unless otherwise specified.
OPA623AP, AU
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
FREQUENCY DOMAIN
VO = 2.8Vp-p, Gain = +1V/V
VO = 2.8Vp-p, Gain = +2V/V
VO = 2.8Vp-p, Gain = +5V/V
VO = 2.8Vp-p, Gain = +10V/V
VO = 2.8Vp-p, Gain = –1V/V
VO = 2.8Vp-p, Gain = –2V/V
VO = 5.0Vp-p, Gain = +2V/V
340
350
260
210
360
330
240
MHz
MHz
MHz
MHz
MHz
MHz
MHz
SMALL SIGNAL BANDWIDTH
VO = 0.2Vp-p, Gain = +2V/V
290
MHz
GROUP DELAY TIME
Pin 3 to Pin 6, Gain = +2V/V
1.2
ns
DIFFERENTIAL GAIN
G = +2V/V, f = 4.43MHz, RL = 150Ω
VO = +1.4V
0.12
%
DIFFERENTIAL PHASE
G = +2V/V, f = 4.43MHz, RL = 150Ω
VO = +1.4V
0.05
Degrees
–56
–59
–30
–37
–30
–33
dBc
dBc
dBc
dBc
dBc
dBc
Gain = +2V/V
VO = 2.0Vp-p, DC to 30MHz
VO = 2.0Vp-p, DC to 100MHz
0.05
0.20
dB
dB
Gain = +2V/V, 10% to 90%
VO = 2.0Vp-p
VO = 5.0Vp-p
1.4
1.9
ns
ns
Gain = +2V/V, 10% to 90%
VO = 2.0Vp-p
VO = 5.0Vp-p
1.4
2.6
ns
ns
Gain = +2V/V, Rise Time = 1ns
VO = 0.2Vp-p
VO = 5.0Vp-p
140
2100
V/µs
V/µs
9
ns
Large Signal
Closed-Loop Bandwidth (–3dB)
HARMONIC DISTORTION
Second Harmonic
Third Harmonic
Second Harmonic
Third Harmonic
Second Harmonic
Third Harmonic
GAIN FLATNESS PEAKING
Gain = +2V/V
f = 10MHz, VO = 2.0Vp-p
f = 30MHz, VO = 2.0Vp-p
f = 50MHz, VO = 2.0Vp-p
TIME DOMAIN
Rise Time
Fall Time
SLEW RATE
SETTLING TIME
Gain = +2V/V, Rise Time = 2ns
VO = 2Vp-p, 0.1%
PIN CONFIGURATION
ELECTROSTATIC
DISCHARGE SENSITIVITY
DIP/SO-8
Top View
NC
1
8
NC
–In
2
7
+VCC
+In
3
6
Out
–VCC
4
5
NC
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes
could cause the device not to meet its published specifications.
ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDERING INFORMATION
Power Supply Voltage ......................................................................... ±6V
Input Voltage(1) ........................................................................ ±VCC ±0.7V
Operating Temperature ................................................... –40°C to +85°C
Storage Temperature ..................................................... –40°C to +125°C
Junction Temperature ................................................................... +150°C
Lead Temperature (soldering, 10s) ............................................... +300°C
PRODUCT
PACKAGE
PACKAGE
DRAWING
NUMBER(1)
OPA623AP
OPA623AU
8-Pin Plastic DIP
SO-8 Surface Mount
006
182
TEMPERATURE
RANGE
–40°C to +85°C
–40°C to +85°C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
NOTE: (1) Inputs are internally diode-clamped to ±VCC.
®
3
OPA623
INPUT PROTECTION
The internal protection diodes are designed to withstand
2.5kV (using the Human Body Model) and will provide
adequate ESD protection for most normal handling procedures. However, static damage can cause subtle changes in
the amplifier input characteristics without necessarily destroying the device. In precision amplifiers, such changes
may degrade offset and drift noticeably. For this reason,
static protection is strongly recommended when handling
the OPA623.
The need for protection from static damage has long been
recognized for MOSFET devices, but all semiconductor
devices deserve protection form this potentially damaging
source. The OPA623 incorporates on-chip ESD protection
diodes as shown in Figure 1. These diodes eliminate the
need for external protection diodes, which can add capacitance and degrade AC performance.
As shown, all input pins of the OPA623 are internally
protected from ESD by a pair of back-to-back reverse-biased
diodes to either power supply. These diodes begin to conduct when the input voltage exceeds either power supply by
about 0.7V. This situation can occur when the amplifier
loses its power supplies while a signal source is still present.
The diodes can typically withstand a continuous current of
30mA without destruction. To ensure long-term reliability,
however, the diode current should be limited externally to
approximately 10mA whenever possible.
+VCC
External
Pin
Internal
Circuitry
–VCC
FIGURE 1. Internal ESD Protection.
®
OPA623
ESD Protection diodes internally
connected to all pins.
4
TYPICAL PERFORMANCE CURVES
At VCC = ±5VDC, RL = 100Ω, IQ = ±4mA, RIN = 150Ω, and TAMB = +25°C unless otherwise noted.
OVERLOAD RECOVERY CHARACTERISTICS
25
2.25
20
1.5
15
–Input
10
5
6
4.5
VIN
3
0.75
1.5
VOUT
0
0
–1.5
–0.75
–3
–1.5
0
–4.5
–2.25
–5
+Input
GCL = +2V/V, VIN = 3.75Vp-p, RL = 100Ω, tF = tR = 1ns)
–3
–10
–40
–20
0
20
40
60
80
0
100
10
20
30
40
Quiescent Current (% of final Value)
Input Offset Voltage Change (µV)
100.5
AU
80
70
AP
50
70
80
90
–6
100
40
30
20
10
AP
100
99.5
AU
99
98.5
98
97.5
97
96.5
0
96
0
1
2
3
4
5
6
Time (Minutes)
7
8
9
10
0
1
2
3
4
5
Time (minutes)
QUIESCENT CURRENT vs TEMPERATURE
CLOSED-LOOP OFFSET VOLTAGE vs TEMPERATURE
10
0
9
Quiescent Current (mA)
–2
Offset Voltage (mV)
60
QUIESCENT CURRENT WARMUP
INPUT OFFSET VOLTAGE WARMUP
100
60
50
Time (ns)
Temperature (°C)
90
Output Voltage (V)
3
Input Voltage (V)
Input Bias Current (µA)
INPUT BIAS CURRENT vs TEMPERATURE
30
–4
–6
–8
–10
–12
–14
8
7
6
5
4
3
2
1
0
–40
–16
–40
–20
0
20
40
60
80
100
–20
0
20
40
60
80
100
Temperature (°C)
Temperature (°C)
®
5
OPA623
TYPICAL PERFORMANCE CURVES
(CONT)
At VCC = ±5VDC, RL = 100Ω, IQ = ±4mA, RIN = 150Ω, and TAMB = +25°C unless otherwise noted.
OUTPUT IMPEDANCE vs FREQUENCY
INPUT IMPEDANCE vs FREQUENCY
100
10M
230Ω
100k
10k
3
+
51Ω
6
0dB
OPA623
2 –
Output Impedance (Ω)
Input Impedance (Ω)
1M
10
300Ω
50Ω
300Ω
1
1k
100
1k
10k
100k
1M
10M
100M
0.1
10k
1G
100k
1M
50
2
40
1
30
Delay Time (ns)
Open-Loop Gain (dB)
3
20
10
180Ω
VIN
3
+
6
VOUT
OPA623
2 –
–10
100Ω
0
–1
–6
100M
1G
+
6
300Ω
10M
1M
100M
1G
Frequency (Hz)
SMALL SIGNAL PULSE RESPONSE
SMALL SIGNAL PULSE RESPONSE
160
160
120
120
80
80
Output Voltage (mV)
Output Voltage (mV)
VOUT
50Ω
300Ω
Frequency (Hz)
40
0
–40
–80
–120
–160
50Ω
OPA623
2 –
–7
300k
3G
3
–4
–30
10M
VIN
–3
–5
1M
Group Delay Time
180Ω
–2
–20
–40
300k
100M
GROUP DELAY TIME
OPEN-LOOP GAIN vs FREQUENCY
60
0
10M
Frequency (Hz)
Frequency (Hz)
40
0
–40
–80
–120
GCL= +2V/V, VOUT = 0.2Vp-p, tRISE= tFALL = 1ns (Generator)
0
10
20
30
40
50
60
70
80
90
–160
100
0
Time (ns)
10
20
30
40
50
Time (ns)
®
OPA623
GCL= +10V/V, VOUT = 0.2Vp-p, tRISE= tFALL= 1ns(Generator)
6
60
70
80
90
100
TYPICAL PERFORMANCE CURVES (CONT)
At VCC = ±5VDC, RL = 100Ω, IQ = ±4mA, RIN = 150Ω, and TAMB = +25°C unless otherwise noted.
LARGE SIGNAL PULSE RESPONSE
4
3
3
2
2
Output Voltage (V)
Output Voltage (V)
LARGE SIGNAL PULSE RESPONSE
4
1
0
–1
–2
–3
–4
1
0
–1
–2
–3
GCL = +2V/V, VOUT = 5Vp-p, tRISE = tFALL = 1ns (Generator)
0
10
20
30
40
50
60
70
80
90
GCL = +10V/V, VOUT = 5Vp-p, tRISE= tFALL = 1ns(Generator)
–4
100
0
10
20
30
40
Time (ns)
BANDWIDTH vs OUTPUT VOLTAGE
15
5Vp-p
10
2.8Vp-p
10
2.8Vp-p
5
1.4Vp-p
5
1.4Vp-p
Output Voltage (Vp-p)
Output Voltage (Vp-p)
5Vp-p
0.6Vp-p
–5
0.2Vp-p
–15
–20
–25
dB
300k
0
–10
0.2Vp-p
–15
1M
–25
10M
100M
1G
dB
300k
3G
GCL = +2V/V
1M
10M
1G
3G
1G
3G
BANDWIDTH vs OUTPUT VOLTAGE
20
5Vp-p
15
5Vp-p
10
2.8Vp-p
10
2.8Vp-p
5
1.4Vp-p
5
1.4Vp-p
Output Voltage (Vp-p)
Output Voltage (Vp-p)
100M
Frequency (Hz)
15
0.6Vp-p
–5
0.2Vp-p
–15
0
0.6Vp-p
–5
–10
–15
0.2Vp-p
–20
–20
GCL = +10V/V
–25
dB
300k
dB
300k
100
0.6Vp-p
BANDWIDTH vs OUTPUT VOLTAGE
–25
90
–20
GCL = +1V/V
20
–10
80
–5
Frequency (Hz)
0
70
20
15
–10
60
BANDWIDTH vs OUTPUT VOLTAGE
20
0
50
Time (ns)
1M
10M
100M
1G
3G
GCL = –2V/V
1M
10M
100M
Frequency (Hz)
Frequency (Hz)
®
7
OPA623
TYPICAL PERFORMANCE CURVES
(CONT)
At VCC = ±5VDC, RL = 100Ω, IQ = ±4mA, RIN = 150Ω, and TAMB = +25°C unless otherwise noted.
GAIN FLATNESS
FREQUENCY RESPONSE vs CLOAD
4
GCL = +2V/V, VIN = 1.4Vp-p
47pF
3
2
22pF
Gain (5dB/Div)
1
2pF
3
R2
R1
CL
6
2
300Ω
270Ω
240Ω
120Ω
300Ω 2pF
270Ω 10pF
240Ω 22pF
120Ω 47pF
0
Gain (dB)
10pF
–1
–2
51Ω
CL
R1
–3dB
–3
DUT
50Ω
–4
R2
–5
GCL = +2V/V, VIN = 1.0Vp-p
–6
100k
1M
10M
100M
1G
1M
100k
45
Average Supply Current IQ (mA)
–10
–20
2f
–40
3f
–60
–70
–80
1G
Sine Curve
RL = 100Ω
G = +2V/V
CL = 2pF
40
35
2.8Vp-p
30
25
5.0Vp-p
1.4Vp-p
20
15
10
0.2Vp-p
5
0
–90
1M
10M
10k
100M
100k
Frequency (Hz)
1M
10M
100M
1G
Frequency (Hz)
FREQUENCY RESPONSE vs RLOAD
SPECTRAL NOISE VOLTAGE DENSITY
100
500Ω
Voltage Noise nV/√Hz
200Ω
100Ω
Gain (5dB/DIV)
Harmonic Distortion (dBc)
50
–50
100M
AVERAGE SUPPLY CURRENT vs FREQUENCY
HARMONIC DISTORTION vs FREQUENCY
0
–30
10M
Frequency (Hz)
Frequency (Hz)
50Ω
GCL = +2V/V, R1 = R2 = 300Ω, VIN = 1.0Vp-p
100k
1M
10M
100M
1
1G
3G
100
Frequency (Hz)
1k
10k
100k
Frequency (Hz)
®
OPA623
10
8
1M
10M
DISCUSSION OF
PERFORMANCE
For most circuit configurations, the OPA623 currentfeedback op amp can be treated like a conventional op
amp. As with a voltage-feedback op amp, the feedback
network connected to the inverting input controls the
closed-loop gain. But with a current-feedback op amp, the
impedance of the feedback network also controls the
open-loop gain and frequency response. Feedback resistor values can be selected to provide nearly constant
closed-loop bandwidth over a wide range of gains and flat
gain adjustment vs frequency.
Requiring very low quiescent power, the OPA623 achieves
its exceptional AC performance by using the current-feedback topology. This wide-band monolithic operational amplifier is designed for gain applications of up to 20V/V,
where power and cost are of primary concern.
Operating from a ±5V supply, the OPA623 consumes only
40mW, yet maintains a 350MHz large-signal bandwidth at
VOUT = 2.8Vp-p and a 2100V/µs slew rate. Benefiting
from the current-feedback architecture, the OPA623 offers
stable operation with no compensation capacitor, even at
unity gain.
DESCRIPTION
A wide-band operational transconductance amplifier (OTA)
and an output buffer are the main blocks of a currentfeedback op amp. The simplified circuit diagram is illustrated in Figure 2. The OTA consists of a complementary
unity-gain amplifier and a subsequent current mirror. The
input buffer is connected across the inputs of the op amp.
The voltage at the high-impedance +In terminal is transferred to the –In terminal at a low impedance. The current
mirrors reflect any current flowing into or out of the +In
terminal by a fixed ratio to the high-impedance OTA output,
which is directly connected to the complementary output
buffer. It is designed to drive low-impedance transmission
With its low differential gain and phase errors of typically
0.12% and 0.05° at 4.43MHz, the OPA623 meets the performance and cost requirements of high-volume broadcast and
HDTV applications.
The OPA623’s large-signal bandwidth, high slew rate,
excellent pulse response, and high drive capabilities are
features well-suited to wide-band RGB video applications, RF instruments, and even high-speed digital communication systems.
+VCC = +5V
7
+In
Bias
Circuitry
–In
2
3
6
VOUT
OTA
BUFFER
4
–VCC = –5V
FIGURE 2. Simplified Circuit Diagram.
®
9
OPA623
+VCC
7
B1
RIN
VIN
6
Out
3
2
+In
–In
VOUT
R2
R1
–VCC
4
FIGURE 3. Non-Inverting Current-Feedback Op Amp Configuration.
lines or loads. The buffer output is not current-limited or
protected.
RT
As can be seen in Figure 3, the feedback in the form of a
current is applied through R2 to the low-impedance inverting
input, and the size of R2 || R1 determines the open-loop gain
of the op amp.
–1
TD
6
Out
3
gm
The hybrid model shown in Figure 4 describes the AC
behavior of a wide-band current-feedback op amp that is not
internally compensated. The open-loop frequency response,
which is illustrated in Figure 5 for various R2 values, is
determined by two time constants. The elements R and C
between the current source output and the output buffer form
the dominant open-loop pole TC. The signal delay time TD
modelled in the output buffer combines several small phaseshifting time constants and delay times. They are distributed
throughout the amplifiers and are also present in the feedback loop. As shown in Figure 5, increasing R2 || R1 leads to
a decreasing open-loop gain. The ratio of the two time
constants TC and TD also determines the product GOL • GCL
for optimal closed-loop frequency response:
R2
+In
2
–In
R1
FIGURE 4. Hybrid Model OPA623.
provides a nearly constant closed-loop bandwidth, as shown
in Figure 6 for various gains with an optimal flat frequency
response. This behavior stands in contrast to op amps that
are internally compensated for stable unity-gain operation,
where the bandwidth is inversely proportional to the closedloop gain, sharply limiting the bandwidth and slew rate at
high output levels and gains.
TC
GOL = G+CL• 2T
D
In general, lower feedback resistors produce wider bandwidth, more frequency response peaking, and more pulse
response overshooting. Higher feedback resistors results in
an overdamped response with little or no peaking and
overshooting.
The two time constants TC and TD, however, are fixed by the
op amp design. But varying R2 || R1 externally in the
feedback loop allows for variation of the open-loop gain
GOL versus the closed-loop gain GCL. This keeps the product
GOL * GCL constant, which is the theoretical condition for
optimally flat frequency response.
Component pin and layout capacitances together with trace
and wire board inductances from a resonant IC circuit can
lead to oscillations of several hundreds of MHz. This very
high frequency oscillation leads to an excessive increase in
supply current which can destroy the device.
This variation may be beneficial when driving high capacitive loads. Setting the open-loop gain externally also allows
the circuit to be optimized to a wide range of capacitive
loads, as shown in Figure 7 for a closed-loop gain of
+2V/V and a capacitive load of up to 47pF.
A resistor (100Ω to 250Ω) in series and close to the highimpedance, non-inverting input damps the LC circuit and
generates a safe operation.
It should be noted here that higher open-loop gain (resulting
from lower feedback resistors) also yields lower distortion.
THERMAL CONSIDERATIONS
The OPA623 does not require a heat sink for operation in
most environments. The use of a heat sink, however, will
With external control of the open-loop characteristics of the
op amp, dynamic behavior can be tailored to individual
application requirements, and the open-loop gain selection
®
OPA623
CT
10
FREQUENCY RESPONSE vs CLOAD
GCL = +2V/V, VIN = 1.4Vp-p
Gain (5dB/Div)
10pF
2pF
3
300Ω
270Ω
240Ω
120Ω
20
150Ω
10
300Ω
–10
–20
100M
1M
51Ω
CL
R1
50Ω
R2
10M
100M
1G
FIGURE 7. Frequency Response vs CLOAD.
27Ω
10M
6
DUT
Frequency (Hz)
45
1M
300Ω 2pF
270Ω 10pF
240Ω 22pF
120Ω 47pF
100k
50
–30
100k
CL
2
40
0
R2
R1
50
30
47pF
22pF
Average Supply Current IQ (mA)
Open-Loop Gain (dB)
reduce the internal thermal rise, resulting in cooler, more
reliable operation. At extreme temperatures and under full
load conditions a heat sink is necessary. The internal power
dissipation is given by the equation PD = PDQ + PDL, (PDQ
is the quiescent power dissipation and PDL is the power
dissipation in the output stage due to the load). Although the
PDQ is very low (40mW at VCC = ±5V), care should be taken
when a signal is applied. For high-speed op amps, a more
precise approach to determine power consumption is to
measure the average total quiescent current for several
typical load conditions. The power consumption of the
OPA623 is influenced by the kind of signal, the applied
signal frequency, the output voltage, load resistor, and the
repetition rate of the signal transitions. Figure 8 shows the
average supply current versus the frequency of an applied
sine wave for various output voltages. Figure 9 illustrates the
average supply current versus the repetition frequency of an
applied square wave signal.
Sine Curve
RL = 100Ω
G = +2V/V
CL = 2pF
40
35
2.8Vp-p
30
25
5.0Vp-p
1.4Vp-p
20
15
10
0.2Vp-p
5
0
1G
10k
100k
Frequency (Hz)
1M
10M
100M
1G
Frequency (Hz)
FIGURE 5. Open-Loop Gain vs R2 || R1.
FIGURE 8. Average Supply Current vs Frequency
(sinewave).
20
25
15
+10V/V
Average Supply Current IQ(mA)
Gain (5dB/DIV)
10
+2V/V
5
0
–5
+1V/V
–1V/V
–10
–15
–20
–25
–30
100k
20
15
10
5.0Vp-p
2.8Vp-p
5
1.4Vp-p
G = +2V/V
CL = 2pF
RL = 100Ω
0.2Vp-p
1M
10M
100M
0
10k
1G
Frequency (Hz)
100k
1M
10M
100M
Frequency (Hz)
FIGURE 6. Optimum Frequency Response vs Closed-Loop
Gain.
FIGURE 9. Average Supply Current vs Frequency
(squarewave).
®
11
OPA623
CIRCUIT LAYOUT
The high-frequency performance of the operational amplifier OPA623 can be greatly affected by the physical layout
of the printed circuit board. The following tips are offered as
suggestions. Oscillations, ringing, poor bandwidth and settling, and peaking are all typical problems that plague highspeed components when they are used incorrectly.
• A resistor (100Ω to 250Ω) in series and close to the highimpedance, noninverting input is necessary to reduce
peaking; this resistor prevents any very high-frequency
oscillations at the op amp input, which can lead to an
excessive increase in quiescent current.
• Bypass power supplies very close to the device pins. Use
tantalum chip capacitors (approximately 2.2µF) with a
parallel 470pF ceramic chip capacitor. Surface-mount
types are recommended because of their low lead inductance. Although the OPA623 operates at a low quiescent
current, high charging and discharging currents flow
during steep transitions.
• Make short low-inductance traces. The entire physical
circuit should be as small as possible.
• Use a low-impedance ground plane on the component
side to ensure that low-impedance ground is available
throughout the layout, however, do not extend the ground
plane under high-impedance nodes such as the amplifier’s
input terminals, which are sensitive to stray capacitances.
• Sockets are not recommended because they add significant inductance and parasitic capacitance.
• Use low-inductance, surface-mounted components. Circuits using all surface-mount components with the
OPA623AU will offer the best AC performance.
• Plug-in prototype boards and wire-wrap boards will not
function well. A clean layout using RF techniques is
essential—there are no shortcuts.
• Make the feedback trace as short as possible. The inverting input is sensitive to stray capacitances that lead to
peaking in the frequency response. A stray capacitance at
the inverting input increases the gain at high frequencies.
• PC board traces for power lines should be wide to reduce
impedance and inductance.
Non Inverting
Ri
In+
2
R3
50Ω
RO
50Ω
7
3
OPA623
6
Out
4
R1
+5V
7
C1
470pF
C3
10nF
C5
2.2µF
C2
470pF
C4
10nF
C6
2.2µF
Gnd
R2
–5V
Inverting
Ri
2
RO
50Ω
7
3
OPA623
4
6
Out
4
RN1
R1
In–
RN2
FIGURE 10. Circuit Schematic for Non-inverting and Inverting Configuration. Refer to Table I for Resistor Values.
OPA623AP
OPA623AU
GAIN
COMPONENT
Ri
R1
R2
RN1
RN2
Typical
Bandwidth (MHz)
VOUT = 0.2Vp-p
VOUT = 2.8Vp-p
GAIN
–2
–1
+1
+2
+5
+10
–2
–1
+1
+2
+5
+10
150Ω
390Ω
—
200Ω
68Ω
150Ω
390Ω
—
390Ω
56Ω
200Ω
360Ω
—
—
—
180Ω
300Ω
300Ω
—
—
100Ω
300Ω
75Ω
—
—
100Ω
130Ω
15Ω
—
—
150Ω
390Ω
—
200Ω
68Ω
150Ω
390Ω
—
390Ω
56Ω
270Ω
470Ω
—
—
—
180Ω
300Ω
300Ω
—
—
100Ω
300Ω
76Ω
—
—
100Ω
160Ω
18Ω
—
—
200
330
—
360
320
340
290
350
—
260
170
210
200
330
—
360
320
340
290
350
—
260
170
210
TABLE I. Recommended Component Values.
®
OPA623
12
APPLICATIONS INFORMATION
RIN
The precise pulse response and high slew rate enables the
OPA623 to be used in digital communication systems.
Figure 12 shows the circuit schematic of an output amplifier
with a gain of +2V/V, which can drive a 75Ω coaxial cable
with a high-speed data stream of 140Mbit/s. Figure 13, for
a binary 0, and Figure 14, for a binary 1, shows the pulse
masks of the CCITT recommendation G.703 and the corresponding pulse responses of the OPA623. The signal code at
the file rate of 139.264Mbit/s is CMI, the signal amplitude
is 1Vp-p with ±11dB amplitude limits. Naturally, the OPA623
can also be used for HDB3 encoded 34Mbit/s,155Mbit/s,
STM-1, and 155Mbit/s B-ISDN transmission systems.
VIN
180Ω
+VCC
3
7
6
+In
OPA623
2
4
–In
VOUT
–VCC
R2
R1
300Ω
300Ω
G = 1 + R2/R1 = +2V/V
FIGURE 12. Driver Amplifier for a Digital 140Mbit/s
Transmission system.
T = 7.18ns
V
0.60
0.55
0.50
0.45
0.40
1ns
0.1ns
1.795ns
0.1ns
0.35ns
Nominal
Pulse
1.795ns
1ns
0.35ns
1ns
0.1ns
0.1ns
0.05
Nominal
zero level(2)
–0.05
–0.40
1ns
–0.45
1.795ns
1ns
1.795ns
1ns
–0.50
–0.55
–0.60
= Note 1.
Negative
transitions
Positive transition
at mid-unit interval
NOTE: (1) The maximum “steady state” amplitude should not exceed the 0.55V limit. Overshoots and other transients are permitted to fall
into the dotted area, bounded by the amplitude levels 0.55V and 0.6V, provided that they do not exceed the steady state level by more
than 0.05V. The possibility of relaxing the amount by which the overshoot may exceed the steady state level is under study.
(2) For all measurements using these masks, the signal should be AC coupled, using a capacitor of not less than 0.01µF, to the input of
the oscilloscope used for measurements.
The nominal zero level for both masks should be aligned with the oscilloscope trace with no input signal. With the signal then applied, the
vertical position of the trace can be adjusted with the objective of meeting the limits of the masks. Any such adjustment should be the
same for both masks and should not exceed ±0.05V. This may be checked by removing the input signal again and verifying that the trace
lies within ±0.05V of the nominal zero level of masks.
(3) Each pulse in a coded pulse sequence should meet the limits of the relevant mask, irrespective of the state of the preceding and
succeeding pulses. For actual verification, if a 139264kHz timing signal associated with the source of the interface signal is available, its
use as a timing reference for an oscilloscope is preferred. Otherwise, compliance with the relevant mask may be tested by means of all-0s
and all-1s signals, respectively. (In practice, the signal may contain frame alignment bits per Rec. G.751.)
(4) For the purpose of these masks, the rise time and decay time should be measured between –0.4V and 0.4V, and should not exceed
2ns.
FIGURE 13. Mask of a Pulse Corresponding to a Binary 0 per CCITT Recommendation G.703.
®
13
OPA623
T = 7.18ns
V
0.60
0.55
0.50
0.45
0.40
1ns
0.1ns
Nominal
Pulse
0.1ns
1ns
0.5ns 0.5ns
0.05
Nominal
(2)
zero level
–0.05
3.59ns
3.59ns
1.35ns
1.35ns
1ns
–0.40
1ns
–0.45
1.795ns
1.795ns
–0.50
–0.55
–0.60
Negative
transition
Positive transition
= Note 1.
NOTE: (1) The maximum “steady state” amplitude should not exceed the 0.55V limit. Overshoots and other transients are permitted to
fall into the dotted area, bounded by the amplitude levels 0.55V and 0.6V, provided that they do not exceed the steady state level by
more than 0.05V. The possibility of relaxing the amount by which the overshoot may exceed the steady state level is under study.
(2) For all measurements using these masks, the signal should be AC coupled, using a capacitor of not less than 0.01µF, to the input of
the oscilloscope used for measurements.
The nominal zero level for both masks should be aligned with the oscilloscope trace with no input signal. With the signal then applied,
the vertical position of the trace can be adjusted with the objective of meeting the limits of the masks. Any such adjustment should be
the same for both masks and should not exceed ±0.05V. This may be checked by removing the input signal again and verifying that the
trace lies within ±0.05V of the nominal zero level of masks.
(3) Each pulse in a coded pulse sequence should meet the limits of the relevant mask, irrespective of the state of the preceding and
succeeding pulses. For actual verification, if a 139264kHz timing signal associated with the source of the interface signal is available, its
use as a timing reference for an oscilloscope is preferred. Otherwise, compliance with the relevant mask may be tested by means of all0s and all-1s signals, respectively. (In practice, the signal may contain frame alignment bits per Rec. G.751.)
(4) For the purpose of these masks, the rise time and decay time should be measured between –0.4V and 0.4V, and should not exceed
2ns.
(5) The inverse pulse will have the same characteristics. Note that the timing tolerance at the zero level of the negative and positive
transitions are ±0.1ns and ±0.5n, respectively.
FIGURE 14. Mask of a Pulse Corresponding to a Binary 1 per CCITT Recommendation G.703.
®
OPA623
14
tRISE = 0.7ns
tFALL = 0.7ns
0.8Vp-p
0
50Ω
tRISE = 1.85ns
tFALL = 1.95ns
+5V
7
150Ω
3
tRISE = 3.0ns
tFALL = 2.3ns
+80V; 60mA
4Vp-p
24Ω
6
OPA623
Pulse
Generator
50pF
1
CR3425
9
2
50Ω
VOUT
50Vp-p
12pF
4
CLOAD
287Ω
–5V
470Ω
120Ω
4Vp-p
VOUT CR3425
50Vp–p
10V/div
750mV/div
VOUT OPA623
6.8pF
10ns/div
10ns/div
FIGURE 15. Video Amplifier for High Resolution Monitor (1600 x 1200 pixel).
330Ω
330Ω
2
150Ω
Video
Input
OPA623
75Ω
6
75Ω Transmission Line
VOUT
3
75Ω
75Ω
75Ω
VOUT
75Ω
75Ω
VOUT
High output current drive capability (6Vp-p
into 50Ω) allows three back-terminated 75Ω
transmission lines to be simutaleously driven.
75Ω
FIGURE 16. Video Distribution Amplifier.
®
15
OPA623