ETC PI74ALVTC16820

PI74ALVTC16820
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2.5V 10-Bit Flip-Flop with
Dual and 3-State Outputs
Product Features
Product Description
• PI74ALVTC16820 is designed for low-voltage operation,
VDD = 1.65V to 3.6V
• Supports Live Insertion
• 3.6V I/O Tolerant Inputs and Outputs
• Bus Hold
• High Drive, –32/64mA @ 3.3V
• Uses patented noise reduction circuitry
• Power-off high impedance inputs and outputs
• Industrial operation: –40°C to +85°C
• Packages available:
– 56-pin 240-mil wide plastic TSSOP (A)
– 56-pin 173-mil wide plastic TVSOP (K)
Pericom Semiconductor’s PI74ALVTC series of logic circuits are
produced using the Company’s advanced 0.35 micron CMOS
technology, achieving industry leading speed.
The PI74ALVTC16820, a 10-bit flip-flop designed for 1.65V to 3.6V
VCC operation, offers edge-triggered D-type flip-flops. On the
positive transition of clock (CLK) input, the device provides true
data at the Q outputs.
A buffered output-enable (OE) input can be used to place the ten
outputs in either a normal logic state (HIGH or LOW level) or a highimpedance state in which outputs neither load nor drive the bus
lines significantly. This high-impedance state and increased drive
provide drive bus lines without interface or pullup components.
OE does not affect the internal operation of the flip-flops. Old data
can be retained or new data can be entered while the outputs are in
the high-impedance state.
To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pullup resistor whose
minimum value is determined by the current sinking capability of
the driver.
To prevent “floating” inputs and to eliminate pullup/down resistors,
the family offers both I/O Tolerant, which allows it to operate in
mixed 1.65/3.6V systems, and “Bus Hold,” which retains the data
input’s last state.
Logic Block Diagram
1OE
2OE
CLK
D1
1
28
2
56
55
C1
1D
3
1Q 1
1Q 2
TO 9 OTHER CHANNELS
1
P0.2
04/09/02
PI74ALVTC16820
2.5V 10-Bit Flip-Flop with
Dual and 3-State Outputs
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Truth Table(1)
Pin Description
Pin Name
D e s cription
Pin Name
Description
OE
O utput Enable Input (Active LO W)
Ax
Clock Input (Active HIGH)
Yx
3- State O utputs
GND
Ground
Vcc
Power
OE1
L
L
H
X
Note:
1. H
L
X
Z
Pin Configuration
1OE
1Q1
1Q2
GND
2Q1
2Q2
VCC
3Q1
3Q2
4Q1
GND
4Q2
5Q1
5Q2
6Q1
6Q2
7Q1
GND
7Q2
8Q1
8Q2
VCC
9Q1
9Q2
GND
10Q1
10Q2
2OE
1
56
2
55
3
54
4
53
5
52
6
51
7
50
8
49
9
48
10
47
11
46
12 56-Pin 45
13 A, K 44
14
43
15
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33
25
32
26
31
27
30
28
29
=
=
=
=
Inputs
OE2
L
L
X
H
A
L
H
X
X
Outputs
Y
L
H
Z
Z
High Signal Level
Low Signal Level
Irrelevant
High Impedance
CLK
D1
NC
GND
D2
NC
VCC
D3
NC
D4
GND
NC
D5
NC
D6
NC
D7
GND
NC
D8
NC
VCC
D9
NC
GND
D10
NC
NC
2
P0.2
04/09/02
PI74ALVTC16820
2.5V 10-Bit Flip-Flop with
Dual and 3-State Outputs
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Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Supply Voltage Range, VDD ............................................................................................. –0.5V to 4.6V
Input Voltage Range, VI ..................................................................................................... –0.5V to 4.6V
Output Voltage Range, VO (3-Stated) ............................................................ –0.5V to 4.6V
Output Voltage Range, VO(1) (Active) ................................................. –0.5V to VDD +0.5V
DC Input Diode Current (IIK) VI < 0V ...................................................................... –50mA
DC Output Diode Current (IOK)
VO < 0V ................................................................................................................. –50mA
VO > VDD .......................................................................................................................................... ±50mA
DC Output Source/Sink Current (IOH/IOL) ....................................................... –64/128mA
DC VDD or GND Current per Supply Pin (ICC or GND) .......................................... ±100mA
Storage Temperature Range, Tstg ................................................................ –65°C to150°C
Note:
Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Recommended Operating Conditions(2)
VDD
Supply voltage
M in.
M ax.
Operating
1.65
3.6
Data Retention Only
1.2
3.6
2.0
VIH
High- level input voltage
VDD = 2.7V to 3.6V
VIL
Low- level input voltage
VDD = 2.7V to 3.6V
VI
Input voltage
VO
Output voltage
Output current in IOH/IOL
Dt/Dv
TA
0.8
–0.3
3.6
Active State
0
VDD
Off State
0
3.6
VDD =
VDD =
VDD =
VDD =
3.0V to 3.6V
3.0V to 3.6V
2.3V to 2.7V
1.65V to 1.95V
Input transistion rise or fall rate(3)
Operating free- air temperature
Units
V
–32/64
±24
±18
±6
mA
0
10
ns/V
-40
85
C
Notes:
1. Absolute maximum of IO must be observed.
2. Unused control inputs must be held HIGH or LOW to prevent them from floating.
3 As measured between 0.8V and 2.0V, VDD = 3.0V.
3
P0.2
04/09/02
PI74ALVTC16820
2.5V 10-Bit Flip-Flop with
Dual and 3-State Outputs
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Electrical Characteristics
(Over Recommended Operating Free-Air Temperature Range, unless otherwise noted; continued from previous page)
DC Characteristics (2.7V<VDD ≤ 3.6V)
Parame te r
VIK
VOH
Input Clamp Diode
HIGH Level Output Voltage
Conditions
IIK = -18mA
VDD
3.0
2.7 - 3.6
VDD – 0.2
IOH = -12mA
2.7
2.2
IOH = -18mA
M ax.
3.0
2.2
2.0
IOL = 100mA
2.7 - 3.6
0.2
IOL = 12mA
2.7
0.4
IOL = 18mA
V
0.4
IOL = 24mA
0.45
3.0
IOL = 32mA
0.5
IOL = 64mA
0.55
II
Input Leakage Current
VI = VDD, or GND
3.6
±5.0
IOZ
3- State Output Leakage
VO = 3.6V
2.7
±10
IOFF
Power- OFF Leakage Current
VI or VO £ 3.6V
0
10
IHOLD
IDD
DIDD
Bus Hold Current
A or B Outputs
Quiescent Supply Current
Increase in IDD per input
Units
2.4
IOH = -32mA
LOW Level Output Voltage
Typ.
–1.2
IOH = -100mA
IOH = -24mA
VOL
M in.
VI = 0.8V
3.0
VI = 2.0V
VI = 0 to 3.6V
3.6
VI = VDD or GND
VDD £ (VI,VO) £ 3.6V
VIH = VDD –0.6V,
Other inputs at VDD or Gnd
4
75
–75
±500
mA
50
2.7 - 3.6
±50
400
P0.2
04/09/02
PI74ALVTC16820
2.5V 10-Bit Flip-Flop with
Dual and 3-State Outputs
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Electrical Characteristics
(Over Recommended Operating Free-Air Temperature Range, unless otherwise noted; continued from previous page)
DC Characteristics (2.3V ≤VDD ≤ 2.7V)
De s cription
VIK
Parame te rs
Conditions
Input Clamp Diode
IIK = –18mA
HIGH Level Output Voltage
Typ.
IOH = –12mA
1.8
1.7
2.3 - 2.7
V
0.2
IOL = 12mA
LOW Level Output Voltage
0.4
IOL = 18mA
0.5
2.3
IOL = 24mA
0.55
II
Input Leakage Current
VI = VDD or GND
2.7
±5.0
IOZ
3- State Output Leakage
VO
2.3
±10
IOFF
Power- OFF Leakage Current
VI or VO £
0
10
Bus Hold Current
A or B Outputs
VI = 0.7V
IHOLD(1)
IDD
DIDD
V
= 3.6
V
3.6
Increase in IDD per input
–90
VI = VDD or GND
40
VDD £ (VI,VO) £ 3.6V
±40
VIH = VDD –0.6V,
Inputs at VDD or Gnd
A
m
90
2.5
VI = 1.7V
Quiescent Supply Current
Units
VDD– 0.2
2.3
IOL = 100mA
M ax.
–1.2
2.3 - 2.7
IOH = –18mA
VOL
M in.
2.3
IOH = –100mA
VOH
VDD
2.3 - 2.7
A
m
400
DC Characteristics (1.65V ≤ VDD ≤ 1.95V)
D e s cription
Parame te rs
VIK
Input Clamp Diode
VOH
HIGH Level O utput Voltage
VOL
LO W Level O utput Voltage
Conditions
IIK = –18mA
VDD
M in.
Typ.
1.65
IOH = –100mA
1.65- 1.95
IOH = –6mA
M ax.
–1.2
VDD –0.2
1.4
V
1.65
IOL = 100mA
0.2
IOL = 6mA
0.3
II
Input Leakage Current
VI = VDD or GND
1.95
±5.0
IOZ
3- State O utput Leakage
VO =
1.65
±10
IOFF
Power- O FF Leakage Current
VI = VO £
0
10
Bus Hold Current
A or B O utputs
VI = 0.4
IHOLD(1)
IDD
DIDD
Q uiescent Supply Current
Increase in IDD per input
Units
V
3.6
V
3.6
1.65
VI = 1.3
VI = VDD or GND
VDD £ (VI,VO) £ 3.6V
VI = VDD –06V,
O ther inputs at VDD or Gnd
50
A
–50
m
20
1.65- 1.95
±20
400
Note:
1. Not Guaranteed
5
P0.2
04/09/02
PI74ALVTC16820
2.5V 10-Bit Flip-Flop with
Dual and 3-State Outputs
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Timing Requirements
(Over recommended operating free-air temperature range, unless otherwise noted, see Figures 1 thru 4)
VCC = 1.8V ±0.15V
M in.
fclock Clock Frequency
M ax.
VCC = 2.5V ±0.2V
VCC = 3.3V ±0.3V
M in.
M in.
150
M ax.
180
3
3
3
tsu Setup time, data before CLK­
3.8
3.5
2.5
0
0
0
th Hold time, data after CLK­
M ax.
180
tw Pulse duration, CLK high or low
Units
MHz
ns
Switching Characteristics
Over recommended operating free-air temperature range, unless otherwise noted, see Figures 1 thru 4)
Parame te rs
From
(Input)
To
(Output)
VCC = 1.8V ±0.15V
M in.
M ax.
150
fmax
VCC = 2.5V ±0.2V
M in.
M ax.
180
VCC = 3.3V ±0.3V
M in.
180
MHz
tpd
CLK
Q
5.5
1.0
4.0
1.0
3.6
ten
OE
Q
5.0
1.6
4.0
1.6
3.0
tdis
OE
Q
6.0
2.2
4.0
2.2
3.0
6
Units
M ax.
ns
P0.2
04/09/02
PI74ALVTC16820
2.5V 10-Bit Flip-Flop with
Dual and 3-State Outputs
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Test Circuits and Switching Waveforms
Switch Position
Parameter Measurement Information (VDD = 1.65V - 3.6V)
3.3V/2.5V VDD
2 x VDD
R1
500Ω
From Output
Under Test
Open
30pF
CL
RL
500Ω
Te s t
S1
tPD
Open
tPLZ/tPZL
2 x VDD
tPHZ/tPZH
GND
GND
Pulse Width
(See Note A)
VDD
Low-High-Low
Pulse
VDD/2
0V
tW
1.8V VDD
2 x VDD
VDD
High-Low-High
Pulse
R1
1kΩ
From Output
Under Test
VDD/2
0V
Open
30pF
CL
RL
1kΩ
GND
Propagation Delay
(See Note A)
VDD
VDD/2
0V
Input
tPLH
Setup, Hold, and Release Timing
Data
Input
tSU
Timing
Input
tH
tPHL
VDD
VDD/2
VOL
Output
VDD
VDD/2
0V
tPHL
tPLH
VDD
VDD/2
0V
Opposite Phase
Input Transition
VDD
VDD/2
0V
Enable Disable Timing
Notes:
A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions
such that the output is LOW except when disabled by
the output control.
Waveform 2 is for an output with internal conditions
such that the output is HIGH except when disabled by
the output control.
C. All input pulses are supplied by generators having the
following characteristics: PRR ≤ 10 MHz, ZO = 50Ω,
tr ≤ 2ns, tf ≤ 2ns, measured from 10% to 90%, unless
otherwise specified.
D. The outputs are measured one at a time with one
transition per measurement.
VDD
Output
Control
(Active LOW)
VDD/2
0V
tPLZ
tPZL
VDD
Output
Waveform 1
S1 at 2xVDD
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
7
VDD
VDD/2
+0.15V
tPZH
VOL
tPHZ
-0.15V
VOH
VDD/2
0V
P0.2
04/09/02
PI74ALVTC16820
2.5V 10-Bit Flip-Flop with
Dual and 3-State Outputs
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56-Pin TSSOP (A) Package
56
.236
.244
1
.547
.555
6.0
6.2
13.9
14.1
1.20
SEATING PLANE
.047
Max.
.004 0.09
.008 0.20
.0197
BSC
0.50
.007
.011
0.17
0.27
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
0.45 .018
0.75 .030
.002
.006
0.05
0.15
.319 BSC
8.1
56-Pin SSOP (V) Package
56
.291
.299
7.39
7.59
.396
.416
10.06
10.56
Gauge Plane
.010 0.25
1
.720 18.29
.730 18.54
.02
.04
0.51
1.01
.015 0.381 x 45˚
.025 0.635
.008
0.20
Nom.
.110 2.79 Max
.025 BSC
0.635
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
.008
.0135
0.20
0.34
0-8˚
.008 0.20
.016 0.40
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
8
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04/09/02