PI90LV019 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Single Bus LVDS Transceiver Features Description • • • • • The PI90LV019, differential line driver and receiver (transceiver), is compliant to IEEE1596.3 SCI and ANSI/TIA/ EIA-644LVDS standards. The logic interface provides maximum flexibility resulting from four separate lines that are provided: DIN, DE, RE, and ROUT. These devices also feature flow through which allows easy PCB routing for short stubs between the bus pins and the connector. • • • • Balanced Output Impedance Light Bus Loading: 5pF typical Glitch-free power up/down (Driver Disabled) High Signaling Rate Capability: >500 Mbps Driver: – ±350mV Differential Swing into: – 100-ohm load (PI90LV019) Receiver: – Accepts ±50mV (min.) Differential Swing with up to 2.0V ground potential difference – Propagation Delay of 3.3ns typ. – Low Voltage TTL (LVTTL) Outputs – Open, Short, and Terminated Fail Safe Bus terminal ESD exceeds 9kV Industrial Temperature Operation (–40°C to +85°C) Packaging: (Pb-free & Green available) 14-lead SOIC (W) and 14-lead TSSOP (L) The driver translates between TTL levels (single-ended) to Low Voltage Differential Signaling levels. This allows for high-speed operation, while consuming minimal power with reduced EMI. In addition the differential signaling provides common mode noise rejection of ±1V. Pin Configuration Block Diagram DIN D0+ D0– DE 06-0018 1 14 VCC DIN 2 13 NC NC 3 14-Pin 12 4 L, W 11 ROUT RE ROUT DE DO+ DO– NC 5 10 RI+ RI+ NC 6 9 RI– RI– GND 7 8 RE 1 PS8614C 03/06/06 PI90LV019 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Absolute Maximum Ratings(1,2) Supply Voltage (VCC) ............................................................ 3.6V Enable Input Voltage (DE, RE) .................... –0.3V to (VCC +0.3V) Driver Input Voltage (DIN) .......................... –0.3V to (VCC +0.3V) Receiver Output Voltage (ROUT) ................ –0.3V to (VCC +0.3V) Bus Pin Voltage (DO/RI±) ...................................... –0.3V to +3.9V Driver Short Circuit .................................................... Continuous ESD (HBM 1.5kohms, 100pF) ............................................... >9kV Maximum Package Power Dissipation at 20°C SOIC ............................................................................. 1025mW Derate SOIC Package ................................................. 8.2mW/°C Storage Temperature Range ............................... –65°C to +150°C Lead Temperature Range (Soldering, 4s) ........................... +260°C Recommended Operating Conditions Supply Voltage (VCC) Receiver Input Voltage Operating Free-Air Temperature Min. 3.0 0.0 –40 Max. 3.6 2.9 +85 Units V V °C Note: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Table 2. Transmitter Mode Table 1. Functional Mode M ode Se le cte d Inputs Outputs DE RE Driver Mode H H DE DI DO+ DO– Receiver Mode L L H L L H 3- State Mode L H H H H L Full Duplex Mode H L H 2 > & > 0.8 X X L X Z Z Table 4. Device Pin Description Table 3. Receiver Mode Inputs Pin Name Outputs RE (RI+) - (RI–) L L (< –100mV) L L H (> +100mV) H L 100mV > & > –100mV X ROUT H X Z 06-0018 DIN Pin Inputs / # Outputs 2 TTL Driver Input I/O LVDS Driver Outputs/ LVDS Receiver Inputs 3 O TTL Receiver Output RE 5 I Receiver Enable TTL Input (Active Low) DE 1 I Driver Enable TTL Input (Active High) GND 4 NA Ground VCC 8 NA Power Supply DO±RI± 6,7 2 I De s cription PS8614C 03/06/06 PI90LV019 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 DC Electrical Characteristics(2,3) TA = –40°C to +85°C, unless otherwise noted. VCC = 3.3V ±0.3V(2,3) Symbol Parame te r Conditions Pin M in. Typ. M ax. Units 250 350 450 6 60 1.25 1.7 V 5 60 mV Diffe re ntial Drive r Characte ris tics VOD Output Differential Voltage ΔVOD VOS VOD Magnitude Change RL = 100- ohms, (LV) Figure 1 DO+ DO– Offset Voltage 1 ΔVOS Offset Magnitude Change IOZD High Impedance Leakage VOUT = VCC or GND, DE = 0V –10 ±1 +10 IOXD Power- Off Leakage VOUT = 3.6V or GND, VCC = 0V –10 ±1 +10 IOSD Output Short Circuit Current VOUT = 0V, DE = VCC LV –10 –6 –4 VID = +100mV IOH = –400μA 2.9 3.3 2.9 3.3 mV μA mA Diffe re ntial Re ce ive r Characte ris tics VOH Voltage Output High Inputs Open VOL Voltage Output Low IOL = 2.0mA, VID = –100mV IOS Output Short Circuit Current VOUT = 0V VTH Input Threshold High VTL Input Threshold Low IIN Input Current ROUT –75 VIN = +2.4V, or 0V VCC = 3.6V or 0V RI+ RI– V 0. 1 0.4 –34 –20 +100 –100 –10 ±1 ± 10 mA mV μA De vice Characte ris tics VIH Minimum Input High Voltage 2.0 VCC VIL Minimum Input Low Voltage GND 0.8 IIH Input High Current VIN = VCC or 2.4V IIL Input Low Current VIN = GND or 0.4V DIN, DE, RE VCL Input Diode Clamp Voltage ICLAMP = –18mA ICC No Load Driver Enabled DIN = VCC or GND DE = VCC = RE ICCL Loaded driver enabled RL = 100 ohms (all channels) DIN = VCC or GND (all inputs) LV DE = VCC, RE = GND ICCZ No Load driver disabled –1.5 LV DIN = VCC or GND, DE = GND, RE = VCC LV CDoutput Capacitance CRinput VCC Capacitance ±1 +10 ±1 +10 –0.7 8.0 20 30 2.2 8 .0 5 RI+, RI– 5 μA V 4.0 DO+, DO– V mA pF Notes: 1. “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation. 2. All currents into device pins are positive, all currents out of device pins are negative. All voltages are referenced to ground except: VOD, VID, VTH, and VTL, unless otherwise specified. 3. All typicals are given for VCC = +3.3V and TA = +25°C unless otherwise stated. Notes continued on next page... 06-0018 3 PS8614C 03/06/06 PI90LV019 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Notes (continued): 4. ESD Rating: HBM (15k-ohms, 100pF) > 2.0kV EAT (0-ohm, 200pF) >300V. 5. CL includes probe and fixture capacitance. 6. Generator waveforms for all tests unless otherwise specified: f = 1MHz, ZO = 50-ohms, tr, tf ≤ 6.0ns (0% - 100%) on control pins and ≤ 1.0ns for RI inputs. 7. For receiver disable delays, the switch is set to VCC for tPZL, and tPLZ and to GND for tPZH and tPHZ. AC Electrical Characteristics TA = –40°C to +85°C, VCC = 3.3V ±0.3V(6) Symbol Parame te r Conditions M in. Typ. M a x. 2.0 4. 0 6.5 1.0 5. 6 7.0 0.4 1. 0 Units Drive r Timing Re quire me nts tPHLD Differential Propagation Delay High to Low tPLHD Differential Propagation Delay Low to High tSKD Differential Skew ItPHLD - tPLHDI tTLH Transition Time Low to High 0.2 0.7 3. 0 tTHL Transition Time High to Low 0.2 0.8 3. 0 tPHZ Disable Time High to Z 1.5 4.0 8.0 tPLZ Disable Time Low to Z 2.5 5.3 9. 0 tPZH Enable Time Z to High 4.0 6. 0 8. 0 tPZL Enable Time Z to Low 3.5 6.0 8. 0 1.3 2.1 3.0 1.3 2.1 3.0 0.5 2. 0 RL = 100- ohms (LV) CL = 10pF (Figures 2 & 3) RL = 100- ohms (LV) CL = 10pF (Figures 2 & 3) ns Re ce ive r Timing Re quire me nts tPHLD Differential Propagation Delay High to Low tPLHD Differential Propagation Delay Low to High tSKD Differential Skew ItPHLD - tPLHDI CL = 10pF VID = 200mV Figures 6 & 7 tr Rise Time 0.8 1.4 tf Fall Time 0.8 1. 4 3.0 4. 0 6.0 3.0 4. 5 6.0 3.0 6.0 8. 0 3.0 6.0 8. 0 tPHZ Disable Time High to Z tPLZ Disable Time Low to Z tPZH Enable Time Z to High tPZL Enable Time Z to Low 06-0018 RL = 500- ohms CL = 10pF Figures 8 & 9 4 PS8614C ns 03/06/06 PI90LV019 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Test Circuits and Timing Waveforms DO+ RL/2 2V DIN VOS VOD 0.8V S1 RL/2 Driver Enabled DO– Figure 1. Differential Driver DC Test Circuit CL DO+ DIN Pulse Generator RL DO– 50-ohm Driver Enabled CL Figure 2. Differential Driver Propagation Delay and Transition Time Test Circuit 3V DIN 0V 1.5V 1.5V tPHLD DOUT+,DOUT- tPLHD 0V 0V (Differential) DO+ 0V DO– 80% (DO+) - (DO–) 80% 0V 0V 20% 20% tTLH tTHL tDIFF = (DO+) - (DO–) Figure 3. Driver Propagation Delay and Transition Time Waveforms 06-0018 5 PS8614C 03/06/06 PI90LV019 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Test Circuits and Timing Waveforms (continued) DO+ CL 2.0 RL/2 DIN 0.8 +1.2V RL/2 DE Pulse Generator DO– 50-ohm CL Figure 4. Driver Three-State Delay Test Circuit 3V 1.5V DE 1.5V 0V tPHZ DO – (DI=L) VOH DO + (DI=H) tPZH 50% 50% 1.2V tPLZ DO – (DI=H) DO + (DI=L) 1.2V VOH 50% 50% VOL tPZL Figure 5. Driver Three-State Delay Waveforms Figure 6. Receiver Propagation Delay and Transistion Time Test Circuit RI– +1.3V VID = 200mV 0V (Differential) (1.2V CM) +1.1V RI+ tPLH tPHL 80% 80% 1.5V 1.5V VO 20% 20% tTLH tTHL Figure 7. Receiver Propagation Delay and Transistion Time Waveforms 06-0018 6 PS8614C 03/06/06 PI90LV019 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Test Circuits and Timing Waveforms (continued) RI+ + RI– – R CL 50-ohm RE Pulse Generator VCC 50-ohm Figure 8. Receiver 3-State Delay Test Circuit 3V RE 1.5V 1.5V 0V tPHZ tPZH VOH VOH 50% VOH –0.5 GND ROUT tPZL tPLZ VOH VCC 50% VOL +0.5 VOL VOL Figure 9. Receiver 3-State Delay Waveforms Typical Bus Application Configurations DO+ DO+ DIN DIN DO– DO– DE DE RE RE RI+ + ROUT RI+ + ROUT 100-ohms – RI– RI– PI90LV019 – PI90LV019 Figure 10. Bidirectional Half-Duplex Point-to-Point Applications DO+ RI+ DO– RI– ROUT DIN RE DE RE DE + RI+ DO+ RI– DO– ROUT – DIN PI90LV019 PI90LV019 Figure 11. Full-Duplex Point-to-Point Application 06-0018 7 PS8614C 03/06/06 PI90LV019 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 14-Pin SOIC Package 14 .149 .157 .0099 .0196 3.78 3.99 0.25 x 45˚ 0.50 .0075 .0098 0-8˚ 1 0.41 1.27 .336 .344 8.55 8.75 .0155 .026 0.393 0.660 .053 .068 .050 BSC 1.27 .016 .050 .2284 .2440 5.80 6.20 1.35 1.75 SEATING PLANE REF 0.19 0.25 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS .0040 0.10 .0098 0.25 .013 .020 0.330 0.508 14-Pin TSSOP Package 14 0.004 0.09 0.008 0.20 0.169 0.177 4.3 4.5 0.45 0.75 0.018 0.030 0.240 0.264 1 0.193 0.201 4.90 5.10 6.1 6.7 0.047 1.20 max. SEATING PLANE 0.0256 typical 0.65 06-0018 0.007 0.012 0.19 0.30 0.002 0.05 0.006 0.15 8 PS8614C 03/06/06 PI90LV019 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Ordering Information Orde r Numbe r Pins - Package Te mpe rature PI90LV019W 14 - SOIC –40°C to 85°C PI90LV019WE 14 - SOIC, Pb- free & Green –40°C to 85°C PI90LV019L 14 - TSSOP –40°C to 85°C PI90LV019LE 14 - TSSOP, Pb- free & Green –40°C to 85°C Pericom Semiconductor Corporation • www.pericom.com 06-0018 9 PS8614C 03/06/06