PJ4N3KDW 30V Dual N-Channel Enhancement Mode MOSFET - ESD Protected FEATURES • RDS(ON), [email protected],IDS@1mA=7.0Ω • RDS(ON), [email protected],IDS@10mA=5.0Ω • Advanced Trench Process Technology • High Density Cell Design For Ultra Low On-Resistance • The MOSFET elements are independent,eliminating interference • Mounting cost and area can be cut in half • Very Low Leakage Current In Off Condition • Specially Designed for Battery Operated Systems,Solid-State Relays Drivers : Relays, Displays, Lamps, Solenoids, Memories, etc. • Low voltage drive (2.5V) makes this device ideal for portable equipment • ESD Protected 2KV HBM • In compliance with EU RoHS 2002/95/EC directives 6 5 4 1 2 3 MECHANICAL DATA • Case: SOT-363 Package • Terminals : Solderable per MIL-STD-750,Method 2026 • Marking : 4N3 Absolute Maximum Ratings (TA=25OC ) P a r a m e te r S ym b o l Li mi t Uni ts D ra i n-S o urc e Vo lta g e V DS 30 V Ga te - S o ur c e Vo lta g e e V GS + 20 V D 100 mA DM 800 mA PD 200 120 mW T J ,T S TG -5 5 to + 1 5 0 Rθ J A 625 C o nti nuo us D ra i n C ur r e nt P uls e d D r a i n C ur re nt I (1 ) M a xi m um p o we r D i s s i p a ti o n I T A =2 5 O C T A =7 5 O C Op e r a ti ng J unc ti o n a nd S to r a g e Te m p e r a tur e Ra ng e J unc ti o n- to A m b i e nt The r m a l Re s i s ta nc e ( P C B m o unte d ) 2 O O C C /W Note: 1. Maximum DC current limited by the package 2. Surface mounted on FR4 board, t < 5 sec PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE REV.0.3-SEP.25.2009 PAGE . 1 PJ4N3KDW ELECTRICAL CHARACTERISTICS (TA=25OC ) P a ra me te r S ymb o l Te s t C o nd i ti o n Mi n. Typ . Ma x. Uni ts D ra i n- S o ur c e B r e a k d o wn Vo lta g e B V DSS V G S =0 V, I D =1 0 uA 30 - - V Ga te Thr e s ho ld Vo lta g e V G S ( t h) V D S =3 .0 V, I D =1 0 0 uA 0 .8 - 1 .5 V D ra i n- S o ur c e On- S ta te Re s i s ta nc e R D S ( o n) VGS=2.5V, I D=1mA - - 7 .0 D ra i n- S o ur c e On- S ta te Re s i s ta nc e R D S ( o n) VGS=4.0V, I D=10mA - - 5.0 Ze ro Ga te Vo lta g e D r a i n C ur re nt ID S S VDS=30V, V GS=0V - - 1 uA Gate Body Leakage IG S S V GS =+ 2 0 V, V D S = 0 V - - 5 uA Forward Transconductance g fS V D S =3 V, I D =1 0 mA 10 - - mS D i o d e F o r wa rd Vo lta g e V SD IS =11 5 mA , V G S =0 V - 0 .7 8 1 .3 V Qg V D S = 1 5 V, I D =1 0 mA VGS=4.5V - - 0 .8 nC - 30 35 - 8 .5 12 - 84 100 tf - 32 40 Inp ut C a p a c i ta nc e C iss - 25 35 Outp ut C a p a c i ta nc e C oss - 8 12 Re ve r s e Tr a ns fe r C a p a c i ta nc e C rss - 2.5 5 S ta ti c Ω Dynamic To ta l Ga te C ha rg e Tur n- On D e la y Ti m e Ri s e Ti me Tur n- Off D e la y Ti m e F a ll ti me REV.0.3-SEP.25.2009 td ( ON ) tr t d (OF F ) VDD=5V , RL=500Ω ID=10mA , VGEN=5V RG=10Ω V D S = 5 V, V G S =0 V f=1 .0 MH Z ns pF PAGE . 2 PJ4N3KDW MOUNTING PAD LAYOUT ORDER INFORMATION • Packing information T/R - 10K per 13" plastic Reel T/R - 3K per 7” plastic Reel LEGAL STATEMENT Copyright PanJit International, Inc 2009 The information presented in this document is believed to be accurate and reliable. The specifications and information herein are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit does not convey any license under its patent rights or rights of others. REV.0.3-SEP.25.2009 PAGE . 3