INTEGRATED CIRCUITS DATA SHEET SAA5246A Integrated VIP and Teletext (IVT1.0) Product specification Supersedes data of August 1992 File under Integrated Circuits, IC02 January 1993 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A FEATURES • Complete Teletext decoder in a 48-pin DIL or 64-pin QFP, integrated circuit • Single +5 V power supply • Both video and scan related synchronization modes are supported • RGB interface to standard colour decoder ICs, push-pull output drive DESCRIPTION • Digital data slicer and display clock phase-locked loop reduce peripheral components to a minimum The SAA5246A is a single-chip teletext decoder IC for decoding 625 line base World System Teletext transmissions. The teletext decoder hardware is based on the Enhanced Computer Controlled ECCT device (SAA5243) with some additional features. The Video Input Processor section of the device uses mixed analog and digital designs in the data slicer and clock phase-locked-loop functions. As a result the number of external components are greatly reduced and no critical or adjustable components are required. • Data capture performance similar to SAA5231 (VIP2) • Option for up to seven national languages • Optional storage of packet 24 in the display memory • Separate text and video signal quality detectors, 625/525 video status and language version all readable via I2C-bus • Automatic ODD/EVEN output control with override • Control of display PLL free-run and rolling header via I2C-bus • VCS to SCS mode for stable 525 line status display. QUICK REFERENCE DATA SYMBOL PARAMETER MIN. TYP. MAX. UNIT VDD positive supply voltage 4.5 5.0 5.5 V IDD supply current − 64 128 mA Vsyn sync amplitude 0.1 0.3 0.6 V Vvid video amplitude 0.7 1.0 1.4 V fXTAL crystal frequency − 27 − MHz Tamb operating ambient temperature −20 − +70 °C ORDERING INFORMATION EXTENDED TYPE NUMBER PACKAGE PINS PIN POSITION MATERIAL CODE SAA5246AP 48 DIL plastic SOT240AC3(1) SAA5246AGP 64 QFP plastic SOT319DA3(2) Notes 1. SOT240-1; 1996 November 22. 2. SOT319-3; 1996 November 22. January 1993 2 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) Y BLAN SAA5246A COR RGBREF RGB ODD / EVEN handbook, full pagewidth 22 19 20 18 15-17 21 48 WE DISPLAY 47 MEMORY INTERFACE OE 3446 A0 - A12 D0 - D7 DATA SLICER AND CLOCK REGENERATOR TELETEXT ACQUISITION AND DECODING 2633 24 I 2 C-BUS INTERFACE 23 SDA SCL DCVBS 1, 6, 10 SAA5246A ANALOG TO DIGITAL CONVERTER TIMING CHAIN 25 5, 14 VDD VSS CVBS OSCOUT OSCIN 2 3 CRYSTAL OSCILLATOR 4 OSCGND DISPLAY CLOCK PHASE LOCKED LOOP INPUT CLAMP AND SYNC SEPARATOR 7 9 8 11 13 BLACK IREF CVBS POL VCR / FFB STTV / LFB Fig.1 Block diagram for SOT240 (DIL48) package. January 1993 12 3 MLA840 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A PINNING PIN SYMBOL DESCRIPTION SOT240 SOT319 OSCOUT 2 27 27 MHz crystal oscillator output OSCIN 3 28 27 MHz crystal oscillator input OSCGND 4 29 5, 14, 25 26, 30, 31, 43, 58 BLACK 7 35 video black level storage pin, connected to ground via a 100 nF capacitor CVBS 8 36 composite video input pin. A positive-going 1 V (peak-to-peak) input is required, connected via a 100 nF capacitor IREF 9 37 reference current input pin, connected to ground via a 27 kΩ resistor VDD 1, 6, 10 25, 32, 38 POL 11 39 STTV/LFB/FFB polarity selection pin STTV/LFB 12 40 sync to TV output pin/line flyback input pin. Function controlled by an internal register bit (scan sync mode) VCR/FFB 13 42 PLL time constant switch/field input pin. Function controlled by an internal register bit (scan sync mode) R 15 44 dot rate character output of the RED colour information G 16 45 dot rate character output of the GREEN colour information B 17 47 dot rate character output of the BLUE colour information RGBREF 18 48 input DC voltage to define the output high level on the RGB pins BLAN 19 52 dot rate fast blanking output COR 20 53 programmable output to provide contrast reduction of the TV picture for mixed text and picture displays or when viewing newsflash/subtitle pages. Open-drain output ODD/EVEN 21 54 a 25 Hz output synchronized to the input CVBS field sync pulses to make a non-interlaced display by adjustment of the vertical deflection currents. Y 22 55 dot rate character output of teletext foreground colour information. Open-drain output SCL 23 56 serial clock input for I2C-bus. It can still be driven HIGH during power-down of the device SDA 24 57 serial data port for the I2C-bus. Open drain output. It can still be driven HIGH during power-down of the device 26-31 60-64, 3 − 1, 2, 10, 11, 15, 18, 33, 34, 41, 46, 49 - 51, 59 32, 33 4, 5 VSS D0-D5 n.c. D6-D7 January 1993 0 V crystal oscillator ground 0 V ground +5 V positive supply data ports for the page SRAM not connected data ports for the page SRAM 4 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A PIN SYMBOL DESCRIPTION SOT240 SOT319 34-46 6-9, 12-14, 16, 17, 19-22 address output for the page SRAM OE 47 23 output enable for the page SRAM WE 48 24 write enable for the page SRAM A0-A12 January 1993 5 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A handbook, halfpage V DD 1 48 WE OSCOUT 2 47 OE OSCIN 3 46 A12 OSCGND 4 45 A11 VSS 5 44 A10 V DD 6 43 A9 BLACK 7 42 A8 CVBS 8 41 A7 IREF 9 40 A6 V DD 10 39 A5 POL 38 A4 11 STTV / LFB 12 37 A3 SAA5246A VCR / FFB 13 36 A2 VSS 14 35 A1 R 15 34 A0 G 16 33 D7 B 17 32 D6 RGBREF 18 31 D5 BLAN 19 30 D4 COR 20 29 D3 ODD / EVEN 21 28 D2 Y 22 27 D1 SCL 23 26 D0 SDA 25 VSS 24 MLA841 Fig.2 Pin configuration; SOT240 (DIL48). January 1993 6 Philips Semiconductors Product specification BLAN 52 53 COR 54 ODD / EVEN 55 Y 56 SCL 57 SDA SAA5246A 58 VSS n.c. 59 60 D0 61 D1 62 D2 index corner 63 D3 handbook, full pagewidth 64 D4 Integrated VIP and Teletext (IVT1.0) n.c. 1 51 n.c. 2 50 D5 3 49 D6 4 48 D7 5 47 B A0 6 46 n.c. A1 7 45 G A2 8 44 R A3 9 43 VSS SAA5246A n.c. 10 RGBREF 42 VCR / FFB 41 n.c. n.c. 11 A4 12 40 STTV / LFB A5 13 39 POL A6 14 38 V DD n.c. 15 37 IREF A7 16 36 CVBS A8 17 35 BLACK 34 n.c. n.c. 18 33 V DD 32 V SS 31 V SS 30 OSCGND 29 28 OSCIN OSCOUT 27 VSS 26 V DD 25 WE 24 OE 23 A12 22 A11 21 A10 20 A9 19 Fig.3 Pin configuration; SOT319 (QFP64). January 1993 n.c. 7 n.c. MLA843 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A LIMITING VALUES In accordance with Absolute Maximum System (IEC 134) SYMBOL PARAMETER MIN. MAX. UNIT VDD supply voltage (all supplies) −0.3 6.5 V VI input voltage (any input) −0.3 VDD +0.5 V VO output voltage (any output) −0.3 VDD +0.5 V IO output current (each output) − ±10 mA IIOK DC input or output diode current − ±20 mA Tamb operating ambient temperature −20 +70 °C Tstg storage temperature −55 +125 °C Vstat electrostatic handling (see note 1) −2000 +2000 V Note to the Limiting values 1. Electrostatic handling is equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor with a 15 ns rise time. Failure Rate The failure rate at Tamb = 55 °C will be a maximum of 1000 FITS (1 FIT = 1 × 10−9 failures per hour). January 1993 8 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A CHARACTERISTICS VDD = 5 V ± 10%; Tamb = −20 to +70 °C, unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supplies VDD supply voltage range 4.5 5.0 5.5 V IDD total supply current − 64 128 mA Vsyn sync amplitude 0.1 0.3 0.6 V tsyn delay from CVBS to TCS output from STTV buffer (nominal video, average of leading/trailing edge) −150 0 +150 ns tsyd change in sync delay between all black and all white video input at nominal levels 0 − 25 ns Vvid(p-p) video input amplitude (peak-to-peak) 0.7 1.0 1.4 V Inputs CVBS display PLL catching range ±7 − − % Zsrc source impedance − − 250 Ω CI input capacitance − − 10 pF resistor to ground − 27 − kΩ VIL LOW level input voltage −0.3 − +0.8 V VIH HIGH level input voltage 2.0 − VDD+0.5 V ILI input leakage current −10 − +10 µA CI input capacitance − − 10 pF VIL LOW level input voltage −0.3 − +0.8 V VIH HIGH level input voltage 2.0 − VDD+0.5 V ILI input leakage current VI = 0 to VDD −10 − +10 µA II input current note 1 −1 − +1 mA tLFB delay between LFB front edge and input video line sync − 250 − ns VIL LOW level input voltage −0.3 − +0.8 V VIH HIGH level input voltage 2.0 − VDD+0.5 V ILI input leakage current VI = 0 to VDD −10 − +10 µA II input current note 1 −1 − +1 mA IREF Rg POL VI = 0 to VDD LFB VCR/FFB January 1993 9 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SYMBOL PARAMETER SAA5246A CONDITIONS MIN. TYP. MAX. UNIT RGBREF −0.3 − VDD+0.5 V −10 − +10 µA DC current − − 10 mA VIL LOW level input voltage −0.3 − +1.5 V VIL LOW level input voltage ILI input leakage current IDC VI = 0 to VDD SCL VIH HIGH level input voltage ILI input leakage current fSCL clock frequency tr input rise time tf input fall time CI input capacitance 3.0 − VDD+0.5 V −10 − +10 µA 0 − 100 kHz 10% to 90% − − 2 µs 90% to 10% − − 2 µs − − 10 pF VI = 0 to VDD Inputs/outputs CRYSTAL OSCILLATOR (OSCIN; OSCOUT) fXTAL crystal frequency − 27 − MHz VOSC oscillation amplitude (peak-to-peak value) − 1.5 − V Gv small signal voltage gain − 1 − V/V Gm mutual conductance 5 − − mA/V CI input capacitance − − 10 pF CFB feedback capacitance − 1 − pF − 100 − nF −10 − +10 µA BLACK Cblk storage capacitor to ground ILI input leakage current VI = 0 to VDD SDA VIL LOW level input voltage −0.3 − +1.5 V VIH HIGH level input voltage 3.0 − VDD+0.5 V ILI input leakage current −10 − +10 µA CI input capacitance − − 10 pF tr input rise time 10% to 90% − − 2 µs tf input fall time 90% to 10% − − 2 µs VI = 0 to VDD VOL LOW level output voltage IOL = 3 mA 0 − 0.5 V tf output fall time 3 V to 1 V − − 200 ns CL load capacitance − − 400 pF January 1993 10 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SYMBOL PARAMETER SAA5246A CONDITIONS MIN. TYP. MAX. UNIT D0 TO D7 VIL LOW level input voltage −0.3 − +0.8 V VIH HIGH level input voltage 2.0 − VDD+0.5 V ILI input leakage current −10 − +10 µA CI input capacitance − − 10 pF VOL LOW level output voltage IOL = +1.6 mA 0 − 0.4 V VOH HIGH level output voltage IOH = −0.2 mA 2.4 − VDD V tr output rise time 0.6 V to 2.2 V − − 50 ns tf output fall time 2.2 V to 0.6 V − − 50 ns CL load capacitance − − 120 pF Gstt gain of STTV relative to video input 0.9 1.0 1.1 Vtcs TCS amplitude 0.2 0.3 0.45 V VDCs DC shift between TCS output and nominal video output − − 0.15 V IO output drive current − − 3.0 mA CL load capacitance − − 100 pF Outputs STTV A0 TO A12 ADDRESS OUTPUT TO MEMORY VOL LOW level output voltage IOL = +1.6 mA 0 − 0.4 V VOH HIGH level output voltage IOH = −0.2 mA 2.4 − VDD V CL load capacitance − − 120 pF tr output rise time 0.6 V to 2.2 V − − 50 ns tf output fall time 2.2 V to 0.6 V − − 50 ns OE, WE VOL LOW level output voltage IOL = +1.6 mA 0 − 0.4 V VOH HIGH level output voltage IOH = −0.2 mA 2.4 − VDD V CL load capacitance − − 120 pF tr output rise time 0.6 V to 2.2 V − − 50 ns tf output fall time 2.2 V to 0.6 V − − 50 ns January 1993 11 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SYMBOL PARAMETER SAA5246A CONDITIONS MIN. TYP. MAX. UNIT R, G AND B VOL LOW level output voltage IOL = 2 mA 0 − 0.2 V VOH HIGH level output voltage IOH = −1.6 mA; RGBREF ≤ VDD−2 V; note 2 RGBREF −0.25 V RGBREF RGBREF +0.25 V V IDC DC current − − −3.3 mA |Zo| output impedance − − 200 Ω CL load capacitance − − 50 pF tr output rise time 10% to 90% − − 20 ns tf output fall time 90% to 10% − − 20 ns BLAN VOL LOW level output voltage IOL = 0.2 mA 0 − 0.4 V VOH HIGH level output voltage IOH = −0.2 mA; VDD = 4.5 V; note 2 1.1 − − V VOH HIGH level output voltage IOH = 0 mA; VDD = 5.5 V; note 2 − − 2.8 V CL load capacitance − − 50 pF tr output rise time 10% to 90% − − 20 ns tf output fall time 90% to 10% − − 20 ns VOL LOW level output voltage IOL = +1.6 mA 0 − 0.4 V VOH HIGH level output voltage IOH = −1.6 mA VDD−0.4 − VDD V CL load capacitance − − 120 pF tr output rise time 0.6 to 2.2 V − − 50 ns tf output fall time 2.2 to 0.6 V − − 50 ns − − VDD V 0 − 0.4 V ODD/EVEN COR AND Y (OPEN DRAIN) VOH pull-up voltage at pin VOL LOW level output voltage IOL = +2 mA VOL LOW level output voltage IOL = +5 mA CL load capacitance tf 0 − 1.0 V − − 25 pF output fall time load resistor of 1.2 kΩ − to VDD; measured between VDD −0.5 and 1.5 V − 50 ns ILO output leakage current VI = 0 to VDD −10 − +10 µA TSK skew delay between display outputs R, G, B, COR, Y and BLAN − − 20 ns January 1993 12 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SYMBOL PARAMETER SAA5246A CONDITIONS MIN. TYP. MAX. UNIT Timing MEMORY INTERFACE tCY cycle time − 500 − ns tOE address change to OE LOW 55 − − ns tADDR address active time 450 500 − ns trOEW OE pulse width read 295 − − ns twOEW OE pulse width write 100 − − ns tACC access time from address data valid − − 150 ns tDH data hold time from OE HIGH or address change 0 − 150 ns tWEW WE pulse width 100 − − ns tDS data set-up time to WE HIGH 60 − − ns tDHWE data hold time from WE HIGH 20 − − ns tWR write recovery time 20 − − ns tDE data enable from WE LOW 60 − − ns tLOW clock LOW period 4 − − µs tHIGH clock HIGH period 4 − − µs tSU;DAT data set-up time 250 − − ns tHD;DAT data hold time 170 − − ns tSU;STO set-up time from clock HIGH to STOP 4 − − µs tBUF START set-up time following a STOP 4 − − µs tHD;STA START hold time 4 − − µs tSU;STA START set-up time following clock LOW-to-HIGH transition 4 − − µs I2C-BUS Notes to the characteristics 1. This current is the maximum allowed into the inputs when line and field flyback signals are connected to these inputs. Series current limiting resistors must be used to limit the input currents to ± 1 mA. 2. Can be pulled higher by external pull-up resistor, (maximum leakage current ≈ 200 µA). January 1993 13 January 1993 14 0 [2] 308 309 621 (308) [1] 309 310 622 (309) 310 311 623 (310) 311 312 624 (311) 312 313 625 (312) 1 314 (1) 1 27.33 2 34.33 2 315 (2) 32 32 [2] Fig.4 Composite sync waveforms. Line numbers placed in the middle of the line. Equivalent count numbers in brackets. 3 316 (3) 3 4 317 (4) 4 5 318 (5) 5 6 319 (6) 6 7 320 (7) 7 59.33 MLA037 - 2 64 µs 64 µs 64 µs Integrated VIP and Teletext (IVT1.0) TCS is available on STTV/LFB pin. [1] LSP, EP and BP are combined to give TCS as shown below. All timings measured from falling edge of LSP. TCS non-interlaced TCS interlaced TCS interlaced BP (Broad Pulse) EP (Equalizing Pulse) 4.66 0 2.33 0 handbook, full pagewidth LSP (Line Sync Pulse) Philips Semiconductors Product specification SAA5246A Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A handbook, full pagewidth LSP (TCS) 0 64 µs 4.66 40 µs R, G, B, Y (1) display period 0 16.67 (a) LINE RATE 56.67 µs lines 42 to 291 inclusive (and 355 to 604 inclusive interlaced) R, G, B, Y (1) display period 0 (b) FIELD RATE 41 312 291 line numbers MLA662 - 1 (1) also BLAN in character and box blanking Fig.5 Display output timing (a) line rate (b) field rate. handbook, full pagewidth SDA t LOW t BUF tf SCL t HD;STA tr t HD;DAT t HIGH t SU;DAT SDA MBC764 t SU;STA Fig.6 I2C-bus timing. January 1993 15 t SU;STO January 1993 16 309 (2) 310 311 623 (310) 2 µs 312 624 (311) 30 µs (1) 16 µs 313 30 µs (1) 2 µs 625 (312) 2 3 314 (1) 316 (3) Fig.7 ODD/EVEN timing. 315 (2) SECOND FIELD START (ODD) 48 µs 1 FIRST FIELD START (EVEN) 317 (4) 4 318 (5) 5 319 (6) 6 320 (7) 7 MLA416 - 2 Integrated VIP and Teletext (IVT1.0) (1) or 62 µs if R1 D2.D1.D0 = 111. (2) Line numbers placed in the middle of the line. Equivalent count numbers in brackets. ODD / EVEN output (slave sync mode) ODD / EVEN output (normal sync mode when VCS to SCS mode active) ODD / EVEN output (normal sync mode) TCS interlaced ODD / EVEN output (slave sync mode) ODD / EVEN output (normal sync mode when VCS to SCS mode active) ODD / EVEN output (normal sync mode) TCS interlaced 622 (309) handbook, full pagewidth 621 (308) Philips Semiconductors Product specification SAA5246A Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A t CY handbook, full pagewidth ADDRESS A0 - A12 valid t ADDR t rOEW t OE OE t DH t ACC DATA FROM RAM valid (a) READ t CY ADDRESS A0 - A12 valid t OE OE t wOEW t WR WE t WEW t DHWE t DE t DS DATA TO RAM valid t ACC DATA FROM RAM valid MBA468 - 2 (b) WRITE _ _ _ _ Level during flicker stopped cycle. Fig.8 Memory interface timing (a) read (b) write. January 1993 17 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A APPLICATION INFORMATION 10 µF 22 nF handbook, full pagewidth V DD 5V OSCOUT 100 nF 10 pF 1 nF 4.7 µH 15 pF OSCIN 27 MHz 3rd overtone 3.3 kΩ OSCGND V SS C4 100 nF 5V C5 C6 V DD BLACK 1 48 2 47 3 34 - 46 4 26 - 33 WE OE D0 - D7 VSS 5 CVBS 100 nF R2 IREF 6 100 nF 5V 7 8 9 27 kΩ V DD 5V 5V 10 33 µF 100 nF POL sync output STTV / LFB VCR / FFB V SS R G 11 12 SAA5246A 13 14 15 16 5V B 17 (1) (1) RGBREF 18 (1) BLAN COR 2.7 kΩ ODD / EVEN 19 20 21 5V Y 2.7 kΩ SCL 22 23 5V SDA 24 25 VSS MLA844 - 3 (1) Value dependent on application Fig.9 Application diagram (SOT240). January 1993 V DD C7 100 nF video input 8 K x 8-bit SRAM A0 - A12 18 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A SAA5246A page memory organization The organization of the page memory is illustrated by Fig.10. The SAA5246A provides an additional row as compared with first generation decoders; this brings the display format up to 40 characters by 25 rows. Rows 0 to 23 form the teletext page; row 24 is the extra row available for software generated status messages and FLOF/FASTEXT prompt information. handbook, full pagewidth 7 characters for status 24 characters from page header rolling when display page looked for 8 characters always rolling (time) 7 24 8 1 ROW 0 1 fixed character written by IVT hardware alphanumerics white for normal alphanumerics green when looking for display page 2 3 4 5 to 20 MAIN PAGE DISPLAY AREA 21 PACKET X/22 22 PACKET X/23 23 PACKET X/24 STORED HERE IF R1D7 = 1 24 10 10 bytes for received page information 14 25 14 bytes free for microprocessor MLA845 - 1 Fig.10 Basic page memory organization. Note to Fig.10 Row 0 Row 0 is for the page header. The first seven columns (0 to 6) are free for status messages. The eighth is an alphanumeric white or green control character, written automatically by SAA5246A to give a green rolling header when a page is being looked for. The last eight characters are for rolling time. Row 25 The first 10 bytes of Row 25 contain control data relating to the received page as shown in Table 1. The remaining 14 bytes are free for use by the microprocessor. January 1993 19 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) Table 1 SAA5246A Row 25 received control data format. D0 PU0 PT0 MU0 MT0 HU0 HT0 C7 C11 MAG0 0 D1 PU1 PT1 MU1 MT1 HU1 HT1 C8 C12 MAG1 0 D2 PU2 PT2 MU2 MT2 HU2 C5 C9 C13 MAG2 0 D3 PU3 PT3 MU3 C4 HU3 C6 C10 C14 0 0 D4 HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER FOUND 0 D5 0 0 0 0 0 0 0 0 0 PBLF D6 0 0 0 0 0 0 0 0 0 0 D7 0 0 0 0 0 0 0 0 0 0 Column 0 1 2 3 4 5 6 7 8 9 Where: Page number MAG magazine PU page units PT page tens PBLF page being looked for FOUND LOW for page has been found HAM.ER Hamming error in corresponding byte Page sub-code MU minutes units MT minutes tens HU hours units HT hours tens C4-C14 transmitted control bits. When in extension packet enabled mode the rows of information are organized as illustrated by Fig.11. Row 23 of the extension page, as shown in Fig.11, contains packet 8/30. Packet 8/30 is mapped into the SAA5246A memory as follows: 8/30/0 and 8/30/1 to Chapter 4 Row 23 8/30/2 and 8/30/3 to Chapter 5 Row 23 8/30/4 to 8/30/15 to Chapter 6 Row 23 January 1993 20 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A ROW handbook, full pagewidth PACKETS X/26/0 - X/26/14 PACKET X/28/2 PACKETS X/27/0 - X/27/1 0 to 14 15 16 17 18 PACKETS X/27/4 - X/27/5 PACKET X/24 IF R0D7 = 0 PACKET PACKET PACKET PACKET 19 20 X/25 21 X/28/0 22 8/30 23 X/28/1 24 25 MLA846 - 1 Fig.11 Organization of the extension memory. January 1993 21 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A Register maps SAA5246A mode registers R0 to R11 are shown in Table 2. R0 to R10 are WRITE only; R11 is READ/WRITE; R11B is READ only. Register map (R3), for page requests, is shown in detail in Table 4. Table 2 Register map. REGISTER D7 D6 D5 D4 D3 D2 D1 D0 DISABLE AUTO ODD/EVEN HDR ROLL − DISABLE ODD/EVEN VCR MODE R11/ R11B SELECT VCS TO 7 + P/ SCS 8-BIT ACQ ON/OFF EXT. PACKET ENABLE DEW/ FULL FIELD TCS ON FFB MODE T1 T0 2 HAM. CHECK BANK SELECT A2 ACQ CIRCUIT A1 ACQ CIRCUIT A0 TB START COLUMN SC2 START START COLUMN COLUMN SC1 SC0 Page request data 3 − − − PRD4 PRD3 PRD2 PRD1 PRD0 Display chapter 4 − − − − − A2 A1 A0 Display control (normal) 5 BKGND OUT BKGND IN COR OUT COR IN TEXT OUT TEXT IN PON OUT PON IN Display 6 control (newsflash /subtitle) BKGND OUT BKGND IN COR OUT COR IN TEXT OUT TEXT IN PON OUT PON IN Display mode 7 STATUS CURSOR TOP ON REVEAL ON BOTTOM HALF DOUBLE HEIGHT BOX ON 24 BOX ON 1-23 BOX ON 0 Active chapter 8 − − − − CLEAR MEM. A2 A1 A0 Cursor row 9 − − − R4 R3 R2 R1 R0 Cursor column 10 − − C5 C4 C3 C2 C1 C0 Cursor data 11 D7 D6 D5 D4 D3 D2 D1 D0 Device status 11B 625/525 ROM SYNC VER R4 ROM VER R3 ROM VER R2 ROM VER R1 ROM VER R0 DATA VCS QUALITY SIGNAL QUALITY Adv. control 0 X24 POS Mode 1 Page request address January 1993 FREE RUN PLL 22 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A Notes to Table 2 1. ‘−’ indicates a bit which does not exist and must be written to logic 0 for future compatibility. 2. All bits in registers R0 to R10 are cleared to logic 0 on power-up except bits D0 and D1 of registers R1, R5 and R6 which are set to logic 1. 3. All memory is cleared to ‘space’ (00100000) on power-up, except Row 0 Column 7 Chapter 0, which is ‘alpha’ white (00000111) as the acquisition circuit is enabled but the page is on hold. 4. TB must be set to logic 0 for normal operation. 5. The I2C-bus slave address is 0010001. Register description R0 ADVANCED CONTROL - auto increments to Register 1 R11/R11B SELECT Selects reading of R11 or R11B VCR MODE Selects short time constant of PLL when logic 1 DISABLE ODD/EVEN Forces ODD/EVEN output LOW when logic 1 DISABLE HDR ROLL Disables green rolling header and time AUTO ODD/EVEN When set forces ODD/EVEN low if any TV picture displayed, if DISABLE ODD/EVEN = 0 FREE RUN PLL Will force the PLL to free run in all conditions X24 POS Automatic display of FASTEXT prompt row when logic 1 R1 MODE - auto increments to Register 2 T0, T1 Interlace/non-interlace 312/313 line control (see Table 4) TCS ON FFB MODE Text composite sync or direct sync select (see Table 4 for FFB mode selection) DEW/FULL FIELD Field-flyback or full channel mode EXT. PACKET ENABLE Allocates 2K bytes memory per chapter ACQ ON/OFF Acquisition circuits turned off when logic 1 7 +P/8-BIT 7 bits with parity checking or 8-bit mode VCS TO SCS When logic 1 enables display of messages with 60 Hz input signal R2 PAGE REQUEST ADDRESS - auto increments to Register 3 HAM.CHECK When logic 1 enables Hamming 8/4 checking of extension packet 27/0, 27/1 and 8/30/x COL SC0 - SC2 Point to start column for page request data (see Table 3) TB Must be logic 0 for normal operation ACQ CIRCUIT Selects one of four acquisition circuits BANK SELECT Selects which bank of four chapters is being accessed, when EXT. PACKET ENABLE = 0 R3 PAGE REQUEST DATA - does not auto increment (see Table 3) R4 DISPLAY CHAPTER - auto increments to Register 5 determines which of the 8 pages is displayed January 1993 23 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A R5 NORMAL DISPLAY CONTROL - auto increments to Register 6 PON Picture on TEXT Text on COR Contrast reduction on BKGND Background colour on These functions have IN and OUT referring to inside and outside the boxing function respectively. R6 NEWSFLASH DISPLAY - auto increments to Register 7 PON Picture on TEXT Text on COR Contrast reduction on BKGND Background colour on These functions have IN and OUT referring to inside and outside the boxing function respectively. R7 DISPLAY MODE - does not auto increment BOX ON 0 Boxing function allowed on Row 0 BOX ON 1-23 Boxing function allowed on Row 1-23 BOX ON 24 Boxing function allowed on Row 24 DOUBLE HEIGHT To display double height text BOTTOM HALF To select bottom half of page when DOUBLE HEIGHT = 1 REVEAL ON To reveal concealed text CURSOR ON To display cursor STATUS TOP Row 25 displayed above or below the main text R8 ACTIVE CHAPTER - auto increments to Register 9 A0 to A2 Active chapter CLEAR MEMORY When set to 1, clears the display memory. This bit is automatically reset R9 CURSOR ROW - auto increments to Register 10 R0 to R4 Active row for data written to or read from memory via the I2C-bus R10 CURSOR COLUMN - auto increments to Register 11 or 11B C0 to C5 Active column for data written to or read from memory via the I2C-bus R11 CURSOR DATA - does not auto increment D0 to D7 Data read from/written to memory via I2C, at location pointed to by R8, R9 and R10. This location automatically increments each time R11 is accessed R11B DEVICE STATUS - does not auto increment VCS SIGNAL QUALITY Indicates that the video signal quality is good and PLL is phase locked to input video when = 1 DATA QUALITY If good Teletext data is detected then = 1 ROM VER R0 to R4 Indicated language/ROM variant. See Table 6 - Table 13. 625/525 SYNC If the input video is a 525 line signal when = 1 January 1993 24 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) Table 3 SAA5246A Register map for page requests (R3). START COLUMN PRD4 PRD3 PRD2 PRD1 PRD0 0 Do care Magazine HOLD MAG2 MAG1 MAG0 1 Do care Page tens PT3 PT2 PT1 PT0 Do care Page units PU3 PU2 PU1 PU0 Do care Hours tens X X HT1 HT0 Do care Hours units HU3 HU2 HU1 HU0 5 Do care Minutes tens X MT2 MT1 MT0 6 Do care Minutes units MU3 MU2 MU1 MU0 2 3 4 Notes to Table 3 1. Abbreviations are as for Table 1 except for DO CARE bits. 2. When the DO CARE bit is set to logic 1 this means the corresponding digit is to be taken into account for page request. If the DO CARE bit is set to logic 0 the digit is ignored. This allows, for example, ‘normal’ or ‘timed page’ selection. 3. If HOLD is set LOW, the page is held and not updated 4. Columns auto-increment on successive I2C-bus transmission bytes 5. “X’ = Don’ t care Table 4 Interlace/non-interlace 312/313 line control and ODD/EVEN field detection option TCS ON FFB MODE T1 T0 x 0 0 interlaced 312.5/312.5 lines x 0 1 non-interlaced 312/313 lines (note 1) RESULT x 1 0 non-interlaced 312/312 lines (note 1) 0 1 1 SCS (scan composite sync) mode: FFB leading edge in first broad pulse of field M7 version onwards 1 1 1 SCS (scan composite sync) mode: FFB leading edge in second broad pulse of field M7 version onwards Notes to Table 4 1. Reverts to interlaced mode if a newsflash or subtitle is being displayed. 2. 'x' = Don't care. January 1993 25 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A CLOCK SYSTEMS Crystal oscillator The oscillator is a low amplitude, low distortion design operation at 27 MHz. It is capable of oscillating with both fundamental and third overtone mode crystals. External components should be used to suppress the fundamental output of the third overtone as illustrated in Fig.12. Table 5 Crystal characteristics. SYMBOL PARAMETER MIN. TYP. MAX. UNIT Crystal (27 MHz, 3rd overtone) C1 series capacitance − 1.7 - pF C0 parallel capacitance − 5.2 − pF CL load capacitance − 20 − pF Rr resonant resistance − − 50 Ω R1 series resistance − 20 − Ω Xa ageing − − ±5 10−6/yr Xj adjustment tolerance − − ±25 10−6 Xd drift − − ±25 10−6 handbook, full pagewidth VDD SAA5246A OSCOUT 1 nF 4.7 µH 10 pF 15 pF 100 nF CRYSTAL OSCILLATOR OSCIN 3.3 kΩ 27 MHz 3rd overtone OSCGND MLA847 - 1 Fig.12 Crystal oscillator application diagram. January 1993 26 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A Character sets The WST specification allows the selection of national character sets via the page header transmission bits, C12 to C14. The basic 96 character sets differ only in 13 national option characters as indicated in Tables 15 - 23 with reference to their table position in the basic character matrix illustrated in Table 14. The SAA5246A automatically decodes transmission bits C12 to C14. Tables 6 - 13 illustrate the character matrices. Character bytes are listed as transmitted from b1 to b7. MLA663 handbook, full pagewidth alphanumerics and graphics 'space' character 0000010 alphanumerics character 1011010 alphanumerics or blast-through alphanumerics character 0001001 alphanumerics character 1111111 contiguous graphics character 0110111 separated graphics character 0110111 separated graphics character 1111111 contiguous graphics character 1111111 = background colour Fig.13 Character format. January 1993 27 display = colour Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) Table 6 SAA5246A SAA5246AP/E character data input decoding, West European languages. B pagewidth b8 handbook, full I T S 0 0 b7 0 b6 0 or 1 0 0 0 b5 b 4 b 3 b2 b 1 column r o w 0 1 graphics black 0 1 0 0 0 0 0 0 0 0 1 1 alpha numerics red graphics red 0 0 1 0 2 alpha numerics green graphics green 0 0 1 1 3 alpha numerics yellow graphics yellow 0 1 0 0 4 alpha numerics blue graphics blue 0 1 0 1 5 alpha numerics magenta graphics magenta 0 1 1 0 6 alpha numerics cyan graphics cyan 0 1 1 1 7 alpha numerics white graphics white 1 0 0 0 8 flash conceal display 1 0 0 1 9 steady 1 0 1 0 10 end box separated graphics 1 0 1 1 11 start box ESC 1 1 0 0 12 normal height 1 1 0 1 13 double height 1 1 1 0 14 SO 1 1 1 1 15 SI 0 0 1 0 2 alpha numerics black 0 or 1 0 1 0 0 1 1 2a 0 0 1 1 3 0 1 0 1 3a 0 0 0 4 1 1 1 5 1 0 1 1 6 6a 1 7 7a 1 0 0 1 0 1 0 0 0 8 1 1 0 1 9 1 1 0 0 12 1 1 1 1 1 13 1 0 14 1 15 (2) (2) (2) contiguous graphics (2) (1) (2) black back ground (2) new back ground (1) hold graphics (1) (2) release graphics MBA429 Notes for character version number (00000) see Register 11B. 1. These control characters are reserved for compatibility with other data codes. 2. These control characters are presumed before each row begins. January 1993 28 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) Table 7 SAA5246A SAA5246AP/H character data input decoding, East European languages handbook, full B pagewidth b8 I T S 0 0 b7 0 b6 0 or 1 0 0 0 b5 0 0 b 4 b 3 b2 b 1 column r o w 1 0 1 graphics black 0 0 0 0 0 0 0 1 1 alpha numerics red graphics red 0 0 1 0 2 alpha numerics green graphics green 0 0 1 1 3 alpha numerics yellow graphics yellow 0 1 0 0 4 alpha numerics blue graphics blue 0 1 0 1 5 alpha numerics magenta graphics magenta 0 1 1 0 6 alpha numerics cyan graphics cyan 0 1 1 1 7 alpha numerics white graphics white 1 0 0 0 8 flash conceal display 1 0 0 1 9 steady 1 0 1 0 10 end box separated graphics 1 0 1 1 11 start box ESC 1 1 0 0 12 normal height 1 1 0 1 13 double height 1 1 1 0 14 SO 1 1 1 1 15 SI 0 0 1 0 2 0 0 or 1 0 1 alpha numerics black 0 1 0 2a 0 0 1 1 3 0 1 0 1 3a 0 0 0 4 1 1 1 5 1 0 1 1 6 6a 1 7 7a 1 0 0 1 0 1 0 0 0 8 1 1 0 1 9 1 1 0 0 12 1 1 1 1 1 13 1 0 14 1 15 (2) (2) (2) contiguous graphics (2) (1) (2) black back ground (2) new back ground (1) hold graphics (1) (2) release graphics MLA961 Notes for character version number (00001) see Register 11B 1. These control characters are reserved for compatibility with other data codes. 2. These control characters are presumed before each row begins. January 1993 29 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) Table 8 SAA5246A SAA5246AP/T character data input decoding, West European and Turkish languages. handbook, full B pagewidth b8 I T S 0 0 b7 0 b6 0 or 1 0 0 0 b5 b 4 b 3 b2 b 1 column r o w 0 1 graphics black 0 1 0 0 0 0 0 0 0 0 1 1 alpha numerics red graphics red 0 0 1 0 2 alpha numerics green graphics green 0 0 1 1 3 alpha numerics yellow graphics yellow 0 1 0 0 4 alpha numerics blue graphics blue 0 1 0 1 5 alpha numerics magenta graphics magenta 0 1 1 0 6 alpha numerics cyan graphics cyan 0 1 1 1 7 alpha numerics white graphics white 1 0 0 0 8 flash conceal display 1 0 0 1 9 steady 1 0 1 0 10 end box separated graphics 1 0 1 1 11 start box ESC 1 1 0 0 12 normal height 1 1 0 1 13 double height 1 1 1 0 14 SO 1 1 1 1 15 SI 0 0 1 0 2 alpha numerics black 0 or 1 0 1 0 0 1 1 2a 0 0 1 1 3 0 1 0 1 3a 0 0 0 4 1 1 1 5 1 0 1 1 6 6a 1 7 7a 1 0 0 1 0 1 0 0 0 8 1 1 0 1 9 1 1 0 0 12 1 1 1 1 1 13 1 0 14 1 15 (2) (2) (2) contiguous graphics (2) (1) (2) black back ground (2) new back ground (1) hold graphics (1) (2) release graphics MBA431 Notes for character version number (00010) see Register 11B. 1. These control characters are reserved for compatibility with other data codes 2. These control characters are presumed before each row begins. January 1993 30 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) Table 9 SAA5246A SAA5246AP/J character data input decoding, Jugoslav languages handbook, fullBpagewidth b 8 I T S b 0 4 b 3 b 2 b 0 or 1 0 0 0 b b 0 0 7 b6 0 0 5 1 column r o w 1 0 1 graphics black 0 0 0 0 0 0 0 0 1 1 alpha numerics red graphics red 0 0 1 0 2 alpha numerics green graphics green 0 0 1 1 3 alpha numerics yellow graphics yellow 0 1 0 0 4 alpha numerics blue graphics blue 0 1 0 1 5 alpha numerics magenta graphics magenta 0 1 1 0 6 alpha numerics cyan graphics cyan 0 1 1 1 7 alpha numerics white graphics white 1 0 0 0 8 flash conceal display 1 0 0 1 9 steady contiguous graphics 1 0 1 0 10 end box separated graphics 1 0 1 1 11 start box ESC 1 1 0 0 12 normal height black back ground 1 1 0 1 13 double height new back ground 1 1 1 0 14 SO hold graphics 1 1 1 1 15 SI 0 or 1 0 1 alpha numerics black 0 1 0 2 0 0 1 1 2a 0 0 1 1 3 0 1 0 1 3a 0 0 0 4 5 1 1 1 1 0 6a 1 7 7a 1 0 0 1 0 6 1 0 1 1 0 0 8 1 1 0 1 9 1 1 0 0 12 1 1 1 1 1 13 1 0 14 1 15 release graphics MLA962 Notes for character version number (00011) see Register 11B 1. * These control characters are reserved for compatibility with other data codes. 2. ** These control characters are presumed before each row begins. January 1993 31 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A Table 10 SAA5246AP/K character data input decoding, French and Arabic languages. B I T S b8 0 0 b7 0 b6 0 or 1 0 0 0 b5 0 0 b 4 b 3 b2 b 1 column r o w 0 1 1 0 0 0 0 0 0 0 0 1 1 alpha numerics red graphics red 0 0 1 0 2 alpha numerics green graphics green 0 0 1 1 3 alpha numerics yellow graphics yellow 0 1 0 0 4 alpha numerics blue graphics blue 0 1 0 1 5 alpha numerics magenta graphics magenta 1 1 0 handbook, full0 pagewidth 6 alpha numerics cyan graphics cyan graphics black 0 or 1 0 0 1 0 2 alpha numerics black 0 0 1 0 2a 0 0 1 1 3 0 1 1 1 3a 0 1 0 0 or 1 1 0 0 4 1 1 1 5 0 0 or 1 1 1 0 6 0 6a 1 0 8 1 1 0 0 1 7a 1 0 0 1 1 7 1 1 1 1 9 1 1 0 0 12 1 1 0 1 1 1 13 1 0 14 1 15 (2) 0 1 1 1 7 alpha numerics white graphics white 1 0 0 0 8 flash conceal display 1 0 0 1 9 steady 1 0 1 0 10 end box separated graphics 1 0 1 1 11 start box TWIST (2) (2) contiguous graphics (2) (2) 1 1 0 0 12 normal height 1 1 0 1 13 double height 1 1 1 0 14 SO 1 1 1 1 15 SI (2) black back ground new back ground (1) hold graphics (1) (2) release graphics MLA972 - 1 Notes for character version number (00100) see Register 11B. 1. These control characters are reserved for compatibility with other data codes. 2. These control characters are presumed before each row begins. January 1993 32 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A Table 11 SAA5246AP/L character data input decoding, Arabic and Hebrew languages. B I T S b8 0 b7 0 0 0 or 1 0 b6 0 b5 0 0 0 b 4 b3 b 2 b 1 column r o w 0 1 1 0 0 0 0 0 0 0 0 1 1 alpha numerics red graphics red 0 0 1 0 2 alpha numerics green graphics green 0 0 1 1 3 alpha numerics yellow graphics yellow 0 1 0 0 4 alpha numerics blue graphics blue 0 1 0 1 5 alpha numerics magenta graphics magenta handbook, full 0pagewidth 1 1 0 6 alpha numerics cyan graphics cyan graphics black 0 or 1 0 0 1 2a 0 0 1 0 0 2 alpha numerics black 0 0 1 1 3 0 1 1 1 3a 0 1 0 0 or 1 1 0 0 4 1 1 5 0 or 1 1 0 1 0 1 6 0 6a 1 8 1 1 0 0 1 7a 1 0 0 1 1 7 1 0 1 1 1 9 1 1 0 0 12 1 1 0 1 1 1 13 1 0 14 1 15 (2) 0 1 1 1 7 alpha numerics white graphics white 1 0 0 0 8 flash conceal display 1 0 0 1 9 steady 1 0 1 0 10 end box separated graphics 1 0 1 1 11 start box TWIST (2) (2) contiguous graphics (2) (2) 1 1 0 0 12 normal height 1 1 0 1 13 double height 1 1 1 0 14 SO 1 1 1 1 15 SI black back ground (2) new back ground (1) hold graphics (1) (2) release graphics MLA963 - 1 Note for character version number (00100) see Register 11B. 1. These control characters are reserved for compatibility with other data codes. 2. These control characters are presumed before each row begins. January 1993 33 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A Table 12 SAA5246AP/I character data input decoding, Greek and Turkish languages. handbook, full pagewidth B b8 I T S 0 0 b7 0 b6 0 or 1 0 0 0 b5 0 0 b 4 b 3 b 2 b1 column r o w 1 0 1 graphics black 0 0 0 0 0 alpha numerics black 0 0 0 1 1 alpha numerics red graphics red 0 0 1 0 2 alpha numerics green graphics green 0 0 1 1 3 alpha numerics yellow graphics yellow 0 1 0 0 4 alpha numerics blue graphics blue 0 1 0 1 5 alpha numerics magenta graphics magenta 0 1 1 0 6 alpha numerics cyan graphics cyan 0 1 1 1 7 alpha numerics white graphics white 1 0 0 0 8 flash conceal display 1 0 0 1 9 steady contiguous graphics 1 0 1 0 10 end box separated graphics 1 0 1 1 11 start box TWIST 1 1 0 0 12 normal height black back ground 1 1 0 1 13 double height new back ground 1 1 1 0 14 SO hold graphics 1 1 1 1 15 SI 0 0 or 1 0 1 0 2 0 0 1 1 2a 0 0 1 1 3 0 1 0 1 3a 0 0 0 4 1 1 1 5 6a 1 0 1 7 7a 1 0 0 1 0 6 1 0 1 1 1 0 8 1 1 0 1 9 1 1 0 0 12 1 1 0 1 1 1 13 1 0 14 1 15 release graphics MLA964 - 1 Note for character version number (00110) see Register 11B. 1. * These control characters are reserved for compatibility with other data codes. 2. ** These control characters are presumed before each row begins. January 1993 34 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A Table 13 SAA5246AP/S character data input decoding, English and Thai languages. handbook, fullBpagewidth b 0 8 b7 I T S 0 0 b6 0 or 1 0 0 0 b5 0 0 b 4 b 3 b 2 b1 column r o w 1 0 1 graphics black 0 0 0 0 0 alpha numerics black 0 0 0 1 1 alpha numerics red graphics red 0 0 1 0 2 alpha numerics green graphics green 0 0 1 1 3 alpha numerics yellow graphics yellow 0 1 0 0 4 alpha numerics blue graphics blue 0 1 0 1 5 alpha numerics magenta graphics magenta 0 1 1 0 6 alpha numerics cyan graphics cyan 0 1 1 1 7 alpha numerics white graphics white 1 0 0 0 8 flash conceal display 1 0 0 1 9 steady contiguous graphics 1 0 1 0 10 end box separated graphics 1 0 1 1 11 start box TWIST 1 1 0 0 12 normal height black back ground 1 1 0 1 13 double height new back ground 1 1 1 0 14 SO hold graphics 1 1 1 1 15 SI 0 0 or 1 0 1 0 2 0 0 1 1 2a 0 0 1 1 3 0 1 1 1 3a 0 0 0 4 5 1 1 1 1 0 6a 1 7 7a 1 0 0 1 0 6 1 0 1 1 0 0 8 1 1 0 1 9 1 1 0 0 12 1 1 0 1 1 1 13 1 0 14 1 15 release graphics MLA965 - 1 Note For character version number (00111) see Register 11B. 1. * These control characters are reserved for compatibility with other data codes. 2. ** These control characters are presumed before each row begins. January 1993 35 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A Notes to Table 6 - 13 1. Control characters shown in Columns 0 and 1 are normally displayed as spaces. 2. Characters may be referred to by column and row, For example 2/5 refers to %. 3. Black represents displayed colour. White represents background. 4. The SAA5246A national option characters are illustrated in Table 5. Characters 8/6, 8/7, 9/5, 9/6 and 9/7 are special characters for combining with character 8/5 (E, H and T codes only. Characters 5/12, 5/13, 5/14 and 5/15 are combined with 5/11 (S code only). 6. National option characters will be displayed according to the setting of control bits C12 to C14. These will be mapped into the basic code table into positions shown in Table 8. 7. Columns 2a, 3a, 6a and 7a are displayed in graphics mode. January 1993 36 January 1993 37 2/14 2/15 2/6 2/7 3/7 3/6 3/5 3/4 3/3 3/2 3/1 3/0 3/15 3/14 3/13 3/12 3/11 3/10 3/9 3/8 4/7 4/6 4/5 4/4 4/3 4/2 4/1 4/0 NC 4/15 4/14 4/13 4/12 4/11 4/10 4/9 4/8 5/7 5/6 5/5 5/4 5/3 5/2 5/1 5/0 NC 5/15 NC 5/14 NC 5/13 NC 5/12 NC 5/11 5/10 5/9 5/8 6/7 6/6 6/5 6/4 6/3 6/2 6/1 6/0 NC 6/15 6/13 6/12 6/11 6/10 6/9 6/8 7/7 7/6 7/5 7/4 7/3 7/2 7/1 7/0 7/15 MLA630 NC 7/14 NC 7/13 NC 7/12 NC 7/11 7/10 7/9 7/8 Integrated VIP and Teletext (IVT1.0) Where: NC = national option character position. 2/13 2/5 NC 2/11 2/3 2/12 2/10 2/2 2/4 2/9 2/1 NC 2/8 2/0 Philips Semiconductors Product specification SAA5246A Table 14 SAA5146A basic character matrix. handbook, full pagewidth Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A Table 15 SAA5246AP/E national option character set. PHCB (1) CHARACTER POSITION (COLUMN / ROW) LANGUAGE C12 C13 C14 2 / 3 ENGLISH 0 0 0 GERMAN 0 0 1 SWEDISH 0 1 0 ITALIAN 0 1 1 FRENCH 1 0 0 SPANISH 1 0 1 (2) 2/4 4/0 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6/0 7 / 11 7 / 12 7 / 13 7 / 14 MEA559 (1) PHCB are the Page Header Control Bits. Other combinations default to English. January 1993 38 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A Table 16 SAA5246AP/H national option character set. andbook, full pagewidth PHCB (1) CHARACTER POSITION (COLUMN / ROW) LANGUAGE C12 C13 C14 2 / 3 POLISH 0 0 0 GERMAN 0 0 1 SWEDISH 0 1 0 SERBO-CROAT 1 0 1 CZECHOSLOVAKIA 1 1 0 RUMANIAN 1 1 1 2/4 4/0 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6/0 7 / 11 7 / 12 7 / 13 7 / 14 MLA966 (1) PHCB are the Page Header Control Bits. Other combinations default to German. Only the above characters change with the PHCB. All other characters in the basic set are shown in Table 14. January 1993 39 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A Table 17 SAA5246AP/T national option character set. andbook, full pagewidth PHCB (1) CHARACTER POSITION (COLUMN / ROW) LANGUAGE C12 C13 C14 2 / 3 ENGLISH 0 0 0 GERMAN 0 0 1 TURKISH 1 1 0 ITALIAN 0 1 1 FRENCH 1 0 0 SPANISH 1 0 1 2/4 4/0 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6/0 7 / 11 7 / 12 7 / 13 7 / 14 MBA430 (1) PHCB are the Page Header Control Bits. Other combinations default to English. Only the above characters change with the PHCB. All other characters in the basic set are shown in Table 14. January 1993 40 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A Table 18 SAA5246AP/J national option character set. ndbook, full pagewidth PHCB (1) CHARACTER POSITION (COLUMN / ROW) LANGUAGE C12 C13 C14 2 / 3 SERBO-CROAT LATIN 0 1 0 SERBO-CROAT LATIN 0 1 1 HUNGARIAN SWEDISH 0 1 1 SERBO-CROAT LATIN 0 1 1 SERBO-CROAT 0 1 1 (RUMANIAN) 0 1 1 RUMANIAN 0 1 1 SERBO-CROATIC CYRILLIC 1 0 0 2 2/4 4/0 3 4 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 5 6 7 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 MLA970 (1) PHCB are the Page Header Control Bits. Other combinations default to Serbo-Croat Latin. January 1993 41 6/0 7 / 11 7 / 12 7 / 13 7 / 14 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A Table 19 SAA5246AP/K national option character set. 2 3 4 5 6 7 2 0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14 15 15 3 4 5 6 7 ndbook, full pagewidth LANGUAGE PHCB FRENCH ARABIC (1) (C12, C13, C14) 1 0 0 1 1 1 MLA968 - 1 (1) PHCB are the Page Header Control Bits. Other combinations default to French. January 1993 42 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A Table 20 SAA5246AP/L national option character set. 2 4 5 6 7 2 0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14 15 15 ndbook, full pagewidth LANGUAGE PHCB 3 3 4 HEBREW/ENGLISH 5 6 7 ARABIC (1) (C12, C13, C14) 1 0 1 1 1 1 MLA967 (1) PHCB are the Page Header Control Bits. Other combinations default to Hebrew English. January 1993 43 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A Table 21 SAA5246AP/I national option character set. 2 3 4 5 6 7 2 3 4 5 6 7 ndbook, full pagewidth 0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14 15 15 LANGUAGE PHCB TURKISH GREEK (1) 1 1 1 0 1 1 (C12, C13, C14) MLA969 - 1 (1) PHCB are the Page Header Control Bits. Other combinations default to Turkish. January 1993 44 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A Table 22 SAA5246AP/S national option character set (part A). ndbook, full 0 pagewidth 1 2 2a 3 3a 4 5 6 6a 7 7a 8 9 10 11 12 13 14 14a 15 15a 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 PHCB (1) (C12 ,C 13 ,C14 ) English ( 0 0 0 ) TWIST not invoked OR (1) PHCB (C 12 ,C 13 ,C 14 ) Thai ( 0 1 0 ) and TWIST invoked MLA971a (1) PHCB are the Page Header Control Bits. Other combinations default to English. January 1993 45 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A Table 23 SAA5246AP/S national option character set (part B). ndbook, full pagewidth 0 1 2 2a 3 3a 4 5 6 6a 7 7a 8 9 10 11 12 13 14 14a 15 15a 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Thai ( 0 1 0 ) TWIST not invoked OR English ( 0 0 0 ) and TWIST invoked MLA971b (1) PHCB are the Page Header Control Bits. Other combinations default to English. January 1993 46 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A PACKAGE OUTLINES seating plane DIP48: plastic dual in-line package; 48 leads (600 mil) SOT240-1 ME D A2 L A A1 c e Z w M b1 (e 1) b MH 25 48 pin 1 index E 1 24 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.9 0.36 4.06 1.4 1.14 0.53 0.38 0.36 0.23 62.60 61.60 14.22 13.56 2.54 15.24 3.90 3.05 15.88 15.24 18.46 15.24 0.254 2.1 inches 0.19 0.014 0.16 0.055 0.045 0.021 0.015 0.014 0.009 2.46 2.42 0.56 0.53 0.10 0.60 0.15 0.12 0.63 0.60 0.73 0.60 0.01 0.083 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 92-11-17 95-01-25 SOT240-1 January 1993 EUROPEAN PROJECTION 47 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A QFP64: plastic quad flat package; 64 leads (lead length 2.35 mm); body 14 x 20 x 2.8 mm SOT319-3 c y X 51 A 33 52 32 ZE Q e E HE A A2 (A 3) A1 θ wM Lp pin 1 index bp L 20 64 detail X 19 1 w M bp e ZD v M A D B HD v M B 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HD HE L Lp Q v w y mm 3.25 0.30 0.10 2.90 2.65 0.25 0.50 0.35 0.25 0.14 20.1 19.9 14.1 13.9 1 25.0 24.4 19.0 18.4 2.35 1.4 1.0 1.4 1.2 0.2 0.2 0.1 Z D (1) Z E (1) 1.2 0.8 1.2 0.8 θ Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 94-03-22 95-02-04 SOT319-3 January 1993 EUROPEAN PROJECTION 48 o 7 0o Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary from 50 to 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheat for 45 minutes at 45 °C. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). WAVE SOLDERING Wave soldering is not recommended for QFP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. SDIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. If wave soldering cannot be avoided, the following conditions must be observed: The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. • The footprint must be at an angle of 45° to the board direction and must incorporate solder thieves downstream and at the side corners. • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. Even with these conditions, do not consider wave soldering the following packages: QFP52 (SOT379-1), QFP100 (SOT317-1), QFP100 (SOT317-2), QFP100 (SOT382-1) or QFP160 (SOT322-1). REPAIRING SOLDERED JOINTS During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. QFP REFLOW SOLDERING A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Reflow soldering techniques are suitable for all QFP packages. REPAIRING SOLDERED JOINTS The choice of heating method may be influenced by larger plastic QFP packages (44 leads, or more). If infrared or vapour phase heating is used and the large packages are not absolutely dry (less than 0.1% moisture content by weight), vaporization of the small amount of moisture in them can cause cracking of the plastic body. For more information, refer to the Drypack chapter in our “Quality Reference Handbook” (order code 9397 750 00192). January 1993 Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. 49 Philips Semiconductors Product specification Integrated VIP and Teletext (IVT1.0) SAA5246A DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011. January 1993 50