STV5346 STV5346/H - STV5346/T MONOCHIP TELETEXT DECODER WITH 8 INTEGRATED PAGES . . .. . . .. . COMPLETE TELETEXT DECODER INCLUDING AN 8 PAGE MEMORY ON A SINGLE CHIP UPWARD SOFTWARE COMPATIBLE WITH PREVIOUS SGS-THOMSON’s MULTICHIP SOLUTIONS (SAA5231, SDA5243, STV5345) SINGLE +5V SUPPLY VOLTAGE SINGLE 13.875MHz CRYSTAL REDUCED SET OF EXTERNAL COMPONENTS, NO EXTERNAL ADJUSTMENT OPTIMIZED NUMBER OF DIGITAL SIGNALS REDUCING EMC RADIATION HIGH DENSITY CMOS TECHNOLOGY DIGITAL DATA SLICER AND DISPLAY CLOCK PHASE LOCK LOOP 28 PIN DIP & SO PACKAGE DIP28 (Plastic Package) ORDER CODE : STV5346 West European STV5346/H East European STV5346/T Turkish & European SO28 (Plastic Package) ORDER CODE : STV5346D West European STV5346D/H East European STV5346D/T Turkish & European PIN CONNECTIONS November 1995 1 28 CBLK MA/SL 2 27 TEST VDDA 3 26 VSSA POL 4 25 VSSO STTV/LFB 5 24 XTI FFB 6 23 XTO VSSD 7 22 VDDD R 8 21 VCR/TV G 9 20 RESERVED B 10 19 RESERVED RGB REF 11 18 RESERVED BLAN 12 17 SDA COR 13 16 SCL ODD/EVEN 14 15 Y 5346-01.EPS DESCRIPTION The STV5346 decoder is a computer-controlled teletext device including an 8 page internal memory. Data slicing and capturing extracts the teletext information embedded in the composite video signal. Control is accomplished via a two wire serial I2C bus . Internal ROM provides a character set suitable to display text using up to seven national languages. Different ROM versions will support several national character sets. Hardware and software features allow selectable master/slave synchronization configurations. The STV5346 also supports facilities for reception and display of current level protocol data. CVBS 1/21 STV5346 - STV5346/H - STV5346/T o Pin N 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Symbol CVBS MA/SL VDDA POL STTV/LFB FFB VSSD R G B RGBREF BLAN COR ODD/EVEN Y SCL SDA RESERVED RESERVED RESERVED VCR/TV VDDD XTO XTI VSSO VSSA TEST CBLK Function Input Input Analog Supply Input Output / Input Input Ground Output Output Output Supply Output Output Output Output Input Input/ Output Test Input/ Output Test Input/ Output Test Input/ Output Input Digital Supply Crystal Output Crystal Input Ground Ground Test Input / Output Description Composite Video Signal Input through Coupling Capacitor Master/Slave Selection Mode +5V STTV / LFB / FFB Polarity Selection Composite Sync Output, Line Flyback Input Field Flyback Input Digital Ground Video Red Signal Video Green Signal Video Blue Signal DC Voltage to Define RGB High Level Fast Blanking Output TTL Level Open Drain Contrast Reduction Output 25Hz Output Field Synchronized for Non-interlaced Display Open Drain Foreground Information Output Serial Clock Input Serial Data Input/Output To be Connected to VSSD through a resistor To be Connected to VSSD through a resistor To be Connected to VSSD through a resistor PLL Time Constant Selection +5V Oscillator Output 13.875MHz Oscillator Input 13.875MHz Oscillator Ground Analog Ground Grounded to VSSA To connect Black Level Storage Capacitor 5346-01.TBL PIN DESCRIPTION BLOCK DIAGRAM S TTV/LFB FFB 5 22 DATA DECODING DATA P ROCES S ING XTI 24 Data 8 P AGES MEMORY Data VSS O 25 OS CILLATOR F REQUENCY S YNTHETIZER TIME BAS E S CL 16 S DA 17 CTRL Clock VCR /TV 21 XTO 23 3 Da ta CLAMP ING S YNCHRONIZING DATA EXTRACTION Address CBLK 28 VDDD VDDA 4 2 12 BLAN CTRL 1 2 Address CVBS MA/SL P OL 6 13 COR DISP LAY INTERFACE I C BUS INTERFACE 8 RED 9 GREEN 10 BLUE STV5346 7 VS S D 2/21 26 27 VSS A TE S T 11 14 RGB REF O DD/EVEN 5346-02.EPS 15 Y STV5346 - STV5346/H - STV5346/T ABSOLUTE MAXIMUM RATINGS Parameter Unit - 0.3, 6.0 V VI Input Voltage (any input) - 0.3, VDD + 0.5 V VO Output Voltage (any output) - 0.3, VDD + 0.5 V VDD Positive Supply Voltage on VDDD and V DDA Value ∆VDD Difference between VDDD, VDDA 0.25 Toper Operating Ambient Temperature 0, + 70 o - 40, + 150 o Tstg Storage Temperature V C C 5346-02.TBL Symbol ELECTRICAL CHARACTERISTICS (VDD = 5V, VSS = 0V, TA = 25oC) Symbol Parameter Min. Typ. Max. Unit 4.75 5 5.25 V SUPPLIES VDD Supply Voltage IDDD VDDD Pin Supply Current 30 mA IDDA VDDA Pin Supply Current 5 mA IBLKO Source Current (VCBLK = 2V, VCVBS = 0V) 80 µA IBLKI Sink Current (VCBLK = 2V, V CVBS = 1V)) - 10 µA 1 V INPUTS CBLK CVBS CVBSI Video Input Amplitude (peak to peak) CVBSC Input Capacitance tSYNC 10 Delay from CVBS to TCS Output from STTV Pin pF 200 ns Clamping Level at Synchro Pulse 0 mV ICLPH High Level Clamp Current (CVBS = VCLAMP + 1V) 5 µA ICLPL Low Level Clamp Current (CVBS = VCLAMP - 0.3V) - 400 µA VCLAMP MA/SL, POL, LFB, FFB, VCR/TV VIL Input Voltage Low Level VIH Input Voltage High Level IIL Input Leakage Current (VI = 0 to VDDD) CI Input Capacitance - 0.3 + 0.8 V 2 VDD V - 10 + 10 µA 10 pF + 1.5 V VIL Input Voltage Low Level VIH Input Voltage High Level IIL Input Leakage Current (VI = 0 to VDD) - 0.3 3 VDD V - 10 + 10 µA fSCL Clock Frequency (SCL) 100 kHz tR, tF Input Rise and Fall Time (10 to 90%) 2 µs Input Capacitance 10 pF VDD V 50 mA CI RGB REF VI Input Voltage II Input Current - 0.3 3/21 5346-03.TBL SCL, SDA STV5346 - STV5346/H - STV5346/T ELECTRICAL CHARACTERISTICS - VDD = 5V, VSS = 0V, TA = 25oC (continued) Symbol Parameter Min. Typ. Max. Unit OUTPUTS RGB VOL Output Low Voltage (IOL = 2mA) VOH Output High Voltage (IOH = -2mA, RGB REF = VDD/2) CL tR, tF 0.4 V RGB REF V Load Capacitance 50 pF Rise and Fall Time (10 to 90%) 20 ns 0.4 V RGB REF - 0.5 BLAN VOL Output Low Voltage (IOL = 2mA) VOH Output High Voltage (IOH = -0.2mA) CL Load Capacitance 50 pF Rise and Fall Time (10 to 90%) 20 ns 0 0.5 V VDD - 0.8 tR, tF 0 VDD - 0.5 V ODD/EVEN, STTV VOL Output Low Voltage(IOL = 2mA) VOH Output High Voltage (IOH = -0.2mA) VDD V CL Load Capacitance 50 pF Rise and Fall Time (10 to 90%) 20 ns 0.5 V tR, tF COR AND Y (with Pull up to VDDD) VOL Output Low Voltage (IOL = 2mA) CL Load Capacitance 25 pF Fall Time (RL = 1.2kΩ, VDDD - 0.5V to 1.5V) 50 ns +10 µA tF IOLL Output Leakage Current 0 -10 SDA VOL 0.5 V tF Output Low Voltage (IOL = 3mA) Fall Time (3.0 to 1.0V) 0 200 ns CL Load Capacitance 400 pF CRYSTAL OSCILLATOR XTI, XTO fXTAL Crystal Frequency RBIAS Internal Bias Resistance CI 13.875 0.4 Input Capacitance 1 MHz 3 MΩ 7 pF TIMING SERIAL BUS (referred to VIH = 3V, V IL = 1.5V) Clock : ● Low Period ● High Period 4 4 tSU, DAT Data Set-up Time 250 µs ns tHD, DAT Data Hold Time 170 ns tSU, STO Stop Set-up Time from Clock High 4 µs tBUF Start Set-up Time following a Stop 4 µs tHD, STA Start Hold Time 4 µs tSU, STA Start Set-up Time following Clock Low to High Transition 4 µs 4/21 5346-04.TBL tLOW tHIGH STV5346 - STV5346/H - STV5346/T Figure 1 : Display Output Timing LSP (TCS) 0 4.66 64 40µs R.G.B.Y (1) 0 16.67 (a) LINE RATE 56.67 all timings in µs lines 42 to 291 inclusive (and 355 to 604 inclusive interlaced) 0 41 (b) FIELD RATE 5346-03.EPS R.G.B.Y (1) 291 312 line numbers Figure 2 : Serial Bus Timing SDA t BUF t LOW tF SCL t HD,STA tR t HD,DAT t HIGH t SU,DAT SDA t SU,STO 5346-04.EPS t SU,STA VIH = 3V , VIL = 1.5V 5/21 STV5346 - STV5346/H - STV5346/T Figure 3 : Master Synchronization Mode - Hardware Configuration Synchro Extractor 1 MA/SL Line PLL VCS R1D2 = ”0” 2 Line PLL TCS R1 D2 = ”1” +5V I2C Control Bit R1 D2 4 POL STTV Output signal on STTV Pin : POL to VDD 5346-05.EPS POL grounded VCS when R1D2 = 0 TCS when R1D2 = 1 VCS when R1 D2 = 0 TCS when R1D2 = 1 Figure 4 : Master Synchronization Mode - Delivered Composite Synchronization Signal VCS, TCS (interlaced) 621 (308) 622 (309) 623 (310) 624 (311) 309 310 311 312 308 309 625 (312) 1 2 3 4 5 6 316 (3) 317 (4) 318 (5) 319 (6) 3 4 5 6 VCS, TCS (interlaced) 313 314 (1) 312 1 315 (2) TCS (non-interlaced) 310 311 2 5346-06.EPS The number positions indicate the end of lines. Internal signals : - VCS composite synchro from CVBS signal, - TCS Teletext composite synchro. Figure 5 : Slave Synchronization Mode MA/SL 2 +5V +5V LFB 5 SCS POL 4 6 POL grounded, Inputs Signals : POL to VDD, Inputs Signals : are LFB line flyback synchro on Pin 5 FFB field flyback synchro on Pin 6 are LFB line flyback synchro on Pin 5 FFB field flyback synchro on Pin 6 or SCS synchro composite signal on Pins 5 and 6 or SCS synchro composite signal on Pins 5 and 6 Note : R1D0 and R1D1 must be set to 1. 6/21 5346-07.EPS FFB STV5346 - STV5346/H - STV5346/T APPLICATION DIAGRAM 0.1µF 0.1µF +5V +5V 1µF 1 CVBS CBLK 28 2 MA/SL TEST 27 SL MA 3 VDDA VSSA 26 4 POL VSSO 25 +5V C1* 5 STTV/LFB 6 FFB 7 VSSD 8 R 9 G 3.9kΩ +5V 0.1µF XTI 24 S T V 5 3 4 6 10 B 13.875MHz C2* XTO 23 +5V VDDD 22 TV +5V VCR/TV 21 VCR 1µF 10nF 20 47kΩ** 19 47kΩ** 11 RGB REF 18 47kΩ** 12 BLAN SDA 17 13 COR SCL 16 14 ODD/EVEN Y 15 5346-08.EPS 1kΩ * Value according to used crystal, C1 = C2 = 2 * CLOAD Example : C1 = C2 = 56pF, CLOAD = 30pF. ** Depending on application. Please refer to our video application lab. Remark : all the power supply inputs must be switched on at the same time (connected to the same source). 7/21 STV5346 - STV5346/H - STV5346/T FUNCTIONAL DESCRIPTION I - Displayable Page Memory Map The organization of a page-memory is shown in Figure 6. tional state corresponds to the ”search mode” and the header appears green. • The following twenty-four characters give the header of the requested page when the system is in search mode. • The last eight characters display the time of day. - Row number twenty-four is used by the microprocessor for the display of information, or used to display X/24 colored key data according to R0D7 bit. - Row twenty-five comprises ten bytes of control data concerning the received page (see Table 1) and fourteen free bytes which can be used by the microprocessor. The display area consists of 25 rows of 40 characters per row. The organizationis as follows : - Row zero contains the page header : • The first seven characters (0 - 6) are used for messages regarding the operational status. • The eighth character is an alphanumericcontrol character either ”white” or ”green” defining the ”search” status of the page. When it is ”white” the operational state is normal and the header appears white ; when it is ”green” the operaFigure 6 : Page Memory Organization 7 Status Characters Fixed characters Alphanumerics white for normal, green on search 7 24 characters from page header rolling on page search 8 scrolling time characters ROW 24 8 0 1 1 2 3 4 5 6 7 8 9 10 11 MAIN PAGE DISPLAY AREA 12 13 14 15 16 17 18 19 20 21 22 23 8/21 10 14 10 bytes for received page information 14 bytes free for use by µC 24 25 5346-09.EPS row free for status (R0D7 = 0) or packet X/24 (R0D7 = 1) STV5346 - STV5346/H - STV5346/T FUNCTIONAL DESCRIPTION (continued) II - Ghost Row Memory Map Row Address of Stored Data Designation Code 0 0 0 0 0 1 0 0 0 1 2 0 0 1 0 3 0 0 1 1 4 0 1 0 0 5 0 1 0 1 6 0 1 1 0 7 0 1 1 1 8 1 0 0 0 9 1 0 0 1 10 1 0 1 0 11 1 0 1 1 12 1 1 0 0 13 1 1 0 1 14 1 1 1 0 15 0 0 1 0 16 0 0 0 0 17 0 0 0 1 18 0 1 0 0 19 0 1 0 1 Row (Packet) Number X / 26 Function Enhanced display facilities Page related data stored in chapter corresponding to level 1 data, i.e. For 0 goes in 4 ” 1 ” ” 5 ” 2 ” ” 6 ” 3 ” ” 7 X / 28 Conditional access Editorial X / 27 Linked pages Composition X / 24 Page extension stored here if R0D7 = 0 21 X / 25 Page extension 22 0 0 0 0 X / 28 Color definition 23 X X X X 8 / 30 * * Broadcasting service data packet 24 0 0 0 1 X/28 25 5346-05.TBL 20 Character set designation Not used * Packet 8/30 storage : 8/30/0,1 : chapter 4, row23 8/30/2,3 : chapter 5, row23 8/30/4 to 15 : chapter 6, row23 D0 PU0 PT0 MU0 MT0 HU0 HT0 C7 C11 MAG0 0 D1 PU1 PT1 MU1 MT1 HU1 HT1 C8 C12 MAG1 0 D2 PU2 PT2 MU2 MT2 HU2 C5 C9 C13 MAG2 0 D3 PU3 PT3 MU3 C4 HU3 C6 C10 C14 0 0 D4 HAM HAM HAM HAM HAM HAM HAM HAM FOUND 0 D5 0 0 0 0 0 0 0 0 0 PBLF D6 0 0 0 0 0 0 0 0 0 0 D7 0 0 0 0 0 0 0 0 0 0 COLUMN 0 1 2 3 4 5 6 7 8 9 Page number : - MAG = magazine, PU = page units, PT = page tens. Page sub-code : - MU = minutes units, MT = minutes tens, HU = hours units, HT = hours tens. PBLF = page being looked for, FOUND = low for page found, HAM = hamming error in byte, C4-14 = control bits. 9/21 5346-06.TBL Table 1 : Row 25 Received Page Control Data Format STV5346 - STV5346/H - STV5346/T FUNCTIONAL DESCRIPTION (continued) III - I2C Bus Register Map (see Table 2) Registers R0 to R10 are write only whilst R11A is a read/write and R11B is a read only register respect to the microprocessor. The automatic succession on a byte basis is indicated by the arrows in Table 2. In the normal operating mode TB should be set to logic level 0. After power-up the contents of the registers are as follows : all bits in registers R0 to R11A are cleared to zero with the exception of bits D0 and D1 in registers R5 and R6 which are set to logical one. After power-up all the memory bytes are preset to hexadecimal value 20H (space) with the exception of the byte corresponding to row 0 of column 7 of chapter 0 which is set to the value corresponding to ”alpha white” hexadecimal value 07H. D7 D6 D4 D3 D2 D1 D0 X24 POSITION (1) FREE RUNNING PLL DISABLE ROLLING HEADER (1) EVEN OFF (1) SEL 11B (1) 7 + P/ 8 BIT ACQ. ON/OFF GHOST ROW ENABLE DEW/ FULL FIELD TCS ON T1 BANK SELECT A2 ACQ. CCT A1 ACQ. CCT A0 TB START COLUMN SC2 START START COLUMN COLUMN SC0 SC1 (1) (1) (1) PRD4 PRD3 PRD2 PRD1 PRD0 (1) (1) (1) (1) (1) A2 A1 A0 BKGND OUT BKGND IN COR OUT COR IN TEXT OUT TEXT IN PON OUT PON IN BKGND OUT BKGND IN COR OUT COR IN TEXT OUT TEXT IN PON OUT PON IN STATUS ROW BTM/TOP CURSOR ON/OFF CONCEAL/ REVEAL TOP/ BOTTOM SINGLE/ DOUBLE HEIGHT BOX ON 24 BOX ON 1-23 BOX ON 0 (1) (1) (1) (1) CLEAR MEM. A2 A1 A0 (1) (1) (1) R4 R3 R2 R1 R0 (1) (1) C5 C4 C3 C2 C1 C0 D7 (R/W) D6 (R/W) D5 (R/W) D4 (R/W) D3 (R/W) D2 (R/W) D1 (R/W) D0 (R/W) 60Hz 0 0 0 0 0 0 VCS QUAL (1) D5 (1) Reserved register bits : must be set to 0 10/21 T0 ↵ R0 Mode 0 ↵ R1 Mode 1 ↵ R2 Page request address R3 Page request data ↵ ↵ ↵ R4 Display chapter R5 Display control (normal) R6 Display control (newsflash / subtitle) R7 Display mode R8 Active chapter R9 Active row R10 Active column R11A Active data R11B Status ↵ ↵ ↵ 5346-07.TBL Table 2 : Register specification STV5346 - STV5346/H - STV5346/T FUNCTIONAL DESCRIPTION (continued) III - I2C Bus Register Map (continued) III.1 - Register Functions Register Function Bit(s) SEL 11B (D0) EVEN OFF (D2) R0 Address 00H R11 adressing and pin functions control DISABLE ROLLING HEADER FREE RUNNING PLL (D6) X/24 POSITION (D7) T1 (D1) 0 0 1 1 T0 (D0) 0 1 0 1 TCS ON (D2) R1 Address 01H Operating mode controls DEW / FULLFIELD (D3) Description Selection of register 11B (D0 = 1) or 11A (D0 = 0) Control of ODD/EVEN pin : EVEN signal output (D2 = 0) or grounded (D2 = 1) D4 = 1, Disable rolling header D4 = 0, Normal operation D6 = 0, PLL locks on line frequency D6 = 1, to force free running mode D7 = 0, packet X/24 stored to chapter 4 to 7/row 20 D7 = 1, packet X/24 stored to chapter 0 to 3/row 24 Character display line control : 312/313 line MIX - mode with interlace 312/313 line TEXT - mode without interlace 312/312 line Terminal mode without interlace External synchronization. SCS mode (scan field synchro) Master Mode (MA/SL Pin 2 = 0) case POL Pin 4 = 0 D2 = 0, Pin 5 = VCS D2 = 1, Pin 5 = TCS Slave Mode (MA/SL Pin 2 = VDD) No effect Selection of field flyback mode or full channel mode (D3 = 1) for recovering of Teletext data. GHOST ROW ENABLE (D4) Selection of ghost row mode (D4 = 1) ACQUISITION ON / OFF (D5) Control of acquisition operation (D5 = 0 enables acquisition) 7 bits + parity or 8 bits Selection of received data format either 7 bits with parity without parity (D6) (D6 = 0) or 8 bits without parity (D6 = 1). SC0, SC1, SC2 (D0, D1, D2) R2 Address 02H Addressing information for a page request TB (D3) A0, A1 (D4, D5) A2 (D6) Address the first column of the on chip page request RAM to be written. Test bit equal to ”0” in the normal working mode. Address a group of four consecutive pages currently used for data acquisition. Address of one of the two groups of four pages for acquisition in normal mode. R3 Address 03H Data relative to the requested page (see Table 3) PRD0 - PRD4 (D0 - D4) Written data in the page request RAM, starting with the columns addressed by SC0,SC1,SC2. R4 Address 04H Selection of one of eight pages to display A0, A1, A2 (D0, D1, D2) These 3 bits correspond to the logical states of the 3 address lines (A10, A11, A12) during memory read cycles. PON (D0, D1) Picture on (IN: D0, OUT: D1) Display control for normal operation TEXT (D2, D3) Text on (IN: D2, OUT: D3) COR (D4, D5) Contrast reduction on (IN: D4, OUT: D5) BKGND (D6, D7) Background color on (IN: D6, OUT: D7) IN / OUT R6 Address 06H Display control for news-flash subtitle generation See R5 Enable inside/outside the box 5346-08.TBL R5 Address 05H See R5 11/21 STV5346 - STV5346/H - STV5346/T FUNCTIONAL DESCRIPTION (continued) III - I2C Bus Register Map (continued) III.1 - Register Functions (continued) Function Bit(s) Description BOX ON 0, 1-23,24 (D0, D1, D2) R7 Address 07H The ”boxing” function is enabled on row 0,1-23 and 24 by D0, D1 and D2 set to one. TOP / BOTTOM X0 = Normal Single / Double Height 01 = double height Rows 0 to 11 (D4/D3) 11 = double height Rows 12 to 23 Display mode Conceal / Reveal (D5) Conceal Reveal Function Cursor ON/OFF (D6) Cursor position given by row/column value of R9/R10 STATUS ROW BTM / TOP (D7) R8 to R11A Address 08H to 0BH* R11B Address 0BH* The row 24 is displayed before the ”Main text Area” (lines 0-23) or after (D7 = 0). Active chapter address (R8), active row address (R9), active column address (R10). 2 Data contained in R11A read (written) from (to) memory by microprocessor via I C. VCS QUAL (D0) Good VCS quality signal detected (D0 = 1) or disturbance (D0 = 0) Status 60Hz (D7) VCS received with 60Hz frequency (D7 = 1) or 50Hz (D7 = 0). Valid only when if good V CS (D0 = 1) 5346-09.TBL Register * Reading of R11A or R11B is de termined by register 0, bit D0. Nevertheless, write operation is always performed on R11A register. START COLUMN PRD4 PRD3 PRD2 PRD1 PRD0 0 Do care magazine HOLD MAG2 MAG1 MAG0 1 Do care page tens PT3 PT2 PT1 PT0 2 Do care page units PU3 PU2 PU1 PU0 3 Do care hours tens X X HT1 HT0 4 Do care hours units HU3 HU2 HU1 HU0 5 Do care minutes tens X MT2 MT1 MT0 6 Do care minutes units MU3 MU2 MU1 MU0 The abbreviations have the same significance as in Table 1 with the exception of the ”DO CARE” entries. It is only when this bit is ”1” that the corresponding digit is taken into consideration on page request. For example, a page defined as ”normal” or one defined as ”timed” may be selected. If ”HOLD” is low the page is held. The addressing of successive bytes via the I2C is automatic. IV - Character Sets The complete character set with 8-bit decoding is given in Tables 4, 5 and 6. Characters in columns 0 and 1 are normally displayed as blanks. Black dots represent the character shape whereas white dots represent the background. Each character can be identified by a pair of corre- 12/21 sponding row and column integers : for example the character ”3” may be indicated by 3/3. A rectangle may be represented as follows : The characters 8/6, 8/7, 9/5, 9/7 are used as special characters, always in conjunction with 8/5. The 13 national characters are placed in columns with bit 8 = 0. 5346-10.TBL Table 3 : Register R3 * ** Case using C12 C13 C14 = 001 (German Set) These co ntrol characters are reserved for compatibility with other data codes. These co ntrol characters are presumed before each row begins 5346-10.EPS 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 B I T S b4 b 3 b2 b1 b8 b7 b6 b5 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 r o w graphics blue graphics magenta graphics cyan graphics white alphanumerics blue alphanumerics magenta alphanumerics cyan ** alphanumerics white SI SO double height normal height start box end box steady * * ** ** ** graphics yellow alphanumerics yellow * release graphics hold graphics ** ** new background ** black background ESC separated graphics ** continuous graphics conceal displa y graphics green alphanumerics green flash graphics red 1 alphanumerics red 0 graphics black 0 0 alphanumerics black 0 0 1 0 0 column 0 2 0 or 1 0 1 0 0 1 2a 0 0 3 0 or 1 0 1 1 0 1 3a 0 1 0 1 4 0 0 0 1 5 0 1 6 0 1 1 6a 0 7 0 1 1 7a 1 1 0 8 0 0 1 0 9 0 1 1 0 12 1 0 1 0 13 1 1 1 1 14 1 0 1 1 15 1 1 STV5346 - STV5346/H - STV5346/T FUNCTIONAL DESCRIPTION (continued) Table 4 : STV5346 Complete Character Set (with 8 bit codes) - West European Languages 13/21 * ** 14/21 Case using C12 C13 C14 = 001 (Rumanian Set) These co ntrol characters are reserved for compatibility with other data codes. These co ntrol characters are presumed before each row begins 5346-11.EPS 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 b 4 b 3 b2 b 1 B I T S graphics blue graphics magenta graphics cyan graphics white alphanumerics blue alphanumerics magenta alphanumerics cyan ** alphanumerics white 4 5 flash steady end box start box normal height double height SO SI 9 10 11 12 13 14 15 7 * * ** ** ** graphics yellow alphanumerics yellow 3 * ** release graphics hold graphics ** ** new background ** black background ESC separated graphics continuous graphics conceal display graphics green alphanumerics green 2 6 graphics red alphanumerics red 1 1 0 graphics black 0 alphanumerics black 0 0 0 0 1 0 2 column 0 8 r o w b8 b7 b6 b5 2 0 or 1 0 1 0 0 1 2a 0 0 3 0 or 1 0 1 0 0 1 3a 0 0 0 1 4 0 0 0 1 5 0 1 6 0 1 1 6a 0 7 0 1 1 7a 1 1 0 8 0 0 1 0 9 0 1 1 0 12 1 0 1 0 13 1 1 1 1 14 1 0 1 1 15 1 1 STV5346 - STV5346/H - STV5346/T FUNCTIONAL DESCRIPTION (continued) Table 5 : STV5346/H Complete Character Set (with 8 bit codes) - East European Languages * ** Case using C12 C13 C14 = 001 (German Set) These cont rolcha racters are reserved for compatibility with other da ta codes. These cont rolcha racters are presumed before each row begins 5346-12.EPS 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 b4 b3 b 2 b 1 B I T S b8 b7 b6 b5 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 0 0 magenta graphics cyan magenta alphanumerics cyan SI * * graphics release graphics hold height SO new background double black ESC graphics separated graphics continuous display background ** ** ** conceal white 1 normal height start box end box steady flash white alphanumerics graphics graphics alphanumerics ** blue alphanumerics blue graphics green yellow green alphanumerics graphics graphics red alphanumerics red alphanumerics yellow black graphics black graphics 0 0 alphanumerics 0 1 0 2 column 10 r o w 0 ** ** ** * ** 2 0 or 1 0 1 0 0 1 2a 0 0 3 0 or 1 0 1 0 0 1 3a 0 0 0 1 4 0 0 0 1 5 0 1 6 0 1 1 6a 0 7 0 1 1 7a 1 1 0 8 0 0 1 0 9 0 1 1 0 12 1 0 1 0 13 1 1 1 1 14 1 0 1 1 15 1 1 STV5346 - STV5346/H - STV5346/T FUNCTIONAL DESCRIPTION (continued) Table 6 : STV5346/TComplete Character Set (with 8 bit codes) - Turkish European Languages 15/21 STV5346 - STV5346/H - STV5346/T FUNCTIONAL DESCRIPTION (continued) The basic set of the 96 characters is shown in Table 7. The location of the 13 national characters are shown in Table 7 whilst full national character sets are depicted in Tables 8, 9 and 10. Table 7 : Basic Character Set. 3/0 4/0 2/1 3/1 2/2 National 5/0 6/0 4/1 5/1 6/1 7/1 3/2 4/2 5/2 6/2 7/2 3/3 4/3 5/3 6/3 7/3 3/4 4/4 5/4 6/4 7/4 2/5 3/5 4/5 5/5 6/5 7/5 2/6 3/6 4/6 5/6 6/6 7/6 2/7 3/7 4/7 5/7 6/7 7/7 2/8 3/8 4/8 5/8 6/8 7/8 2/9 3/9 4/9 5/9 6/9 7/9 2/10 3/10 4/10 5/10 6/10 7/10 2/11 3/11 4/11 5/11 6/11 7/11 2/12 3/12 4/12 5/12 6/12 7/12 2/13 3/13 4/13 5/13 6/13 7/13 2/14 3/14 4/14 5/14 National Character 6/14 7/14 2/15 3/15 4/15 5/15 National Character 6/15 7/15 2/3 2/4 16/21 National National Character National Character Charac ter National Character National Character National Character Character 7/0 National Character National Charac ter National Charac ter National Character 5346-13.EPS 2/0 STV5346 - STV5346/H - STV5346/T FUNCTIONAL DESCRIPTION (continued) Note 1 : 1 5346-14.EPS 1 SPANISH 0 0 1 FRENCH 0 1 0 ITALIAN 1 0 0 SWEDISH 1 1 0 GERMAN 0 0 0 0 ENGLISH LANGUAGE C12 C13 PHCB (1) C14 2/3 2/4 4/0 5/11 5/12 5/13 5/14 5/15 CHARACTER POSITION (COLUMN/ROW) 6/0 7/11 7/12 7/13 7/14 Table 8 : STV5346 Character Set - West European Languages Where PHCB are the Page Head er Control bits. Other Combinations default to English. Only the above characters change with the PHCB. All others characters in the basic set are sho wn in Table 7. 17/21 STV5346 - STV5346/H - STV5346/T FUNCTIONAL DESCRIPTION (continued) Table 10 : STV5346/T Character Set Turkish European Languages 18/21 7/13 7/12 7/11 6/0 5/13 5/14 5/15 CHARACTER POSITION (COLUMN/ROW) 5/12 5/11 4/0 2/4 1 Where PHCB are the Page Header Control bits. Other Combinations default to Turkish. Only the above characters change with the PHCB. All others characters in the basic set are shown in Table 7. 5346-16.EPS 1 SPANISH 0 0 1 FRENCH 0 1 0 ITALIAN 1 0 1 TURKISH 1 1 0 GERMAN 0 0 0 0 C12 LANGUAGE 5346-15.EPS Note 1 : ENGLISH C14 2/3 Where PHCB are the Page Header Control bits. Other Combinations default to German. Only the above characters change with the PHCB. All others characters in the basic set are shown in Table 7. C13 PHCB (1) 1 1 1 RUMANIAM 0 1 1 CZECHOSLOVAK 1 0 1 SERBO-CROAT 0 1 0 SWEDISH 1 0 GERMAN 0 0 0 POLISH 0 C13 PHCB (1) LANGUAGE Note 1 : C12 C14 2/3 2/4 4/0 5/11 5/12 5/13 5/14 5/15 CHARACTER POSITION (COLUMN/ROW) 6/0 7/11 7/12 7/13 7/14 STV5346/H Character Set East European Languages 7/14 Table 9 : STV5346 - STV5346/H - STV5346/T FUNCTIONAL DESCRIPTION (continued) Figure 7 : Character Format Contiguous graphics character 7/6 Alphanumerics character 2/13 Separated graphics character 7/6 Alphanumerics or blast-through alphanumerics character 4/8 Separated graphics character 7/15 = Background Color Alphanumerics character 7/15 Contiguous graphics character 7/15 = 5346-17.EPS Alphanumerics and Graphics ’space’ characte r 2/0 Display Color 19/21 STV5346 - STV5346/H - STV5346/T PM-DIP28.EPS PACKAGE MECHANICAL DATA 28 PINS - PLASTIC DIP a1 b b1 b2 D E e e3 F I L 20/21 Min. Millimeters Typ. 0.63 0.45 0.23 Max. Min. 0.31 0.009 1.27 2.54 33.02 0.012 1.470 0.657 0.598 0.100 1.300 14.1 4.445 3.3 Max. 0.050 37.4 16.68 15.2 Inches Typ. 0.025 0.018 0.555 0.175 0.130 DIP28.TBL Dimensions STV5346 - STV5346/H - STV5346/T PM-SO28.EPS PACKAGE MECHANICAL DATA 28 PINS - PLASTIC MICROPACKAGE (SO) Dimensions Millimeters Typ. 0.1 0.35 0.23 Max. 2.65 0.3 0.49 0.32 Min. Inches Typ. 0.004 0.014 0.009 0.5 Max. 0.104 0.012 0.019 0.013 0.020 o 45 (typ.) 17.7 10 18.1 10.65 0.697 0.394 1.27 16.51 7.4 0.4 0.713 0.419 0.050 0.65 7.6 1.27 0.291 0.016 0.299 0.050 SO28.TBL A a1 b b1 C c1 D E e e3 F L S Min. o 8 (max.) Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. 1995 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 21/21