SEMTECH SC1103_05

SC1103
Asynchronous Voltage Mode PWM
Controller for 12V Input
POWER MANAGEMENT
Description
Features
The SC1103 is a versatile, low-cost, voltage-mode PWM
controller designed for 12V input DC/DC power supply
applications. A simple, fixed-voltage buck regulator can
be implemented using the SC1103 with a minimum of
external components. Internal level shift and drive
circuitry eliminates the need for an expensive p-channel,
high-side switch. The small device footprint
allows for compact circuit design.
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SC1103 features include a temperature compensated
voltage reference, triangle wave oscillator, current limit
comparator, frequency shift over-current protection, and
an internally compensated error amplifier. Pulse by pulse
current limiting is implemented by sensing the
differential voltage across an external resistor, or an
appropriately sized PC board trace.
Low cost / small size
Switch mode efficiency up to 95%
1% reference voltage accuracy
Over current protection
500mA output drive
5V to 12V Input power source
Lead free package available. Fully WEEE and RoHS
compliant
Applications
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Pentium® P55 Core Supply
Low Cost Microprocessor Supplies
Peripheral Card Supplies
Industrial Power Supplies
High Density DC/DC Conversion
The SC1103 operates at a fixed frequency of 200kHz,
providing an optimum compromise between efficiency,
external component size, and cost.
Typical Application Circuit
L1
6uH
Q1
IRLR3103
Vout = 2.5V @ 10A
R5
0.05
+
+12V
C1
1.0
C2
C3
47/16V
D2
MBRD1035L
47/16V
GND
C8
220/4V
C9
220/4V
C10
220/4V
C11
1.0
R6
127*see note
R7
127
GND
+20V
R1
10
C4
0.1
R2
1k
R3
1k
C5
0.001
U1
SC1103
1
VCC
GND
8
2
CS(-)
FB
7
3
CS(+)
BST
6
4
PGND
DH
5
C6
0.01
R4
2.2
C7
0.1
* NOTE:
R6 = R7 x (Vout/1.25 - 1) rounded to nearest 1%value
12V to 3.3V @ 10A with “flying capacitor” boost voltage.
Revision: July 28, 2005
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SC1103
POWER MANAGEMENT
Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified
in the Electrical Characteristics section is not implied.
Parameter
Symbol
Maximum
Units
Input Voltage
VCC to GND
-0.3 to 14
V
Ground Differential
PGND to GND
±1
V
Boost Input Voltage
BST to GND
-0.3 to +26
V
Operating Ambient Temperature Range
TAMB
0 to +70
°C
Storage Temperature Range
TSTG
-45 to +125
°C
TJ
125
°C
TLEAD
300
°C
Thermal Resistance, Junction to Ambient
θJ A
165
°C/W
Thermal Resistance, Junction to Case
θJ C
40
°C/W
Maximum Junction Temperature
Lead Temperature (Soldering) 10 Sec.
Electrical Characteristics
VCC = 11.40V to 12.60V; GND = PGND = 0V; VO = 2.5V; TA = 25°C; BST = 22 ± 2V;
Per test circuit, unless otherwise specified.
Parameter
Symbols
Reference
VREF
Conditions
Min
Typ
Max
Units
1.238
1.250
1.263
V
1.225
1.250
1.275
2.0
8.0
µA
Current into VCC pin
5.0
8.0
mA
Load Regulation
IO = 1A to 10A
0.5
1.0
%
Line Regulation
IO = 10A
0.5
%
Over 0 to 125°C Temp. range
Feedback Bias Current
IFB
Quiescent Current
IQ
Current Limit Threshold
CS(+) to CS (-)
Oscillator Frequency
Oscillator Frequency Shift
UVLO Threshold
75
85
mV
170
200
230
kHz
VFB < VREF/2
Max Duty Cycle
DH Sink/Source Current
65
90
IO
VBST - VDH = 4.5V / (VDH - VPGND = 2V)
50
kHz
95
%
500
mA
3.8
VUVLO
V
Note:
(1) This device is ESD sensitive. Use of standard ESD handling precautions is required.
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SC1103
POWER MANAGEMENT
Pin Configuration
Ordering Information
Device
Top View
Package(1)
Temp Range (TJ)
SO - 8
0° to 125°C
SC1103CS.TR
SC1103CSTRT(2)
Notes:
(1) Only available in tape and reel packaging. A reel
contains 2500 devices.
(2) Lead free product. This product is fully WEEE and
RoHS compliant.
(SO-8)
Pin Descriptions
Pin #
Pin Name
Pin Function
1
VC C
Device Input Voltage.
2
CS(-)
Current Sense Input (Negative).
3
CS(+)
Current Sense Input (Positive).
4
PGND
Device power ground.
5
DH
High side driver output.
6
BST
High side driver VBST (Boost).
7
FB
8
GND
Error amplifier input (-).
Signal ground.
Block Diagram
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SC1103
POWER MANAGEMENT
Applications Information
Layout Guidelines
Careful attention to layout requirements are necessary
for successful implementation of the SC1103 PWM controller. High currents switching at 200kHz are present in
the application and their effect on ground plane voltage
differentials must be understood and minimized.
4) The Output Capacitor(s) (Cout) should be located as
close to the load as possible, fast transient load currents are supplied by Cout only, and connections between
Cout and the load must be short, wide copper areas to
minimize inductance and resistance.
1). The high power parts of the circuit should be laid out
first. A ground plane should be used, the number and
position of ground plane interruptions should be such as
to not unnecessarily compromise ground plane integrity.
Isolated or semi-isolated areas of the ground plane may
be deliberately introduced to constrain ground currents
to particular areas, for example the input capacitor and
bottom Schottky ground.
5) The SC1103 is best placed over an isolated ground
plane area. GND and PGND should be returned to this
isolated ground. This isolated ground area should be
connected to the main ground by a trace that runs from
the GND pin to the ground side of (one of) the output
capacitor(s). If this is not possible, the GND pin may be
connected to the ground path between the Output
Capacitor(s) and the Cin, Q1, D1 loop. Under no circumstances should GND be returned to a ground inside the
Cin, Q1, D1 loop.
2). The loop formed by the Input Capacitor(s) (Cin), the
Top FET (Q1) and the Schottky (D1) must be kept as small
as possible. This loop contains all the high current, fast
transition switching. Connections should be as wide and
as short as possible to minimize loop inductance. Minimizing this loop area will reduce EMI, lower ground injection currents, resulting in electrically “cleaner” grounds
for the rest of the system and minimize source ringing,
resulting in more reliable gate switching signals.
6) Vcc for the SC1103 should be supplied from the VIN
supply through a 10Ω resistor, the Vcc pin should be
decoupled directly to GND by a 0.1µF ceramic capacitor,
trace lengths should be as short as possible.
7) The Current Sense resistor and the divider across it
should form as small a loop as possible, the traces running back to CS(+) and CS(-) on the SC1103 should run
parallel and close to each other.
8) To minimize noise pickup at the sensitive FB pin, the
feedback resistors should both be close to the SC1103
with the bottom resistor (Rb) returned to ground at the
GND pin.
3). The connection between the junction of Q1, D1 and
the output inductor should be a wide trace or copper
region. It should be as short as practical. Since this connection has fast voltage transitions, keeping this connection short will minimize EMI. The connection between
the output inductor and the sense resistor should be a
wide trace or copper area, there are no fast voltage or
current transitions in this connection and length is not
so important, however adding unnecessary impedance
will reduce efficiency.
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Under Voltage Lockout
The under voltage lockout circuit of the SC1103 assures
that the high-side MOSFET driver outputs remain in the
off state whenever the supply voltage drops below set
parameters. Lockout occurs if VCC falls below 3.8V. Normal operation resumes once VCC rises above 3.8V.
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SC1103
POWER MANAGEMENT
Applications Information (Cont.)
Layout diagram for the SC1103
VO = VREF (1 + Ra/Rb)
12VIN
20-24V BST
10
0.1uF
Q1
SC1103CS
1
2
3
4
0.001uF
VCC
GND
CS(-)
CS(+)
PGND
FB
BST
DH
Cin
+
8
Vout
7
6uH
Rb
6
+
D1
Cout
5
Ra
Heavy lines indicate
high current paths.
Application Circuit
12V to 2.5V @ 10A (Bootstrapped)
D1
LL4148
C7
0.1
L1
6uH
Q1
IRLR3103
R5
0.05
+
+12V
C1
1.0
C2
47/16V
C3
47/16V
D2
MBRD1035L
C8
220/4V
C9
220/4V
C10
220/4V
C11
1.0
R6
76.8 *see note
R7
127
Vout = 2.5V @ 10A
GND
GND
R1
10
R2
1k
C4
R3
1k
U1
SC1103
1
VCC
GND
8
2
CS(-)
FB
7
3
CS(+)
BST
6
4
PGND
DH
5
C6
0.01
R4
2.2
C5
0.001
0.1
* NOTE:
R6 = R7 x (Vout/1.25 - 1) rounded to nearest 1%value
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SC1103
POWER MANAGEMENT
Typical Characteristics
Error Amplifier, Gain and Phase
Load Regulation @ VIN = 12V
40
180
1.0%
35
0.8%
30
0.6%
135
90
15
Gain
10
45
Phase
Load Regulation
20
Phase (deg)
Gain (dB)
25
5
0
0.4%
Vo=
1.8V
2.5V
3.3V
5.0V
0.2%
0.0%
-0.2%
-0.4%
-0.6%
0
-0.8%
-5
-1.0%
-10
100.0E+0
1.0E+3
10.0E+3
100.0E+3
-45
10.0E+6
1.0E+6
0
2
4
6
8
10
12
14
Output Current, (A)
Frequency (Hz)
VRIPPLE @ VIN = 12V, VO = 3.3V, IO = 10A
Line Regulation @ VO = 3.3V, IO = 10A
0.5%
0.4%
Line Regulation
0.3%
0.2%
0.1%
0.0%
-0.1%
-0.2%
-0.3%
-0.4%
-0.5%
11.4
11.6
11.8
12.0
12.2
12.4
12.6
Input Voltage, (V)
Efficiency @ VIN = 12V
100%
90%
Efficiency
80%
1.8V
2.5V
3.3V
5V
70%
60%
50%
40%
0
2
4
6
8
10
12
14
Output Current, (A)
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SC1103
POWER MANAGEMENT
Outline Drawing - SO-8
A
D
e
N
DIM
E1 E
1
2
ccc C
2X N/2 TIPS
.069
.053
.010
.004
.065
.049
.012
.020
.007
.010
.189 .193 .197
.150 .154 .157
.236 BSC
.050 BSC
.010
.020
.016 .028 .041
(.041)
8
0°
8°
.004
.010
.008
A
A1
A2
b
c
D
E1
E
e
h
L
L1
N
01
aaa
bbb
ccc
2X E/2
e/2
B
D
DIMENSIONS
MILLIMETERS
INCHES
MIN NOM MAX MIN NOM MAX
aaa C
SEATING
PLANE
h
A2 A
C
A1
bxN
bbb
1.35
1.75
0.25
0.10
1.65
1.25
0.31
0.51
0.25
0.17
4.80 4.90 5.00
3.80 3.90 4.00
6.00 BSC
1.27 BSC
0.25
0.50
0.40 0.72 1.04
(1.04)
8
0°
8°
0.10
0.25
0.20
h
H
C A-B D
c
GAGE
PLANE
0.25
SEE DETAIL
A
L
(L1)
DETAIL
SIDE VIEW
01
A
NOTES:
1.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS
OR GATE BURRS.
4. REFERENCE JEDEC STD MS-012, VARIATION AA.
Minimum Land Pattern - SO-8
X
DIM
(C)
G
Z
Y
C
G
P
X
Y
Z
DIMENSIONS
INCHES
MILLIMETERS
(.205)
.118
.050
.024
.087
.291
(5.20)
3.00
1.27
0.60
2.20
7.40
P
NOTES:
1.
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
2. REFERENCE IPC-SM-782A, RLP NO. 300A.
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
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