SCD5580 YELLOW SCD5581 HIGH EFFICIENCY RED SCD5582 GREEN SCD5583 HIGH EFFICIENCY GREEN SCD5584 STANDARD RED Slimline .145” 8-Character 5x5 Dot Matrix Serial Input Dot Addressable Intelligent Display Package Dimensions in inches (mm) 1.500 max. (38.10) .187 .100 (.47) (2.54) 0.145 (3.68) .050 (1.27) typ. .394 –.006 (10.0 –.15) Pin 1 Indicator 0.160 –.02 (4.06 –.51) FEATURES • Eight 0.145" (3.68 mm) 5x5 dot matrix characters in red, yellow, high efficiency red, green, or high efficiency green • Optimum display surface efficiency (display area to package ratio) • Low power–30% less power dissipation than 5x7 format • High speed data input rate: 5 MHz • ROMless serial input, dot addressable display–ideal for user defined characters • Built-in decoders, multiplexers and LED drivers • Readable from 6 feet (1.8 meters) • Wide viewing angle, X axis ± 55°, Y axis ± 65° • Attributes – 200 bit RAM for user defined characters – Eight dimming levels – Power down mode (<250 mW) – Hardware/software clear function – Lamp test • Internal or external clock • End-stackable dual-in-line plastic package • 3.3 V capability 1. 2. 3. 4. .012 (.30) typ. .300 –.020 (7.62 –.51) 1 0.200 (5.08) EIA date code Intensity Code SCD-558X Hue Category Z Y SIEMENS YYWW Seating Plane .020 (.51) typ. .100 –.010 typ. (2.54 –.25) Tol. non-cum. 1 1.300 ref. (33.02) 1.312 ref. (33.32) Dimension is at Seating Plane Display matrix and pins centered on package outline. Display matrix centered to pin array. Tolerance: .XXX = ± .010 (.25) DESCRIPTION The SCD5580 (Red), SCD5581 (Yellow), SCD5582 (HER), SCD5583 (Green) and SCD5584 (HEG) are eight digit dot addressable 5x5 matrix, Serial Input, Intelligent Displays. The eight 0.145" (3.68 mm) high digits are packaged in a rugged, high quality optically transparent, standard 0.3" pin spacing 28 pin plastic DIP. The on-board CMOS has a 200 bit RAM, one bit associated with one LED, each to generate User Defined Characters. Due to the reduced LED count, power requirement and heat dissipation are reduced by 30%. Additionally in Power Down Mode quiescent current is <50 µA. The SCD558X is designed to work with the Serial port of most common microprocessors. The multiplex Clock I/O (CLK I/O) and multiplex Clock Select (CLK SEL) pins offer the user the capability to supply a high speed external multiplex clock. This feature can minimize audio in-band interference for portable communication equipment or eliminate the visual synchronization effects found in high vibration environments such as avionic equipment 2–1 Maximum Ratings DC Supply Voltage ......................................................... –0.5 to +7.0 Vdc Input Voltage Levels Relative to Ground.................................................................–0.5 toVCC+0.5 Vdc Operating Temperature .................................................. –40°C to +85°C Storage Temperature ..................................................... –40°C to +100°C Maximum Solder Temperature 0.063" below Seating Plane, t<5 sec........................................................260°C Relative Humidity at 85°C.................................................................. 85% Maximum Number of LEDs on at 100% Brightness ............................128 Maximum Power Dissipation ......................................................1.7 Watts IC Junction Temperature .................................................................125°C ESD (100 pF, 1.5 KΩ)......................................................................... 2 KV Maximum Input Current ............................................................. ± 100 mA. Figure 1a. Data write cycle 3.5 V LOAD 1.5 V TLDS TLDH 3.5 V DATA 1.5 V Switching Specifications (over operating temperature range and VCC=4.5 V to 5.5 V) Symbol Description Min. Units TRC Reset Active Time 600 ns TLDS Load SetupTime 50 ns TDS Data Setup Time 50 ns TSDCLK Clock Period 200 ns TSDCW Clock Width 70 ns TLDH Load Hold Time 0 ns TDH Data Hold Time 25 ns TWR Total Write Time 2.2 µs TBL Time Between Loads 600 ns Note: TSDCW is the minimum time the SDCLK may be low or high. The SDCLK period must be a minimum of 200 ns. TDS TDH 3.5 V SDCLK 1.5 V TSDCW TSDCW TSDCLK Period Figure 1b. Instruction cycle TWR TBL LOAD SDCLK DATA D0 D1 D2 D3 D4 D5 D6 D7 D0 D4 D5 D6 D7 D0 OR LOAD SDCLK DATA D0 D1 D2 D3 PD – Maximum Power Dissipation – Watts Figure 2. Maximum power dissipation vs. temperature 3.0 2.5 2.0 θJA=31°C/W 1.5 1.0 0.5 0.0 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 120 130 140 TA – °C Ambient Temperature SCD5580/5581/5582/5583/5584 2–2 Electrical Characteristics (over Operating Temperature) Parameter Min. Typ. Max. Units VCC 4.5 5.0 5.5 V 50 µA VCC=5 V, all inputs=0 V or VCC 290 mA VCC=5 V, “#” displayed in all 8 digits at 100% brightness at 25°C IIL Input Current –10 µA VCC=5 V, VIN=0 V (all inputs) IIH Input Current +10 µA VCC=VIN=5.0 V (all inputs) V VCC=4.5 to 5 V V VCC=4.5 to 5 V ICC (Power Down Mode) (4) ICC 8 digits, 16 dots/character VIH 200 3.5 VIL 1.5 Condition IOH (Clk I/O) –8.9 mA VCC=4.5 V, VOH=2.4 V IOL (Clk I/O) 1.6 mA VCC=4.5 V, VOH=0.4 V θJC-PIN 31 °C/W Fext External Clock Input Frequency 120 347 KHz VCC=5 V, CLKSEL=0 FOSC Internal Clock Input Frequency 120 347 KHz VCC=5 V, CLKSEL=1 Clock I/O Bus Loading 240 pF Clock Out Rise Time 500 ns VCC=4.5 V, VOH=2.4 V Clock Out Fall Time 500 ns VCC=4.5 V, VOH=2.4 V 1086 Hz FM, Digit 375 768 Notes: 1. Peak current=5⁄3 X ICC. 2. Unused inputs must be tied high. 3. Contact Siemens for 3.3 volt operation. 4. External oscillator must be stopped if being used to maintain an ICC<50 µ Input/Output Circuits Figures 3 and 4 show the input and output resistor/diode networks used for ESD protection and to eliminate substrate latch-up caused by input voltage over/under shoot.A. Figure 3. Inputs Figure 4. Clock I/O VCC VCC input input/output 1 KΩ 1 KΩ GND GND SCD5580/5581/5582/5583/5584 2–3 Optical Characteristics at 25°C VCC=5.0 V at 100% Brightness Level, Viewing Angle: X Axis ± 55°, Y Axis ± 65° Red SCD5580 Description Symbol Min. Typ. Units Luminous Intensity IV 36 90 µcd/dot Peak Wavelength λPEAK 665 nm Dominant Wavelength λD 639 nm Yellow SCD5581 Description Symbol Min. Typ. Units Luminous Intensity IV 124 213 µcd/dot Peak Wavelength λPEAK 583 nm Dominant Wavelength λD 584 nm High Efficiency Red SCD5582 Description Symbol Min. Typ. Units Luminous Intensity IV 124 265 µcd/dot Peak Wavelength λPEAK 630 nm Dominant Wavelength λD 626 nm Green SCD5583 Description Symbol Min. Typ. Units Luminous Intensity IV 124 221 µcd/dot Peak Wavelength λPEAK 565 nm Dominant Wavelength λD 569 nm High Efficiency Green SCD5584 Description Symbol Min. Typ. Units Luminous Intensity IV 124 505 µcd/dot Peak Wavelength λPEAK 568 nm Dominant Wavelength λD 572 nm Notes: 1. Dot to dot intensity matching at 100% brightness is 1.8:1. 2. Displays are binned for hue at 2 nm intervals. 3. Displays within a given intensity category have an intensity matching of 1.5:1 (max.). SCD5580/5581/5582/5583/5584 2–4 Figure 5. Top view Pin Definitions 28 15 1 Character 0 14 Character 7 Pin Assignments Pin Function Definition 1 SDCLK Loads data into the 8-bit serial data register on a low to high transition. 2 LOAD Low input enables data clocking into 8-bit serial shift register. When LOAD goes high, the contents of 8-bit serial Shift Register will be decoded. 3 NC No connection 4 NC No connection 5 NC No connection 6 VCC Power supply/heat sink 7 NP No pin Pin Function Pin Function 1 SDCLK 28 GND 8 NP No pin 2 LOAD 27 DATA 9 VCC Power supply/heat sink 3 NC 26 NC 10 NC No connection 4 NC 25 NC 11 NC No connection 5 NC 24 NC 12 NC No connection 6 VCC 23 VCC 7 NP 22 NP 13 RST 8 NP 21 NP Asynchronous input, when low will clear the Multiplex Counter, User RAM and Data Register. Control Word Register is set to 100% brightness and the Address Register is set to select Digit 0. The display is blanked. 9 VCC 20 VCC 14 GND Power supply ground 10 NC 19 VCC 11 NC 18 NC 15 CLK I/O Outputs master clock or inputs external clock. 12 NC 17 NC 16 CLKSEL H=internal clock, L=external clock 13 RST 16 CLKSEL 17 NC No connection 14 GND 15 CLK I/O 18 NC No connection 19 VCC Power supply/heat sink 20 VCC Power supply/heat sink 21 NP No pin 22 NP No pin 23 VCC Power supply/heat sink 24 NC No connection 25 NC No connection 26 NC No connection 27 DATA Serial data input 28 GND Power supply ground Figure 6. Display column and row format Row 1 Row 2 Row 3 Row 4 C 0 1 0 0 0 C 1 1 0 0 0 C 2 1 1 1 1 C 3 1 0 0 0 C 4 1 0 0 0 1=Display Dot “on” 2=Display Dot “off” Column Data Ranges Row 0 00H to 1FH Row 1 20H to 3FH R0w 2 40H to 5FH Row 3 60H to 7FH Row 4 80H to 9FH Figure 7. Dot matrix format 0.033 (0.84) typ. 0.100 (2.54) C0 C1 C2 C3 C4 R0 R1 R2 0.145 (3.68) R3 0.011 (0.28) typ. R4 0.022 (0.56) typ. Dimensions in inches (mm) TOLERANCE: .XXX=±.010 (.25) SCD5580/5581/5582/5583/5584 2–5 Operation of the SCD558X The SCD558X requires only 4 lines as compared to 15 for an equivalent 8 character parallel input part. The SCD558X display consists of a CMOS IC containing control logic and drivers for eight 5x5 characters. These components are assembled in a compact (38 mm x 10 mm) plastic package. The on-board CMOS IC is the electronic heart of the display. The IC accepts decoded serial data, which is stored in the internal RAM . Asynchronously the RAM is read by the character multiplexer at a strobe rate that results in a flicker free display. Figure 8 shows the three functional areas of the IC. These include: the input serial data register and control logic, a 200 bits two port RAM, and an internal multiplexer/ display driver. Individual LED dot addressablity allows the user great freedom in creating special characters or mini-icons. The User Definable Character Set Examples illustrate 200 different character and symbol possibilities. The use of a serial data interface provides a highly efficient interconnection between the display and the mother board. Figure 8. SCD558X block diagram 8 - 5X5 Characters 10 0 — Row Decoder & Driver 1 2 3 4 5 6 7 — 20 Column Logic & Driver Mux CLK I/O Mux Clock SEL Counter Chain & Timing Logic Brightness & Lamp Test RESET Oscillator Power Down Display Multiplexer Serial Data —3 —5 OPCODE Decode Character Address Register Control Word Address Register 5 — Load 5 D4 D3 D2 D1 D0 DATA — D7 D6 D5 OPCODE WRITE Character/ Row Address Decode RAM 200 Bits WRITE 40 X 5 READ 10 X 20 Column Output 4 — Serial Data Clock Software Clear SCD5580/5581/5582/5583/5584 2–6 Row Address Register bits, D7–D5 (Table 3), direct the Column Data bits, D4–D0 (Table 3) to specific RAM location. Table 1 shows the Row Address for the example character “D.” Column data is written and read asynchronously from the 200 bit RAM. Once loaded the internal oscillator and character multiplexer reads the data from the RAM. These characters are row strobed with column data as shown in Figures 8 and 9. The character strobe rate is determined by the internal or user supplied external MUX Clock and the IC’s ÷ 320 counter. The following explains how to format the serial data to be loaded into the display. The user supplies a string of bit mapped decoded characters. The contents of this string is shown in Figure 9a. Figure 9b shows that each character consist of six 8 bit words. The first word encodes the display character location and the succeeding five bytes are row data. The row data represents the status (On, Off) of individual column LEDs. Figure 9c shows that each that each 8 bit word is formatted to include a three bit Operational Code (OPCODE) defined by bits D7–D5 and five bits (D4–D0) representing Column Data, Character Address, or Control Word Data. Table 1. Character “D” Figure 9d shows the sequence for loading the bytes of data. Bringing the LOAD line low enables the serial register to accept data. The shift action occurs on the low to high transition of the serial data clock (SDCLK). The least significant bit (D0) is loaded first. After eight clock pulses the LOAD line is brought high. With this transition the OPCODE is decoded. The decoded OPCODE directs D4-D0 to be latched in the Character Address register, stored in the RAM as Column data, or latched in the Control Word register. The control IC requires a minimum 600 ns delay between successive byte loads. As indicated in Figure 9a, a total of 528 bits of data are required to load all eight characters into the display. Opcode Column Data HEX D7 D6 D5 D4 D3 D2 D1 D0 Row 0 0 0 0 1 1 1 1 0 1E Row 1 0 0 1 1 0 0 0 1 31 Row 2 0 1 0 1 0 0 0 1 51 Row 3 0 1 1 1 0 0 0 1 71 Row 4 1 0 0 1 1 1 1 0 9E Figure 9a–d. Loading serial character data Example: Serial Clock = 5 MHz, Clock Period = 200 ns 528 Clock Cycles, 105.6 µs a. Character 0 Character 1 Character 2 Character 3 Character 4 Character 5 Character 6 Character 7 66 Clock Cycles, 13.2 µs b. Character 0 Address Row 0 Column Data Row 1 Column Data Row 2 Column Data Row 4 Column Data 11 Clock Cycles, 2.2 µs 11 Clock Cycles, 2.2 µs c. Row 3 Column Data Column Data Character Address Time OPCODE Time OPCODE Between D0 D1 D2 D3 D4 D5 D6 D7 Between D0 D1 D2 D3 D4 D5 D6 D7 Loads Loads 0 0 0 0 0 1 0 0 600 ns(min.) C4 C3 C2 C1 C0 600 ns(min.) LOAD Serial Clock d. Clock Period DATA D0 D1 D2 D3 D4 D5 D6 D7 Time between LOADS t0 SCD5580/5581/5582/5583/5584 2–7 The user can activate four Control functions. These include: LED Brightness Level, Lamp Test, IC Power Down, or Display Clear. OPCODEs and five bit words are used to initiate these functions. The OPCODEs and Control Words for the Character Address and Loading Column Data are shown in Tables 2 and 3. The user can select seven specific LED brightness levels, Table 4. These brightness levels (in percentages of full brightness of the display) include: 100% (F0HEX), 53% (F1HEX), 40% (F2HEX ), 27% (F3HEX ), 20% (F4HEX ), 13% (F5HEX), and 6.6% (F6HEX ). The brightness levels are controlled by changing the duty factor of the row strobe pulse. Table 2. Load character address Table 4. Display brightness Opcode Character Address Opcode Operation Load D7 D6 D5 D4 D3 D2 D1 D0 Control Word D7 D6 D5 D4 D3 D2 D1 D0 Hex Operation Level 1 0 1 0 0 0 0 0 A0 Character 0 1 1 1 1 0 0 0 0 F0 100% 1 0 1 0 0 0 0 1 A1 Character 1 1 1 1 1 0 0 0 1 F1 53% 1 0 1 0 0 0 1 0 A2 Character 2 1 1 1 1 0 0 1 0 F2 40% 1 0 1 0 0 0 1 1 A3 Character 3 1 1 1 1 0 0 1 1 F3 27% 1 0 1 0 0 1 0 0 A4 Character 4 1 1 1 1 0 1 0 0 A4 20% 1 0 1 0 0 1 0 1 A5 Character 5 1 1 1 1 0 1 0 1 F5 13% 1 0 1 0 0 1 1 0 A6 Character 6 1 1 1 1 0 1 1 0 F6 6.6% 1 0 1 0 0 1 1 1 A7 Character 7 The SCD558X offers a unique Display Power Down feature which reduces ICC to less than 50 µA. When FFHEX is loaded, as shown in Table 5, the display is set to 0% brightness and the internal multiplex clock is stopped. When in the Power Down mode data may still be written into the RAM. The display is reactivated by loading a new Brightness Level Control Word into the display. Table 3. Load column data Opcode Column Data Operation Load D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 C0 C1 C2 C3 C4 Row 0 0 0 1 C0 C1 C2 C3 C4 Row 1 0 1 0 C0 C1 C2 C3 C4 Row 2 0 1 1 C0 C1 C2 C3 C4 Row 3 1 0 0 C0 C1 C2 C3 C4 Row 4 Table 5. Power down Opcode Control Word Hex Operation D7 D6 D5 D4 D3 D2 D1 D0 1 1 1 1 1 1 1 1 FF 0% brightness Figure 10. Row and column location Row 0 off LED Row 1 on LED Row 2 Previously “on” LED The Lamp Test is enabled by loading F8HEX, Table 6, into the serial shift register. This Control Word sets all of the LEDs to a 53% brightness level. Operation of the Lamp Test has no affect on the RAM and is cleared by loading a Brightness Control Word. Row 3 Row 4 0 1 2 3 4 Columns Figure 11. Row strobing ROW LOAD LOAD ROW 0 LOAD ROW 1 LOAD ROW 2 LOAD ROW 3 LOAD ROW 4 Row 0 Row 0 Row 0 Row 0 Row 0 Row 1 Row 1 Row 1 Row 1 Row 1 Row 2 Row 2 Row 2 Row 2 Row 2 Row 3 Row 3 Row 3 Row 3 Row 3 Row 4 Row 4 0 1 2 3 4 Columns Row 4 0 1 2 3 4 Columns Row 4 0 1 2 3 4 Columns Row 4 0 1 2 3 4 Columns 0 1 2 3 4 Columns SCD5580/5581/5582/5583/5584 2–8 perature of 85°C. Approximately 60% of this power is dissipated by the IC to the PC board via the VCC connection (pins 6, 9, 20, 23). Optimum thermal reliability is obtained by connecting all of the VCC pins to a common pad located on both sides of the PC board. This technique offers a low thermal resistance for IC to system ambient. Table 6. Lamp test Opcode Control Word Hex Operation D7 D6 D5 D4 D3 D2 D1 D0 1 1 1 1 0 B B B Lamp Test (OFF) 0 Lamp Test (ON) 1 1 1 1 1 0 0 F8 ESD Protection The input protection structure of the SCD5580/1/2/3/4 provides significant protection against ESD damage. It is capable of withstanding discharges greater than 2 KV. Take all the standard precautions, normal for CMOS components. These include properly grounding personnel, tools, tables, and transport carriers that come in contact with unshielded parts. If these conditions are not, or cannot be met, keep the leads of the device shorted together or the parts in anti-static packaging. Table 7. Software clear Opcode Control Word Hex Operation D7 D6 D5 D4 D3 D2 D1 D0 1 1 0 0 0 0 0 0 C0 CLEAR Soldering Considerations Multiplexer and Display Driver THE SCD5580/1/2/3/4 can be hand soldered with SN63 solder using a grounded iron set to 260°C. The eight characters are row multiplexed with RAM resident column data. The strobe rate is established by the internal or external MUX Clock rate. The MUX Clock frequency is divided by a 320 counter chain. This results in a typical strobe rate of 750Hz. By pulling the Clock SEL line low, the display can be operated from an external MUX Clock. The external clock is attached to the CLK I/O connection (pin 15). The maximum external MUX Clock frequency should be limited to 1 MHz. Wave soldering is also possible following these conditions: Preheat that does not exceed 93°C on the solder side of the PC board or a package surface temperature of 85°C. Water soluble organic acid flux (except carboxylic acid) or resinbased RMA flux without alcohol can be used. Wave temperature of 245°C ± 5°C with a dwell between 1.5 sec. to 3.0 sec. Exposure to the wave should not exceed temperatures above 260°C for five seconds at 0.063" below the seating plane. The packages should not be immersed in the wave. An asynchronous hardware Reset (pin 13) is also provided. Bringing this pin low will clear the Character Address Register, Control Word Register, RAM, and blanks the display. This action leaves the display set at Character Address 0, and the Brightness Level set at 100%. Post Solder Cleaning Procedures The least offensive cleaning solution is hot D.I. water (60°C) for less than 15 minutes. Addition of mild saponifiers is acceptable. Do not use commercial dishwasher detergents. Electrical & Mechanical Considerations Interconnect Considerations For faster cleaning, solvents may be used. Exercise care in choosing solvents as some may chemically attack the nylon package. Maximum exposure should not exceed two minutes at elevated temperatures. Acceptable solvents are TF (trichorotrifluorethane), TA, 111 Trichloroethane, and unheated acetone.(1) Optimum product performance can be had when the following electrical and mechanical recommendations are adopted. The SCD558X’s IC is constructed in a high speed CMOS process, consequently high speed noise on the SERIAL DATA, SERIAL DATA CLOCK, LOAD and RESET lines may cause incorrect data to be written into the serial shift register. Adhere to transmission line termination procedures when using fast line drivers and long cables (>10 cm). Note: 1.Acceptable commercial solvents are: Basic TF, Arklone, P. Genesolv, D. Genesolv DA, Blaco-Tron TF, Blaco-Tron TA, and Freon TA. Unacceptable solvents contain alcohol, methanol, methylene chloride, ethanol, TP35, TCM, TMC, TMS+, TE, or TES. Since many commercial mixtures exist, contact a solvent vendor for chemical composition information. Some major solvent manufacturers are: Allied Chemical Corporation, Specialty Chemical Division, Morristown, NJ; Baron-Blakeslee, Chicago, IL; Dow Chemical, Midland, MI; E.I. DuPont de Nemours & Co., Wilmington, DE. Good digital grounds (pins 14, 28) and power supply decoupling (pins 6, 9, 20, 23) will insure that ICC (<400 mA peak) switching currents do not generate localized ground bounce. Therefore it is recommended that each display package use a 0.1 µF and 20 µF capacitor between VCC and ground. When the internal MUX Clock is being used connect the CLKSEL pin to VCC. In those applications where RESET will not be connected to the system’s reset control, it is recommended that this pin be connected to the center node of a series 0.1, µF and 100 KΩ RC network. Thus upon initial power up the RESET will be held low for 10 ms allowing adequate time for the system power supply to stabilize. For further information refer to Appnotes 18 and 19 in the current Siemens Optoelectronic Data Book. An alternative to soldering and cleaning the display modules is to use sockets. Naturally, 28 pin DIP sockets .300" wide with .100" centers work well for single displays. Multiple display assemblies are best handled by longer SIP sockets or DIP sockets when available for uniform package alignment. The SCD558X allows up to 1.7 W of power dissipation at 70° and 1.29 W power dissipation at a maximum operating tem- SCD5580/5581/5582/5583/5584 2–9 Socket manufacturers are Aries Electronics, Inc., Frenchtown, NJ; Garry Manufacturing, New Brunswick, NJ; Robinson-Nugent, New Albany, IN; and Samtec Electronic Hardward, New Albany, IN. For further information refer to Appnote 22 in the current Siemens Optoelectronic Data Book. Optical Considerations The 0.145" high character of the SCD558X gives readability up to eight feet. Proper filter selection enhances readability over this distance. Using filters emphasizes the contrast ratio between a lit LED and the character background. This will increase the discrimination of different characters. The only limitation is cost. Take into consideration the ambient lighting environment for the best cost/benefit ratio for filters. Incandescent (with almost no green) or fluorescent (with almost no red) lights do not have the flat spectral response of sunlight. Plastic band-pass filters are an inexpensive and effective way to strengthen contrast ratios. The SCD5580/2 are red/high efficiency red displays and should be matched with long wavelength pass filter in the 570 nm to 590 nm range. The SCD5583/4 should be matched with a yellowgreen band-pass filter that peaks at 565 nm. For displays of multiple colors, neutral density grey filters offer the best compromise. Additional contrast enhancement is gained by shading the displays. Plastic band-pass filters with built-in louvers offer the next step up in contrast improvement. Plastic filters can be improved further with anti-reflective coatings to reduce glare. The trade-off is fuzzy characters. Mounting the filters close to the display reduces this effect. Take care not to overheat the plastic filter by allowing for proper air flow. Optimal filter enhancements are gained by using circular polarized, anti-reflective, band-pass filters. The circular polarizing further enhances contrast by reducing the light that travels through the filter and reflects back off the display to less than 1%. Several filter manufacturers supply quality filter materials. Some of them are: Panelgraphic Corporation, W. Caldwell, NJ; SGL Homalite, Wilmington, DE; 3M Company, Visual Products Division, St. Paul, MN; Polaroid Corporation, Polarizer Division, Cambridge, MA; Marks Polarized Corporation, Deer Park, NY, Hoya Optics, Inc., Fremont, CA. One last note on mounting filters: recessing displays and bezel assemblies is an inexpensive way to provide a shading effect in overhead lighting situations. Several Bezel manufacturers are: R.M.F. Products, Batavia, IL; Nobex Components, Griffith Plastic Corp., Burlingame, CA; Photo Chemical Products of California, Santa Monica, CA; I.E.E.–Atlas, Van Nuys, CA. Microprocessor Interface The microprocessor interface is through the serial port, SPI port or one out of eight data bits on the eight bit parallel port and also control lines SDCLK and LOAD. Power Up Sequence Upon power up display will come on at random. Thus the display should be reset at power-up. The reset will set the Address Register to Digit 0, User RAM is set to 0 (display blank) the Control Word is set to 0 (100% brightness with Lamp Test off) and the internal counters are reset. Figure 12. SCD Interface to Siemens/Intel 8031 Microprocessor (using serial port in mode 0) VCC 28 VCC 27 DATA VCC 40 XTAL2 RXD 10 TXD 11 20 19 16 15 28 SCD MASTER SD CLK LOAD 1 2 18 23 6 9 13 14 27 DATA 23 15 SCD SLAVE SD CLK LOAD 1 2 2019 16 6 9 13 14 + 22 µF TAN .01 µF VCC 19 XTAL1 U1 8031 P3.7 17 9 RST P3.3 13 P3.4 14 SCD5580/5581/5582/5583/5584 2–10 Figure 13. SCD558X Interface with Intel/Siemens 8031 Microprocessor (using one bit of parallel port as serial input) VCC 28 27 DATA 1 2 6 40 P3.0 10 18 XTAL2 P3.1 11 P3.6 16 P0.0 20 19 16 15 28 SCD MASTER SD CLK LOAD VCC 19 XTAL1 23 9 27 DATA 23 1 2 + SCD SLAVE SD CLK LOAD 13 14 20 19 16 15 6 9 13 14 .01 µF 22 µF TAN VCC 39 U1 8031 VCC 1 RST 9 P1.0 20 Figure 14. SCD558X Interface with Motorola 68HC05C4 Microprocessor (using SPI Port) VCC 28 27 DATA 23 1 2 38 40 OSC1 39 OSC2 PA0 PA1 SCLK MOSI 11 10 33 32 15 28 SCD MASTER SD CLK LOAD VCC 20 19 16 6 9 13 14 VCC 27 DATA 23 15 + SCD SLAVE SD CLK LOAD 1 2 20 19 16 6 9 13 14 22 µF Tan .01 µF U1 68HC05C4 VCC 1 RST 9 PA2 20 SCD5580/5581/5582/5583/5584 2–11 Cascading Multiple Displays Multiple displays can be cascaded using the CLK SEL and CLK I/O pins as shown below. The display designated as the Master Clock source should have its CLK SEL pin tied high and the slaves should have their CLK SEL pins tied low. All CLK I/O pins should be tied together. One display CLK I/O can drive 15 slave CLK I/Os. Use RST to synchronize all display counters. Figure 15. Cascading multiple displays RST VCC RST CLK I/O CLK SEL Intelligent Display DATA SDCLK LOAD 14 more displays in between RST CLK I/O CLK SEL Intelligent Display DATA SDCLK LOAD DATA SDCLK A0 A1 A2 A3 0 Chip Address Decoder 15 LD CE Address Decode 1–14 Loading Data Into the Display Use following procedure to load data into the display: 1. Power up the display. 2. Bring RST low (600 ns duration minimum) to clear the Multiplex Counter, Address Register, Control Word Register, User Ram and Data Register. The display will be blank. Display brightness is set to 100%. 3. If a different brightness is desired, load the proper brightness opcode into the Control Word Register. 4. Load the Digit Address into the display. 5. Load display row and column data for the selected digit. 6. Repeat steps 4 and 5 for all digits. Data contents for the word “Displays” Step D7 D6 D5 D4 D3 D2 D1 D0 Function A 1 1 0 0 0 0 0 0 CLEAR B (optional) 1 1 1 1 0 B B B BRIGHTNESS SELECT 1 1 0 1 0 0 0 0 0 DIGIT D0 SELECT 2 0 0 0 1 1 1 1 0 ROW 0 D0 (D) 3 0 0 1 1 0 0 0 1 ROW 1 D0 (D) 4 0 1 0 1 0 0 0 1 ROW 2 D0 (D) 5 0 1 1 1 0 0 0 1 ROW 3 D0 (D) 6 1 0 0 1 1 1 1 0 ROW 4 D0 (D) 7 1 0 1 0 0 0 0 1 DIGIT D1 SELECT 8 0 0 0 0 1 1 1 0 ROW 0 D0 (I) 9 0 0 1 0 0 1 0 0 ROW 1 D0 (I) 10 0 1 0 0 0 1 0 0 ROW 2 D0 (I) 11 0 1 1 0 0 1 0 0 ROW 3 D0 (I) 12 1 0 0 0 1 1 1 0 ROW 4 D0 (I) SCD5580/5581/5582/5583/5584 2–12 Data contents for the word “Displays” (continued) Step D7 D6 D5 D4 D3 D2 D1 D0 Function 13 1 0 1 0 0 0 1 0 DIGIT D2 SELECT 14 0 0 0 0 1 1 1 1 ROW 0 D2 (S) 15 0 0 1 1 0 0 0 0 ROW 1 D2 (S) 16 0 1 0 0 1 1 1 0 ROW 2 D2 (S) 17 0 1 1 0 0 0 0 1 ROW 3 D2 (S) 18 1 0 0 1 1 1 1 0 ROW 4 D2 (S) 19 1 0 1 0 0 0 1 1 DIGIT D3 SELECT 20 0 0 0 1 1 1 1 0 ROW 0 D3 (P) 21 0 0 1 1 0 0 0 1 ROW 1 D3 (P) 22 0 1 0 1 1 1 1 0 ROW 2 D3 (P) 23 0 1 1 1 0 0 0 0 ROW 3 D3 (P) 24 1 0 0 1 0 0 0 0 ROW 4 D3 (P) 25 1 0 1 0 0 1 0 0 DIGIT D4 SELECT 26 0 0 0 1 0 0 0 0 ROW 0 D4 (L) 27 0 0 1 1 0 0 0 0 ROW 1 D4 (L) 28 0 1 0 1 0 0 0 0 ROW 2 D4 (L) 29 0 1 1 1 0 0 0 0 ROW 3 D4 (L) 30 1 0 0 1 1 1 1 1 ROW 4 D4 (L) 31 1 0 1 0 0 1 0 1 DIGIT D5 SELECT 32 0 0 0 0 0 1 0 0 ROW 0 D5 (A) 33 0 0 1 0 1 0 1 0 ROW 1 D5 (A) 34 0 1 0 1 1 1 1 1 ROW 2 D5 (A) 35 0 1 1 1 0 0 0 1 ROW 3 D5 (A) 36 1 0 0 1 0 0 0 1 ROW 4 D5 (A) 37 1 0 1 0 0 1 1 0 DIGIT D6 SELECT 38 0 0 0 1 0 0 0 1 ROW 0 D6 (Y) 39 0 0 1 0 1 0 1 0 ROW 1 D6 (Y) 40 0 1 0 0 0 1 0 0 ROW 2 D6 (Y) 41 0 1 1 0 0 1 0 0 ROW 3 D6 (Y) 42 1 0 0 0 0 1 0 0 ROW 4 D6 (Y) 43 1 0 1 0 0 1 1 1 DIGIT D7 SELECT 44 0 0 0 0 1 1 1 1 ROW 0 D7 (S) 45 0 0 1 1 0 0 0 0 ROW 1 D7 (S) 46 0 1 0 0 1 1 1 0 ROW 2 D7 (S) 47 0 1 1 0 0 0 0 1 ROW 3 D7 (S) 48 1 0 0 1 1 1 1 0 ROW 4 D7 (S) Note: If the display is already reset at Power Up, there is no need for Software Clear. SCD5580/5581/5582/5583/5584 2–13 User Definable Character Set Examples* Upper and Lower Case Alphabets HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE 04 2A 5F 71 91 1E 29 4E 69 9E 0F 30 50 70 8F 1E 29 49 69 9E 1F 30 5E 70 9F 1F 30 5E 70 90 0F 30 53 71 8F 11 31 5F 71 91 0E 24 44 64 8E 01 21 41 71 8E 13 34 58 74 93 10 30 50 70 9F 11 3B 55 71 91 11 39 55 73 91 0E 31 51 71 8E 1E 31 5E 70 90 0C 32 56 72 8D 1E 31 5E 74 92 0F 30 4E 61 9E 1F 24 44 64 84 11 31 51 71 8E 11 31 51 6A 84 11 31 55 7B 91 11 2A 44 6A 91 11 2A 44 64 84 1F 22 44 68 9F 00 2E 52 72 8D 10 30 5E 71 9E 00 2F 50 70 8F 01 21 4F 71 8F 00 2E 5F 70 8E 04 2A 48 7C 88 00 2F 50 73 8F 10 30 56 79 91 04 20 4C 64 8E 00 26 42 72 8C 10 30 56 78 96 0C 24 44 64 8E 00 2A 55 71 91 00 36 59 71 91 00 2E 51 71 8E 00 3E 51 7E 90 00 2F 51 6F 81 00 33 54 78 90 00 23 44 62 8C 08 3C 48 6A 84 00 32 52 72 8D 00 31 51 6A 84 00 31 55 7B 91 00 32 4C 6C 92 00 31 4A 64 98 00 3E 44 68 9E DOT ON = 1 DOT OFF = 0 Numerals and Punctuation HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE 0E 33 55 79 8E 04 2C 44 64 8E 1E 21 46 68 9F 1E 21 4E 61 9E 06 2A 5F 62 82 1F 30 5E 61 9E 06 28 5E 71 8E 1F 22 44 68 88 0E 31 4E 71 8E 0E 31 4F 62 8C 0A 3F 4A 7F 8A 0F 34 4E 65 9E 06 29 5C 68 9F 19 3A 44 6B 93 08 34 4D 72 8D 0C 2C 44 68 80 02 24 44 64 82 08 24 44 64 88 0C 2C 48 64 80 04 24 5F 64 84 00 2C 4C 64 88 00 20 5F 60 80 00 20 40 6C 8C 01 22 44 68 90 04 24 44 60 84 0A 2A 40 60 80 07 24 44 64 87 10 28 44 62 81 1C 24 44 64 9C 0E 35 57 70 8E 00 20 40 60 9F 0C 2C 40 6C 8C 0C 20 4C 64 88 02 24 48 64 82 00 3F 40 7F 80 08 24 42 64 88 0E 31 42 64 88 06 24 48 64 86 0C 24 42 64 8C 04 24 40 64 84 11 2A 44 6E 84 15 2E 5F 6E 95 04 2A 51 60 80 08 35 42 60 80 DOT ON = 1 DOT OFF = 0 SCD5580/5581/5582/5583/5584 2–14 User Definable Character Set Examples* (continued) Scientific Notations, etc. HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE 06 2E 5E 6E 86 04 24 48 71 8E 1F 20 59 75 93 1F 20 56 79 91 0E 20 4A 64 8A 0D 32 52 72 8D 0C 32 56 71 96 0E 24 4E 71 8E 00 24 4A 71 9F 10 3C 52 72 81 0E 31 5F 71 8E 10 28 44 6A 91 09 29 49 6E 90 01 2E 54 64 84 04 2E 55 6E 84 0E 31 51 6A 9B 01 2E 5A 6A 8A 0F 32 52 72 8C 1F 28 44 68 9F 18 24 48 7C 80 1C 28 44 78 80 12 36 5A 67 80 06 21 5A 67 80 07 22 59 66 80 1C 34 5C 60 80 0F 28 48 78 88 04 2E 5F 6E 80 00 24 4E 7F 8E 00 2E 5F 6E 84 0E 3F 4E 64 80 04 3E 5F 7E 84 04 2F 5F 6F 84 0E 2E 4E 6E 8E 00 3F 5F 7F 80 04 2E 55 64 84 04 24 55 6E 84 04 22 5F 62 84 04 28 5F 68 84 1F 31 51 71 9F 08 2C 4A 78 98 0A 35 4A 75 8A 15 2A 55 6A 95 1F 35 5F 75 9F 00 3F 5F 7C 80 0E 3F 5B 7F 8E 00 27 4F 78 9C 00 3C 5F 63 87 00 20 40 60 83 00 20 40 67 9F 00 23 5F 7F 9F 0C 3C 5C 7C 9C 15 2E 44 64 84 DOT ON = 1 DOT OFF = 0 Foreign Characters HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE 1F 21 5F 62 84 1F 21 46 64 88 01 22 46 6A 82 04 3F 51 61 86 00 3F 44 64 9F 02 3F 46 6A 92 08 3F 49 6A 88 1F 21 45 67 8C 02 3F 51 62 8C 08 3F 49 69 92 04 3F 44 7F 84 0F 29 51 62 8C 08 2F 52 62 82 0F 21 41 61 9F 0A 3F 4A 62 8C 19 21 59 62 9C 0F 29 55 63 8C 01 3E 42 7F 86 15 35 55 62 8C 0E 20 5F 64 98 08 28 4C 6A 88 04 3F 44 64 98 0E 20 40 60 9F 1F 21 4A 64 9A 04 3E 44 6E 95 04 24 44 68 90 04 22 51 71 91 10 3F 50 70 8F 1F 21 41 62 8C 0E 20 4E 60 8F 04 28 51 7F 81 01 21 4A 64 8A 1F 28 5F 68 87 1E 22 42 62 9F 1F 21 5F 61 9F 0E 20 5F 61 8E 12 32 52 64 88 04 34 54 75 96 1E 25 4F 74 8F 0F 34 5F 74 97 0F 30 4F 64 98 0F 33 55 79 9E 0F 34 57 74 8F 00 2A 5F 74 8B 08 24 4E 72 8F 0A 2E 51 7F 91 02 24 4C 64 8E 04 2A 4E 71 8E 0A 34 52 7A 96 08 24 51 71 8E 02 24 51 71 8E 04 2A 51 71 8E DOT ON = 1 DOT OFF = 0 *CAUTION: No more than 128 LEDs “on” at one time at 100% brightness. SCD5580/5581/5582/5583/5584 2–15