Si4012 Si4012 C RYSTAL - LESS R F T RANSMITTER Features Frequency range 27–960 MHz Output Power Range –13 to +10 dBm Low Power Consumption OOK 14.2 mA @ +10 dBm FSK 19.8 mA @ +10 dBm Data Rate = 0 to 100 kbaud FSK FSK and OOK modulation Power Supply = 1.8 to 3.6 V Crystal-less operation ±150 ppm: 0 to 20° C ±250 ppm: –40 to 85° C Optional crystal input for higher tolerances Low power shutdown mode Integrated voltage regulator 256 byte FIFO Low battery detector SMBus Interface –40 to +85 °C temperature range 10-Pin MSOP Package, Pb-free RoHs compliant Low BOM Ordering Information: See page 53. Pin Assignments Si4012 Applications Wireless MBus T1-mode Remote control Home security & alarm Personal data logging Toy control Wireless PC peripherals Remote meter reading Remote keyless entry Home automation Industrial control Sensor networks Health monitors GPIO0/XTAL 1 10 SDA GND 2 9 SCL TXM 3 Description Silicon Laboratories’ Si4012 is a fully integrated crystal-less CMOS high-data rate RF transmitter designed for the sub-GHz ISM band. This chip is optimized for battery powered applications requiring low standby currents and high output transmit power. The device offers advanced radio features including continuous frequency coverage from 27–960 MHz, adjustable output power of up to +10 dBm, and data rates up to 100 kbaud in FSK mode. The Si4012’s high level of integration offers reduced BOM cost while simplifying the overall system design. Si4012 8 SDN TXP 4 7 nIRQ VDD 5 6 LED Patents pending Functional Block Diagram Si4012 DIGITAL LOGIC SDA SCL SMBus INTERFACE RF ANALOG CORE ANTENNA TUNE OOK MODULATOR TX 256 BYTE DATA FIFO LED GPIO0/XTAL PA AUTO TUNE TXP TXM LCOSC LPOSC VA DIGITAL CONTROLLER SLP TMR REGISTER BANK Rev 0.1 7/10 DIVIDER FSK SDN nIRQ XTAL OSC VD LDO POR BANDGAP VDD GND BATTERY MONITOR Copyright © 2010 by Silicon Laboratories Si4012 This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Si4012 2 Rev 0.1 Si4012 TABLE O F C ONTENTS Section Page 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 1.1. Definition of Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3. Pin Descriptions: Si4012 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 4. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5. Package Outline: Si4012 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 6. PCB Land Pattern: Si4012 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Rev 0.1 3 Si4012 1. Electrical Specifications Table 1. DC Characteristics1 Parameter Symbol Supply Voltage Range VDD Power Saving Modes IShutdown Conditions Min Typ Max Units 1.8 — 3.6 V Lowest current mode — 100 — nA IIdle Register values retained, lowest current consumption idle mode — 700 — nA TUNE Mode Current ITune Register values retained, LCOSC on fastest response to TX mode — 5 — mA TX Mode Current @ 10 dBm ITX_OOK OOK, Manchester encoded — 14.2 — mA ITX_FSK FSK — 19.8 — mA Notes: 1. All specification guaranteed by production test unless otherwise noted. Production test conditions and max limits are listed in the "Production Test Conditions" section on page 9. 2. Guaranteed by qualification. Qualification test conditions are listed in the "Production Test Conditions" section on page 9. Table 2. Absolute Maximum Ratings1,2 Parameter Symbol Value Unit VDD –0.5 to 3.9 V 3 Input Current IIN 10 mA Input Voltage4 VIN –0.3 to (VDD + 0.3) V Junction Temperature TOP –40 to 90 C Storage Temperature TSTG –55 to 125 C Supply Voltage Notes: 1. Permanent device damage may occur if the absolute maximum ratings are exceeded. Functional operation should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure beyond recommended operating conditions for extended periods may affect device reliability. 2. Handling and assembly of these devices should only be done at ESD-protected workstations. 3. All input pins besides VDD. 4. For GPIO pins configured as inputs. 4 Rev 0.1 Si4012 Table 3. Si4012 RF Transmitter Characteristics (TA = 25° C, VDD = 3.3 V, RL = 550 , unless otherwise noted) Parameter Frequency Range1 Frequency Noise (rms)2 Phase Noise @ 915 MHz Symbol Test Condition FRF Max Unit 27 — 960 MHz — 0.3 — ppm 10 kHz offset — –70 — dBc/Hz 100 kHz offset — –100 — dBc/Hz 1 MHz offset Carrier Frequency Accuracy Typ Allen deviation, measured across 1 ms interval Frequency Tuning Time Selected Frequencies in Range of 27–960 MHz Min Discrete frequencies — –105 — dBc/Hz — 5 — ms — 315 — MHz — 390 — MHz — 433.92 — MHz — 868 — MHz — 915 — MHz +150 ppm 0°C ≤ TA ≤ 70° C –150 –40°C ≤ TA ≤ 85° C –250 +250 ppm FRF = 100 MHz 0°C ≤ TA ≤ 70° C –15 — 15 kHz FRF = 100 MHz –40°C ≤ TA ≤ 85° C –25 — 25 kHz FRF = 315 MHz 0°C ≤ TA ≤ 70° C –47.3 — 47.3 kHz FRF = 315 MHz –40°C ≤ TA ≤ 85° C –78.8 — 78.8 kHz FRF = 433.92 MHz 0°C ≤ TA ≤ 70° C –65.1 — 65.1 kHz FRF = 433.92 MHz –40°C ≤ TA ≤ 85° C –108 — 108 kHz FRF = 868 MHz 0°C ≤ TA ≤ 70° C –130 — 130 kHz FRF = 868 MHz –40°C ≤ TA ≤ 85° C –217 — 217 kHz FRF = 915 MHz 0°C ≤ TA ≤ 70° C –137 — 137 kHz FRF = 915 MHz –40°C ≤ TA ≤ 85° C –229 — 229 kHz –10 — +10 ppm Frequency Error Contribution with External Crystal Notes: 1. The frequency range is continuous over the specified range. 2. The frequency step size is limited by the frequency noise. 3. Optimum differential load is equal to 4 V/(11.5mA/2 * 4/PI) = 550 Therefore the antenna load resistance in parallel with the Si4012 differential output resistance should equal 600 Rev 0.1 5 Si4012 Table 3. Si4012 RF Transmitter Characteristics (Continued) (TA = 25° C, VDD = 3.3 V, RL = 550 , unless otherwise noted) Parameter Transmit Power Symbol 3 PA Edge Ramp Rate Programmable Range Data Rate Test Condition Min Typ Max Unit Maximum programmed Tx power, with optimum differential load, VDD > 2.2 V — 10 — dBm Minimum programmed TX power, with optimum differential load, VDD > 2.2 V — –13 — dBm Power variation vs temp and supply, with optimum differential load, VDD > 2.2 V –1.0 — 0.5 dB Power variation vs temp and supply, with optimum differential load, VDD > 1.8 V –2.5 — 0.5 dB Transmit power step size from –13 to 6.5 dBm — 0.25 — dB OOK mode 0.34 — 10.7 us OOK 0.1 — 50 kbaud FSK 0.1 — 100 kbaud Notes: 1. The frequency range is continuous over the specified range. 2. The frequency step size is limited by the frequency noise. 3. Optimum differential load is equal to 4 V/(11.5mA/2 * 4/PI) = 550 Therefore the antenna load resistance in parallel with the Si4012 differential output resistance should equal 600 6 Rev 0.1 Si4012 Table 3. Si4012 RF Transmitter Characteristics (Continued) (TA = 25° C, VDD = 3.3 V, RL = 550 , unless otherwise noted) Parameter FSK Deviation Symbol Test Condition Min Typ Max Unit Max frequency deviation — 300 — ppm Deviation resolution — 2 — ppm Deviation accuracy ppm Max frequency deviation, 100 MHz — 30 — kHz Deviation resolution, 100 MHz — 200 — Hz Max frequency deviation, 315 MHz — 95 — kHz Deviation resolution, 315 MHz — 630 — Hz Max frequency deviation, 433.92 MHz — 130 — kHz Deviation resolution, 433.92 MHz — 868 — Hz Max frequency deviation, 868 MHz — 260 — kHz Deviation resolution, 868 MHz — 1740 — Hz Max frequency deviation, 915 MHz — 275 — kHz Deviation resolution, 915 MHz — 1830 — Hz 60 — — dB 2.4 — 12.5 pF OOK Modulation depth Antenna Tuning Capacitive Range (Differential) TBD 315 MHz Notes: 1. The frequency range is continuous over the specified range. 2. The frequency step size is limited by the frequency noise. 3. Optimum differential load is equal to 4 V/(11.5mA/2 * 4/PI) = 550 Therefore the antenna load resistance in parallel with the Si4012 differential output resistance should equal 600 Rev 0.1 7 Si4012 Table 4. Low Battery Detector Characteristics (TA = 25° C, VDD = 3.3 V, RL = 550 , unless otherwise noted) Parameter Symbol Test Condition Min Typ Max Unit — 2 — % Test Condition Min Typ Max Unit Crystal Frequency Range GPI0 configured as crystal oscillator 10 — 13 MHz Input Capacitance (GPIO0) GPI0 configured as crystal oscillator — 5 — pF Crystal ESR GPI0 configured as crystal oscillator — — 50 Start-up Time Crystal oscillator only, 60 mH motional arm inductance — 9 — ms Battery Voltage Measurement Accuracy Table 5. Optional Crystal Oscillator Characteristics (TA = 25° C, VDD = 3.3 V, RL = 600 , unless otherwise noted) Parameter Symbol Table 6. EEPROM Characteristics Parameter Conditions Program Time Independent of number of bits changing values Maximum Count per Counter Using API Min Typ Max Units — 8 40 ms 1000000 Write Endurance (per bit)* 50000 — cycles — cycles Note: *API uses coding technique to achieve write endurance of 1M cycles per bit. Table 7. Low Power Oscillator Characteristics VDD = 1.8 to 3.6 V; TA = –40 to +85 °C unless otherwise specified. Use factory-calibrated settings. Parameter Conditions Programmable Frequency Range Programmable divider in powers of 2 up to 128 Frequency Accuracy 8 Rev 0.1 Min Typ Max Units .1875 — 24 MHz –1 — +1 % Si4012 1.1. Definition of Test Conditions Production Test Conditions: TA = +25 °C VDD = +3.3 VDC TX output power measured at 100 MHz All RF output levels referred to the pins of the Si4012 (not the RF module) Qualification Test Conditions: TA = –40 to +85 °C VDD = +1.8 to +3.6 VDC All RF output levels referred to the pins of the Si4012 (not the RF module) Rev 0.1 9 Si4012 2. Functional Description Si4012 DIGITAL LOGIC SDA SCL SMBus INTERFACE RF ANALOG CORE ANTENNA TUNE OOK DIVIDER FSK SDN nIRQ MODULATOR AUTO TUNE TXP LDO POR BANDGAP VDD TXM LCOSC TX 256 BYTE DATA FIFO LED GPIO0/XTAL PA LPOSC VA DIGITAL CONTROLLER SLP TMR REGISTER BANK XTAL OSC VD GND BATTERY MONITOR Figure 1. Si4012 Functional Block Diagram The Si4012 is a crystal wireless transmitter with continuous frequency tuning over the frequency range of 27–960 MHz. The wide operating voltage range of 1.8–3.6 V and low current consumption makes the Si4012 an ideal solution for battery powered applications. The RF carrier is generated by Silicon Labs patented pending crystal-less oscillator technology. The device achieves a frequency accuracy of ±150 ppm over the commercial temperature range of 0 to 70 °C and ±250 ppm over the industrial temperature range of –40 to +85 °C. 10 The Si4012's PA output power can be configured between –13 to +10 dBm with 0.25 dB of resolution. The PA incorporates automatic ramp-up and rampdown control to reduce unwanted spectral spreading. The Si4012 is designed to work with a microcontroller to allow custom configuration of the transmitter for optimum performance. Voltage regulators are integrated on-chip which allows for a wide operating supply voltage range of 1.8 to 3.6 V. A standard 2-pin SMB (I2C) bus is used to communicate with an external microcontroller. Rev 0.1 Si4012 3. Pin Descriptions: Si4012 GPIO0/XTAL 1 10 SDA GND 2 9 SCL TXM 3 8 SDN Si4012 TXP 4 7 nIRQ VDD 5 6 LED Pin Number Name Description 1 GPIO0/XTAL 2 GND 3,4 TXM, TXP 5 VDD Supply input 9 LED LED driver output pin 7 nIRQ Interrupt status output, active low 8 SDN Shutdown input pin, active high 9 SCL SMB (I2C) Clock input 10 SDA SMB (I2C) Data input/output pin General purpose input or crystal input Ground RF transmitter differential outputs Rev 0.1 11 Si4012 4. Ordering Information Part Number* Si4012-A0-GT Description Crystal-less RF Transmitter Package Type Operating Temperature MSOP-10 –40 to 85 °C *Note: Add an “(R)” at the end of the device part number to denote tape and reel option. 12 Rev 0.1 Si4012 5. Package Outline: Si4012 Figure 21 illustrates the package details for the Si4012. Table 16 lists the values for the dimensions shown in the illustration. Figure 2. 20-Pin Quad Flat No-Lead (QFN) Table 8. Package Dimensions Symbol A A1 A2 b c D E E1 Millimeters Symbol Min Nom Max — 0.00 0.75 0.17 0.08 — — 0.85 — — 3.00 BSC 4.90 BSC 3.00 BSC 1.10 0.15 0.95 0.33 0.23 Millimeters Min e L L2 q aaa bbb ccc ddd 0.40 0° — — — — Nom 0.50 BSC 0.60 0.25 BSC — — — — — Max 0.80 8° 0.20 0.25 0.10 0.08 Notes: 1. All dimensions are shown in millimeters (mm). 2. Dimensioning and tolerancing per ASME Y14.5M-1994. 3. This drawing conforms to JEDEC Outline MO-187, Variation “BA.” 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. Rev 0.1 13 Si4012 6. PCB Land Pattern: Si4012 Figure 2 illustrates the PCB land pattern details for the Si4012. Table 17 lists the values for the dimensions shown in the illustration. Figure 3. PCB Land Pattern 14 Rev 0.1 Si4012 Table 9. 10-Pin MSOP Package Dimensions Dimension MIN MAX C1 4.40 REF E 0.50 BSC G1 3.00 — X1 — 0.30 Y1 Z1 1.40 REF — 5.80 Notes: General 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing per ASME Y14.5M-1994. 3. This Land Pattern Design is based on the IPC-7351 guidelines. 4. All dimensions shown are at Maximum Material Condition (MMC). Least Material Condition (LMC) is calculated based on a Fabrication Allowance of 0.05 mm. Solder Mask Design 1. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder mask and the metal pad is to be 60 µm minimum, all the way around the pad. Stencil Design 1. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to assure good solder paste release. 2. The stencil thickness should be 0.125 mm (5 mils). 3. The ratio of stencil aperture to land pad size should be 1:1. Card Assembly 1. A No-Clean, Type-3 solder paste is recommended. 2. The recommended card reflow profile is per the JEDEC/IPC J-STD020 specification for Small Body Components. Rev 0.1 15 Si4012 CONTACT INFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Please visit the Silicon Labs Technical Support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where personal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized application, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. 16 Rev 0.1