SK10/100E116 Quint Differential Line Receiver HIGH-PERFORMANCE PRODUCTS Description Features The SK10/100E116 is a quint differential line receiver designed for use in new, high-performance ECL systems. • • • • • • • The receiver design features clamp circuitry to cause a defined output state if both the inverting and non-inverting inputs are left open; in this case the Q output goes low, while the Q* output goes high. This feature makes the device ideal for twisted pair applications. • If both inverting and non-inverting inputs are at an equal potential of >–2.9V, the receiver does not go to a defined state, but rather shares current in normal differential amplifier fashion, producing output voltage levels midway between high and low. This may even cause the device to oscillate. 500 ps Maximum Propagation Delay Extended VEE Range of –4.2V to –5.5V VBB Output for Single-Ended Reception Internal 75KΩ Input Pull-Down Resistors ESD Protection of >4000V Fully Compatible with MC10E/100E116 Specified Over Industrial Temperature Range: –40oC to +85oC Available in 28-Pin PLCC Package PIN Description The SK10/100E116 provides VBB output for either singleended use or as a DC bias for AC coupling to the device. The VBB output pin should be used only as a DC bias for the E116 as its current sink/source capability is limited. Whenever used, the VBB pin should be bypassed to VCC via a 0.01 µF capacitor. Pin Function D0, D0*D4, D4* Differential Input Pairs Q0, Q0*-Q4, Q4* Differential Output Pairs VBB Reference Voltage Output VCC0 VCC to Output Q4* D4 VCC0 Q4* Q4 VCC0 22 21 20 19 28 16 VCC VEE 1 15 Q2* VBB 2 14 Q2 D0 3 13 VCC0 D0* 4 12 Q1* PLCC TOPVIEW 11 D4* Q3 D2* 10 Q4 17 Q1 D4 27 VCC0 Q3* Q3* D2 9 D3* Q3 18 Q0* D3 26 8 Q2* D3* Q0 D2* D4* Q2 23 D2 7 Q1* VCC0 D1* D3 Q1 24 D1 6 Q0* 5 D0* D1* Q0 D1 D0 25 Functional Block Diagram VBB Revision 1 /February 21, 2001 1 www.semtech.com SK10/100E116 HIGH-PERFORMANCE PRODUCTS Package Information 28-Pin PLCC Package Y BRK A 0.007 (0.180) M T L – M S NS R 0.007 (0.180) S NS –N– Z PIN Descriptions M T L–M D –M– C + E + –L– G J 0.004 (0.100) –T– SEATING PLANE G1 W D VIEW S 0.010 (0.250) S T L – M S N S V 28 1 0.007(0.180) M T L – M S N S H B 0.007 (0.180) U M T 0.007 (0.180) L - M M T S N L - M S S N S + K1 Z K + X G1 0.010 (0.250) S T L - M S N F S NOTES: 1. Datums -L-, -M-, and -N- determined where top of lead shoulder exits plastic body at mold parting line. 2. DIM G1, true position to be measured at Datum -T-, Seating Plane. 3. DIM R and U do not include mold flash. Allowable mold flash is 0.010 (0.250) per side. 4. Dimensioning and tolerancing per ANSI Y14.5M, 1982. 5. Controlling Dimension: Inch. 6. The package top may be smaller than the package bottom by up to 0.012 (0.300). Dimensions R and U are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch between the top and bottom of the plastic body. 7. Dimension H does not include Dambar protrusion or intrusion. The Dambar protrusion(s) shall not cause the H dimension to be greater than 0.037 (0.940). The Dambar intrusion(s) shall not cause the H dimension to be smaller than 0.025 (0.635). Revision 1 /February 21, 2001 0.007 (0.180) M T L – M INCHES 2 N S MILLIMETERS DIM MIN MAX MIN MAX A 0.485 0.495 12.32 12.57 B 0.485 0.495 12.32 12.57 C 0.165 0.180 4.20 4.57 E 0.090 0.110 2.29 2.79 F 0.013 0.019 0.33 0.48 G S 0.050 BSC 1.27 BSC H 0.026 0.032 0.66 0.81 J 0.020 -- 0.51 -- K 0.025 -- 0.64 -- R 0.450 0.456 11.43 11.58 U 0.450 0.456 11.43 11.58 V 0.042 0.048 1.07 1.21 W 0.042 0.048 1.07 1.21 X 0.042 0.056 1.07 1.42 Y -- 0.020 -- 0.50 Z 2o 10o 2o 10o G1 0.410 0.430 10.42 10.92 K1 0.040 -- 1.02 -- www.semtech.com SK10/100E116 HIGH-PERFORMANCE PRODUCTS DC Characteristics SK10/100E116 DC Electrical Characteristics (Notes 1, 2) (VCC – VEE = 4.2V to 5.5V; VOUT loaded 50Ω to VCC– 2.0V) TA = –40oC Symbol Ch a r a c t e r i s t i c Min Typ VBB Out put Ref er enc e Vol t ag e9 10E 100E 1. 43 1. 38 IIN I nput Cur r ent - 200 I EE Power Supply Cur rent 10EL 100EL V CC V EE Power Supply Voltage TA = 0oC Max Min Typ 1. 30 1. 38 1. 26 1. 38 200 5. 5 Max Min Typ 1. 27 1. 35 1. 26 1. 38 - 200 200 35 35 4. 2 TA = +25oC 5. 5 Max Min Typ 1. 25 1. 31 1. 26 1. 38 - 200 200 35 35 4. 2 TA = +85oC - 200 35 35 4. 2 5. 5 4. 2 Max Un i t 1. 19 1. 26 V V 200 µA 35 40 mA mA 5. 5 V AC Characteristics SK10/100EL116 AC Electrical Characteristics (VCC – VEE = +4.2V to +5.5V ; VOUT loaded 50Ω to VCC – 2.0V) TA = –40oC Max Min 445 385 Typ TA = +25oC Ch a r a c t e r i s t i c Min t PLH t P HL Propagation Delay to Output D 365 tskew Within-Device Skew6 DN t o Qn , Qn * 50 50 50 50 ps tskew Duty Cycle Skew7 t P L H t P HL ±10 ±10 ±10 ±10 ps VPP Mi n i mu m I n p u t S w i n g C L K 3 150 1000 150 1000 150 1000 150 1000 mV tr , tf Output Rise/Fall Times ( 2 0 % t o 8 0 %) 190 580 210 580 210 580 210 580 ps V C MR C o mmo n Mo d e R a n g e 4 VCC 2. 0 VCC 0. 6 VCC 2. 0 VCC 0. 6 VCC 2. 0 VCC 0. 6 VCC 2. 0 VCC 0. 6 V 3 Max Min 505 310 Typ TA = +85oC Symbol Revision 1 /February 21, 2001 Typ TA = 0oC Max Min 530 315 Typ Max Un i t 495 ps www.semtech.com SK10/100E116 HIGH-PERFORMANCE PRODUCTS AC Characteristics (continued) Notes: 1. 10EL circuits are designed to meet the DC specifications shown in the table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. Outputs are terminated through a 50Ω resistor to VCC–2.0V. 2. 100K circuits are designed to meet the DC specification shown in the table where transverse airflow greater than 500 lfpm is maintained. 3. Minimum input swing for which AC parameters guaranteed. 4. CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the high level falls within the specified range and the peak-to-peak voltage lies between VPP(min) and 1V. The lower end of the CMR range varies 1:1 with VCC and is equal to VCC - 2.0V. 5. Voltages referenced to VCC = 0V (ECL mode). 6. Within device skew is defined as indentical transition on similar path through a device. 7. Duty cycle is defined only for differential operation when the delays are measured from the crosspoint of the inputs to the crosspoints of the outputs. 8. For standard ECL DC Specifications, refer to the ECL Logic Family Standard DC Specifications Data Sheet. 9. Voltages are referenced to VCC = 0V (ECL Mode). 10. For part ordering description, see HPP Part Ordering Information Date Sheet. Ordering Information Ordering Code Package ID Temperature Range SK10E 116P J 28- P L CC I ndus t r i al SK10E 116P J T 28- P L CC I ndus t r i al SK100E 116P J 28- P L CC I ndus t r i al SK100E 116P J T 28- P L CC I ndus t r i al Contact Information Division Headquarters 10021 Willow Creek Road San Diego, CA 92131 Phone: (858) 695-1808 FAX: (858) 695-2633 Revision 1 /February 21, 2001 Semtech Corporation High-Performance Products Division 4 Marketing Group 1111 Comstock Street Santa Clara, CA 95054 Phone: (408) 566-8776 FAX: (408) 727-8994 www.semtech.com