SCAS294N − JANUARY 1993 − REVISED OCTOBER 2003 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC OE 4A 4B 4Y 3A 3B 3Y 1A 1B 1Y 2A 2B 2Y 16 1A A/B NC VCC OE 1 2 15 3 14 4 13 5 12 6 11 7 10 8 9 SN54LVC257A . . . FK PACKAGE (TOP VIEW) 1B 1Y NC 2A 2B OE 4A 4B 4Y 3A 3B 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 4A 4B NC 4Y 3A 2Y GND NC 3Y 3B 1 VCC A/B 1A 1B 1Y 2A 2B 2Y GND JESD 17 ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) SN74LVC257A . . . RGY PACKAGE (TOP VIEW) 3Y SN54LVC257A . . . J OR W PACKAGE SN74LVC257A . . . D, DB, NS, OR PW PACKAGE (TOP VIEW) D A/B D D Latch-Up Performance Exceeds 250 mA Per Operate From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 4.6 ns at 3.3 V Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C GND D D D D NC − No internal connection description/ordering information These quadruple 2-line to 1-line data selectors/multiplexers are designed for 1.65-V to 3.6-V VCC operation. The ’LVC257A devices are designed to multiplex signals from 4-bit data sources to 4-output data lines in bus-organized systems. The 3-state outputs do not load the data lines when the output-enable (OE) input is at a high logic level. ORDERING INFORMATION PACKAGE† TA QFN − RGY SN74LVC257ARGYR Tube of 40 SN74LVC257AD Reel of 2500 SN74LVC257ADR Reel of 250 SN74LVC257ADT SOP − NS Reel of 2000 SN74LVC257ANSR LVC257A SSOP − DB Reel of 2000 SN74LVC257ADBR LC257A Tube of 90 SN74LVC257APW Reel of 2000 SN74LVC257APWR Reel of 250 SN74LVC257APWT CDIP − J Tube of 25 SNJ54LVC257AJ SNJ54LVC257AJ CFP − W Tube of 150 SNJ54LVC257AW SNJ54LVC257AW LCCC − FK Tube of 55 SNJ54LVC257AFK SNJ54LVC257AFK TSSOP − PW −55°C −55 C to 125 125°C C TOP-SIDE MARKING Reel of 1000 SOIC − D −40°C −40 C to 85 85°C C ORDERABLE PART NUMBER LC257A LVC257A LC257A † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2003, Texas Instruments Incorporated !"#$%! & '("")% $& ! *(+,'$%! -$%). "!-('%& '!!"# %! &*)''$%!& *)" %/) %)"#& ! )0$& &%"(#)%& &%$-$"- 1$""$%2. "!-('%! *"!')&&3 -!)& !% )')&&$",2 ',(-) %)&%3 ! $,, *$"$#)%)"&. *"!-('%& '!#*,$% %! 45 $,, *$"$#)%)"& $") %)&%)(,)&& !%/)"1&) !%)-. $,, !%/)" *"!-('%& *"!-('%! *"!')&&3 -!)& !% )')&&$",2 ',(-) %)&%3 ! $,, *$"$#)%)"&. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SCAS294N − JANUARY 1993 − REVISED OCTOBER 2003 description/ordering information (continued) Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. FUNCTION TABLE INPUTS OE A/B A B OUTPUT Y H X X X Z L L L X L L L H X H L H X L L L H X H H logic diagram (positive logic) OE A/B 1A 1B 2A 2B 3A 3B 4A 4B 15 1 2 4 3 5 7 2Y 6 11 9 3Y 10 14 12 13 Pin numbers shown are for the D, DB, J, NS, PW, RGY, and W packages. 2 1Y POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 4Y SCAS294N − JANUARY 1993 − REVISED OCTOBER 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V Output voltage range, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, θJA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W (see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W (see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W (see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The value of VCC is provided in the recommended operating conditions table. 3. The package thermal impedance is calculated in accordance with JESD 51-7. 4. The package thermal impedance is calculated in accordance with JESD 51-5. recommended operating conditions (see Note 5) SN54LVC257A MIN MAX MIN MAX 2 3.6 1.65 3.6 Operating VCC Supply voltage VIH High-level input voltage VIL VI VO IOH IOL ∆t/∆v Low-level input voltage Data retention only SN74LVC257A 1.5 VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V UNIT V 1.5 0.65 × VCC 1.7 2 V 2 0.35 × VCC VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V 0.7 0.8 V 0.8 Input voltage 0 5.5 0 5.5 V Output voltage 0 VCC 0 VCC −4 V High-level output current Low-level output current VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 3 V −8 −12 −12 −24 −24 VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 3 V Input transition rise or fall rate mA 4 8 12 12 24 24 10 10 mA ns/V TA Operating free-air temperature −55 125 −40 85 °C NOTE 5: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SCAS294N − JANUARY 1993 − REVISED OCTOBER 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = −100 µA IOH = −100 µA VOH SN54LVC257A TYP† MAX VCC 1.65 V to 3.6 V 2.7 V to 3.6 V IOH = −4 mA IOH = −8 mA SN74LVC257A TYP† MAX MIN MIN VCC−0.2 VCC−0.2 1.65 V 1.2 2.3 V IOH = −12 mA IOH = −24 mA 1.7 2.7 V 2.2 2.2 3V 2.4 2.4 3V 2.2 2.2 V 1.65 V to 3.6 V A IOL = 100 µA UNIT 0.2 2.7 V to 3.6 V 0.2 IOL = 4 mA IOL = 8 mA 1.65 V 0.45 2.3 V 0.7 IOL = 12 mA IOL = 24 mA 2.7 V 0.4 0.4 3V 0.55 0.55 VI = 5.5 V or GND 3.6 V ±5 ±5 µA IOZ VO = VCC or GND 3.6 V ±15 ±10 µA ICC VI = VCC or GND, IO = 0 One input at VCC − 0.6 V, Other inputs at VCC or GND 3.6 V 10 10 µA 500 500 µA VOL II ∆ICC Ci VI = VCC or GND Co VO = VCC or GND † All typical values are at VCC = 3.3 V, TA = 25°C. 2.7 V to 3.6 V V 3.3 V 5 5 pF 3.3 V 5 5 pF switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) SN54LVC257A PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 2.7 V MIN A or B Y MAX MIN MAX 5.4 1 4.6 7.5 1 6.4 UNIT tpd A/B ten OE Y 6.7 1 5.6 ns tdis OE Y 4.7 0.5 4.3 ns 1 ns tsk(o) 4 VCC = 3.3 V ± 0.3 V POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ns SCAS294N − JANUARY 1993 − REVISED OCTOBER 2003 switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) SN74LVC257A PARAMETER FROM (INPUT) TO (OUTPUT) A or B Y VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 2.7 V VCC = 3.3 V ± 0.3 V MIN MAX MIN MAX MIN MAX MIN MAX 1 13.5 1 7.4 1 5.4 1 4.6 1 15.6 1 9.5 1 7.5 1 6.4 UNIT tpd A/B ten OE Y 1 14.6 1 8.7 1 6.7 1 5.6 ns tdis OE Y 1 15.4 1 6.7 1 4.7 1 4.3 ns 1 ns tsk(o) ns operating characteristics, TA = 25°C PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS VCC = 1.8 V TYP VCC = 2.5 V TYP VCC = 3.3 V TYP UNIT f = 10 MHz 13.5 14.5 15.5 pF POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SCAS294N − JANUARY 1993 − REVISED OCTOBER 2003 PARAMETER MEASUREMENT INFORMATION RL From Output Under Test CL (see Note A) VLOAD Open S1 GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 2.7 V 3.3 V ± 0.3 V VI tr/tf VCC VCC 2.7 V 2.7 V ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V 1.5 V 2 × VCC 2 × VCC 6V 6V 30 pF 30 pF 50 pF 50 pF 1 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input VM 0V tPLH tPHL VOH VM Output VM VOL tPHL Output Waveform 1 S1 at VLOAD (see Note B) tPLH VM VM VM 0V tPLZ tPZL VLOAD/2 VM VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS Output Waveform 2 S1 at GND (see Note B) VOL + V∆ VOL tPHZ tPZH VOH Output VI Output Control VM VOH − V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MLCC006B – OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.962 (24,43) 0.850 (21,6) 0.858 (21,8) 84 1.141 (28,99) 1.165 (29,59) 1.047 (26,6) 1.063 (27,0) B SQ A SQ 25 5 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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