SN74LVC8T245-EP www.ti.com........................................................................................................................................................................................... SCES770 – DECEMBER 2008 8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS FEATURES 1 • • • • • Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage VCC Isolation Feature – If Either VCC Input Is at GND, All Are in the High-Impedance State Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.65-V to 5.5-V Power-Supply Range Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 4000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS • • • • Controlled Baseline One Assembly/Test Site One Fabrication Site Available in Military (–55°C/125°C) Temperature Range (1) Extended Product Life Cycle Extended Product-Change Notification Product Traceability • • • (1) Additional temperature ranges are available – contact factory PW PACKAGE (TOP VIEW) VCCA DIR A1 A2 A3 A4 A5 A6 A7 A8 GND GND 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VCCB VCCB OE B1 B2 B3 B4 B5 B6 B7 B8 GND DESCRIPTION/ORDERING INFORMATION This 8-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74LVC8T245 is optimized to operate with VCCA and VCCB set at 1.65 V to 5.5 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5.5-V voltage nodes. ORDERING INFORMATION (1) PACKAGE (2) TA –55°C to 125°C (1) (2) TSSOP – PW Tape and reel ORDERABLE PART NUMBER SN74LVC8T245MPWREP TOP-SIDE MARKING NH245MEP For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008, Texas Instruments Incorporated SN74LVC8T245-EP SCES770 – DECEMBER 2008........................................................................................................................................................................................... www.ti.com DESCRIPTION/ORDERING INFORMATION (CONTINUED) The SN74LVC8T245 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ. The SN74LVC8T245 is designed so that the control pins (DIR and OE) are supplied by VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, all outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. FUNCTION TABLE (1) (EACH 8-BIT SECTION) CONTROL INPUTS OE (1) OUTPUT CIRCUITS B PORT OPERATION DIR A PORT L L Enabled Hi-Z B data to A bus L H Hi-Z Enabled A data to B bus H X Hi-Z Hi-Z Isolation Input circuits of the data I/Os are always active. LOGIC DIAGRAM (POSITIVE LOGIC) DIR 2 22 OE A1 3 21 B1 To Seven Other Channels 2 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC8T245-EP SN74LVC8T245-EP www.ti.com........................................................................................................................................................................................... SCES770 – DECEMBER 2008 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCCA VCCB Supply voltage range VI Input voltage range (2) MIN MAX –0.5 6.5 I/O ports (A port) –0.5 6.5 I/O ports (B port) –0.5 6.5 Control inputs –0.5 6.5 A port –0.5 6.5 B port –0.5 6.5 A port –0.5 VCCA + 0.5 B port –0.5 VCCB + 0.5 UNIT V V VO Voltage range applied to any output in the high-impedance or power-off state (2) VO Voltage range applied to any output in the high or low state (2) (3) IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA Continuous current through each VCCA, VCCB, and GND θJA Package thermal impedance (4) Tstg Storage temperature range (1) (2) (3) (4) ±100 –65 V V mA 88 °C/W 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The output positive-voltage rating may be exceeded up to 6.5 V maximum if the output current rating is observed. The package thermal impedance is calculated in accordance with JESD 51-7. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC8T245-EP 3 SN74LVC8T245-EP SCES770 – DECEMBER 2008........................................................................................................................................................................................... www.ti.com Recommended Operating Conditions (1) (2) (3) (4) VCCI VCCA VCCB VCCO Supply voltage 1.65 V to 1.95 V High-level input voltage VIH MAX 1.65 5.5 1.65 5.5 1.7 3 V to 3.6 V VCCI × 0.7 1.65 V to 1.95 V VIL Data inputs (5) VCCI × 0.35 2.3 V to 2.7 V 0.7 3 V to 3.6 V 0.8 4.5 V to 5.5 V High-level input voltage Control inputs (referenced to VCCA) (6) VCCA × 0.65 2.3 V to 2.7 V 1.7 3 V to 3.6 V 4.5 V to 5.5 V Low-level input voltage Control inputs (referenced to VCCA) (6) V 2 VCCA × 0.7 1.65 V to 1.95 V VIL V VCCI × 0.3 1.65 V to 1.95 V VIH V V 2 4.5 V to 5.5 V Low-level input voltage UNIT VCCI × 0.65 2.3 V to 2.7 V Data inputs (5) MIN VCCA × 0.35 2.3 V to 2.7 V 0.7 3 V to 3.6 V 0.8 4.5 V to 5.5 V V VCCA × 0.3 VI Input voltage Control inputs 0 5.5 V VI/O Input/output voltage Active state 0 VCCO V 3-State 0 5.5 V 1.65 V to 1.95 V IOH High-level output current –4 2.3 V to 2.7 V –8 3 V to 3.6 V –24 4.5 V to 5.5 V –32 1.65 V to 1.95 V IOL Low-level output current Δt/Δv Input transition rise or fall rate TA Operating free-air temperature Data inputs 4 2.3 V to 2.7 V 8 3 V to 3.6 V 24 4.5 V to 5.5 V 32 1.65 V to 1.95 V 20 2.3 V to 2.7 V 20 3 V to 3.6 V 10 4.5 V to 5.5 V (1) (2) (3) (4) (5) (6) 4 mA mA ns/V 5 –55 125 °C VCCI is the VCC associated with the data input port. VCCO is the VCC associated with the output port. All unused or driven (floating) data inputs (I/Os) of the device must be held at logic HIGH or LOW (preferably VCCI or GND) to ensure proper device operation and minimize power. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. All unused control inputs must be held at VCCA or GND to ensure proper device operation and minimize power comsumption. For VCCI values not specified in the data sheet, VIH min = VCCI × 0.7 V, VIL max = VCCI × 0.3 V. For VCCA values not specified in the data sheet, VIH min = VCCA × 0.7 V, VIL max = VCCA × 0.3 V. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC8T245-EP SN74LVC8T245-EP www.ti.com........................................................................................................................................................................................... SCES770 – DECEMBER 2008 Electrical Characteristics (1) (2) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VOH VOL II DIR VCCA VCCB IOH = –100 µA, TEST CONDITIONS VI = VIH 1.65 V to 4.5 V 1.65 V to 4.5 V IOH = –4 mA, VI = VIH 1.65 V 1.65 V 1.2 IOH = –8 mA, VI = VIH 2.3 V 2.3 V 1.9 IOH = –24 mA, VI = VIH 3V 3V 2.4 IOH = –32 mA, VI = VIH 4.5 V 4.5 V 3.8 IOL = 100 µA, VI = VIL 1.65 V to 4.5 V 1.65 V to 4.5 V 0.1 IOL = 4 mA, VI = VIL 1.65 V 1.65 V 0.45 IOL = 8 mA, VI = VIL 2.3 V 2.3 V 0.3 IOL = 24 mA, VI = VIL 3V 3V 0.55 IOL = 32 mA, VI = VIL 4.5 V 4.5 V 1.65 V to 5.5 V 1.65 V to 5.5 V ±1 ±2 0V 0 to 5.5 V ±1 ±6 0 to 5.5 V 0V ±1 ±6 1.65 V to 5.5 V 1.65 V to 5.5 V ±1 ±2 1.65 V to 5.5 V 1.65 V to 5.5 V 15 5V 0V 15 0V 5V –2 1.65 V to 5.5 V 1.65 V to 5.5 V 15 5V 0V –2 0V 5V 15 1.65 V to 5.5 V 1.65 V to 5.5 V 25 VI = VCCA or GND Ioff A or B port VI or VO = 0 to 5.5 V IOZ A or B port VO = VCCO or GND, OE = VIH ICCA VI = VCCI or GND, ICCB VI = VCCI or GND, ICCA + ICCB VI = VCCI or GND, IO = 0 IO = 0 IO = 0 A port One A port at VCCA – 0.6 V, DIR at VCCA, B port = open DIR DIR at VCCA – 0.6 V, B port = open, A port at VCCA or GND ΔICCB B port One B port at VCCB – 0.6 V, DIR at GND, A port = open Ci Control inputs Cio A or B port ΔICCA (1) (2) MIN TYP MAX MIN MAX UNIT VCCO – 0.1 V V 0.55 µA µA µA µA µA µA 50 3 V to 5.5 V µA 3 V to 5.5 V 50 3 V to 5.5 V 3 V to 5.5 V VI = VCCA or GND 3.3 V 3.3 V VO = VCCA/B or GND 3.3 V 3.3 V 50 µA 4 5 pF 8.5 10 pF VCCO is the VCC associated with the output port. VCCI is the VCC associated with the input port. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC8T245-EP 5 SN74LVC8T245-EP SCES770 – DECEMBER 2008........................................................................................................................................................................................... www.ti.com Switching Characteristics over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL tPHZ tPLZ tPHZ tPLZ tPZH tPZL tPZH tPZL VCCB = 1.8 V ± 0.15 V FROM (INPUT) TO (OUTPUT) A B 1.7 B A OE MIN MAX VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V VCCB = 5 V ± 0.5 V UNIT MIN MAX MIN MAX MIN MAX 25.9 1.3 13.2 1 11.4 0.8 11.1 ns 0.9 28.8 0.8 27.6 0.7 27.4 0.7 27.4 ns A 1.5 33.6 1.5 33.4 1.5 33.3 1.4 33.2 ns OE B 2.4 36.2 1.9 17.1 1.7 16 1.3 14.3 ns OE A 0.4 28 0.4 27.8 0.4 27.7 0.4 27.7 ns OE B 1.8 40 1.5 20 1.2 16.6 0.9 14.8 ns Switching Characteristics over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL tPHZ tPLZ tPHZ tPLZ tPZH tPZL tPZH tPZL 6 FROM (INPUT) TO (OUTPUT) A VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V VCCB = 5 V ± 0.5 V UNIT MIN MAX MIN MAX MIN MAX B 1.5 25.4 1.2 13 0.8 10.2 0.6 8.8 ns B A 1.2 13.3 1 13.1 1 12.9 0.9 12.8 ns OE A 1.4 13 1.4 13 1.4 13 1.4 13 ns OE B 2.3 33.6 1.8 15 1.7 14.3 0.9 10.9 ns OE A 1 17.2 1 17.3 1 17.2 1 17.3 ns OE B 1.7 32.2 1.5 18.1 1.2 14.1 1 11.2 ns Submit Documentation Feedback MIN MAX Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC8T245-EP SN74LVC8T245-EP www.ti.com........................................................................................................................................................................................... SCES770 – DECEMBER 2008 Switching Characteristics over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL tPHZ tPLZ tPHZ tPLZ tPZH tPZL tPZH tPZL VCCB = 1.8 V ± 0.15 V FROM (INPUT) TO (OUTPUT) A B 1.5 B A OE VCCB = 2.5 V ± 0.2 V MIN MAX VCCB = 3.3 V ± 0.3 V VCCB = 5 V ± 0.5 V UNIT MIN MAX MIN MAX MIN MAX 25.2 1.1 12.8 0.8 10.3 0.5 10.4 ns 0.8 11.2 0.8 10.2 0.7 10.1 0.6 10 ns A 1.6 12.2 1.6 12.2 1.6 12.2 1.6 12.2 ns OE B 2.1 33 1.7 14.3 1.5 12.6 0.8 10.3 ns OE A 0.8 14.1 0.8 13.6 0.8 13.2 0.8 13.6 ns OE B 1.8 31.7 1.4 18.4 1.1 12.9 0.9 10.9 ns Switching Characteristics over recommended operating free-air temperature range, VCCA = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL tPHZ tPLZ tPHZ tPLZ tPZH tPZL tPZH tPZL FROM (INPUT) TO (OUTPUT) A VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V MIN MAX UNIT MIN MAX MIN MAX MIN MAX B 1.5 25.4 1 12.8 0.7 10 0.4 8.2 ns B A 0.7 11 0.4 8.8 0.3 8.5 0.3 8.3 ns OE A 0.3 9.4 0.3 9.4 0.3 9.4 0.3 9.4 ns OE B 2 32.7 1.6 13.7 1.4 12 0.7 9.7 ns OE A 0.7 10.9 0.7 10.9 0.7 10.9 0.7 10.9 ns OE B 1.5 31.6 1.3 18.4 1 13.7 0.9 10.7 ns Operating Characteristics TA = 25°C PARAMETER CpdA (1) CpdB (1) (1) TEST CONDITIONS A-port input, B-port output B-port input, A-port output A-port input, B-port output CL = 0, f = 10 MHz, tr = tf = 1 ns B-port input, A-port output VCCA = VCCB = 1.8 V VCCA = VCCB = 2.5 V VCCA = VCCB = 3.3 V VCCA = VCCB = 5 V TYP TYP TYP TYP 2 2 2 3 12 13 13 16 13 13 14 16 2 2 2 3 UNIT pF Power dissipation capacitance per transceiver Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC8T245-EP 7 SN74LVC8T245-EP SCES770 – DECEMBER 2008........................................................................................................................................................................................... www.ti.com PARAMETER MEASUREMENT INFORMATION 2 × VCCO S1 RL From Output Under Test Open GND CL (see Note A) TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 × VCCO GND RL tw LOAD CIRCUIT VCCI VCCI/2 Input VCCO CL RL VTP 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V 15 pF 15 pF 15 pF 15 pF 2 kΩ 2 kΩ 2 kΩ 2 kΩ 0.15 V 0.15 V 0.3 V 0.3 V VCCI/2 0V VOLTAGE WAVEFORMS PULSE DURATION VCCA Output Control (low-level enabling) VCCA/2 VCCA/2 0V tPZL VCCI Input VCCI/2 VCCI/2 0V tPLH Output tPHL VOH VCCO/2 VOL VCCO/2 VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES tPLZ VCCO Output Waveform 1 S1 at 2 × VCCO (see Note B) VCCO/2 VOL + VTP VOL tPZH tPHZ Output Waveform 2 S1 at GND (see Note B) VCCO/2 VOH − VTP VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. VCCI is the VCC associated with the input port. I. VCCO is the VCC associated with the output port. J. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 8 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC8T245-EP PACKAGE OPTION ADDENDUM www.ti.com 8-Dec-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74LVC8T245MPWREP ACTIVE TSSOP PW 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/09615-01XE ACTIVE TSSOP PW 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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OTHER QUALIFIED VERSIONS OF SN74LVC8T245-EP : • Catalog: SN74LVC8T245 NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 6-Dec-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SN74LVC8T245MPWREP TSSOP PW 24 SPQ Reel Reel Diameter Width (mm) W1 (mm) 2000 330.0 16.4 Pack Materials-Page 1 A0 (mm) B0 (mm) K0 (mm) P1 (mm) 6.95 8.3 1.6 8.0 W Pin1 (mm) Quadrant 16.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 6-Dec-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVC8T245MPWREP TSSOP PW 24 2000 346.0 346.0 33.0 Pack Materials-Page 2 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. 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