SSM20P02H,J P-CHANNEL ENHANCEMENT-MODE POWER MOSFET Simple drive requirement D 2.5V gate drive capability Fast switching BV DSS -20V R DS(ON) 52mΩ ID G -18A S Description Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. G D S The TO-252 package is widely preferred for all commercial and industrial surface mount applications and suited for low voltage applications such as DC/DC converters. The through-hole version (SSM20P02J) is available for low-profile applications. G D TO-252(H) TO-251(J) S Absolute Maximum Ratings Symbol Parameter Rating Units VDS Drain-Source Voltage - 20 V VGS Gate-Source Voltage ± 12 V ID@TA=25℃ Continuous Drain Current, VGS @ 10V -18 A ID@TA=100℃ Continuous Drain Current, VGS @ 10V -14 A -50 A 1 IDM Pulsed Drain Current PD@TA=25℃ Total Power Dissipation 31.25 W Linear Derating Factor 0.25 W/ ℃ TSTG Storage Temperature Range -55 to 150 ℃ TJ Operating Junction Temperature Range -55 to 150 ℃ Thermal Data Symbol Parameter Value Unit Rthj-c Thermal Resistance Junction-case Max. 4.0 ℃/W Rthj-a Thermal Resistance Junction-ambient Max. 110 ℃/W Rev.2.01 6/26/2003 www.SiliconStandard.com 1 of 6 SSM20P02H,J Electrical Characteristics @ Tj=25oC (unless otherwise specified) Symbol Parameter Test Conditions BVDSS Drain-Source Breakdown Voltage ΔBVDSS/ΔTj RDS(ON) -20 - - V Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=-1mA - -0.03 - V/℃ Static Drain-Source On-Resistance VGS=-4.5V, ID=-8A - - 52 mΩ VGS=-2.5V, ID=-5A - - 85 mΩ -0.5 - - V VDS=-10V, ID=-8A - 15 - S VDS=-20V, VGS=0V - - -1 uA Drain-Source Leakage Current (Tj=150 C) VDS=-16V, VGS=0V - - -25 uA Gate-Source Leakage VGS= ± 12 - - ID=-8A - 13.5 - nC VGS(th) Gate Threshold Voltage gfs Forward Transconductance VGS=0V, ID=-250uA VDS=VGS, ID=-250uA o IDSS Drain-Source Leakage Current (Tj=25 C) o IGSS Min. Typ. Max. Units 2 ±100 nA Qg Total Gate Charge Qgs Gate-Source Charge VDS=-16V - 2.1 - nC Qgd Gate-Drain ("Miller") Charge VGS=-4.5V - 1.6 - nC VDS=-10V - 12 - ns 2 td(on) Turn-on Delay Time tr Rise Time ID=-8A - 20 - ns td(off) Turn-off Delay Time RG=3.3Ω,VGS=-4.5V - 45 - ns tf Fall Time RD=1.25Ω - 27 - ns Ciss Input Capacitance VGS=0V - 1050 - pF Coss Output Capacitance VDS=-16V - 410 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 110 - pF Source-Drain Diode Symbol IS ISM VSD Parameter Test Conditions VD=VG=0V , VS=-1.2V Continuous Source Current ( Body Diode ) Pulsed Source Current ( Body Diode ) 2 Forward On Voltage 1 Tj=25℃, IS=-10A, VGS=0V Min. Typ. Max. Units - - -10 A - - -50 A - - -1.2 V Notes: 1.Pulse width limited by safe operating area. 2.Pulse width <300us , duty cycle <2%. Rev.2.01 6/26/2003 www.SiliconStandard.com 2 of 6 SSM20P02H,J 60 45 T C =25 C -4.5V T C =150 o C -4.5V o -4.0V -ID , Drain Current (A) -ID , Drain Current (A) -4.0V 40 -3.5V -3.0V 20 -2.5V -3.5V 30 -3.0V -2.5V 15 VGS= -2.0V VGS= -2.0V 0 0 0 2 4 0 6 2.5 5 7.5 -V DS , Drain-to-Source Voltage (V) -V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 160 2 I D = -8A V GS = -4.5V I D = -8A T c =25 ℃ 120 Normalized R DS(ON) RDS(ON) (mΩ ) 1.4 80 0.8 40 0 0.2 0 3 6 9 12 -50 0 Fig 3. On-Resistance v.s. Gate Voltage Rev.2.01 6/26/2003 50 100 150 T j , Junction Temperature ( o C) -V GS (V) Fig 4. Normalized On-Resistance v.s. Junction Temperature www.SiliconStandard.com 3 of 6 SSM20P02H,J 20 40 16 12 PD (W) -ID , Drain Current (A) 30 20 8 10 4 0 0 25 50 75 100 125 0 150 30 T c , Case Temperature ( o C) 60 90 120 150 T c , Case Temperature ( o C) Fig 5. Maximum Drain Current v.s. Fig 6. Typical Power Dissipation Case Temperature 100 1 Normalized Thermal Response (R thjc) Duty Factor = 0.5 -ID (A) 100us 10 1ms 10ms T C =25 °C Single Pulse 0.2 0.1 0.1 0.05 PDM 0.02 t 0.01 T Single Pulse Duty Factor = t/T Peak T j = PDM x Rthjc + TC 100ms DC 0.01 1 0.1 1 10 100 0.00001 -V DS (V) 0.001 0.01 0.1 1 t , Pulse Width (s) Fig 7. Maximum Safe Operating Area Rev.2.01 6/26/2003 0.0001 Fig 8. Effective Transient Thermal Impedance www.SiliconStandard.com 4 of 6 SSM20P02H,J 8 10000 f=1.0MHz 6 Ciss 1000 C (pF) -VGS , Gate to Source Voltage (V) I D = -8A V DS = -16V 4 Coss Crss 100 2 0 10 0 5 10 15 20 1 7 13 19 -V DS (V) Q G , Total Gate Charge (nC) Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics 100 1.2 0.9 -IS(A) T j =150 o C -VGS(th) (V) 10 T j =25 o C 0.6 1 0.3 0 0 0.2 0.5 0.8 1.1 1.4 -50 -V SD (V) Rev.2.01 6/26/2003 50 100 150 o T j , Junction Temperature ( C) Fig 11. Forward Characteristic of Reverse Diode 0 Fig 12. Gate Threshold Voltage v.s. Junction Temperature www.SiliconStandard.com 5 of 6 SSM20P02H,J VDS 90% RD VDS D TO THE OSCILLOSCOPE 0.5 x RATED VDS RG G 10% S VGS VGS -4.5 V td(on) Fig 13. Switching Time Circuit td(off) tf tr Fig 14. Switching Time Waveform VG VDS TO THE OSCILLOSCOPE D 0.8 x RATED VDS G S QG -4.5V QGS QGD VGS -1~-3mA I G ID Charge Fig 15. Gate Charge Circuit Q Fig 16. Gate Charge Waveform Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. Rev.2.01 6/26/2003 www.SiliconStandard.com 6 of 6