SSM9960M/GM DUAL N-CHANNEL ENHANCEMENT-MODE POWER MOSFETS Simple drive requirement D2 D2 Lower gate charge D1 D1 Fast switching characteristics S1 40V R DS(ON) 20mΩ 7.8A ID G2 S2 SO-8 BV DSS G1 Description D2 D1 Advanced Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. G2 G1 S1 The SSM9960M is in the SO-8 package, which is widely preferred for commercial and industrial surface mount applications, and is well suited for low voltage applications such as DC/DC converters. S2 This device is available with Pb-free lead finish (second-level interconnect) as SSM9960GM. Absolute Maximum Ratings Symbol Parameter VDS Drain-Source Voltage VGS Gate-Source Voltage ID @ TA=25°C ID @ TA=100°C Rating Units 40 V ± 20 V 3 7.8 A 3 6.2 A Continuous Drain Current Continuous Drain Current 1 IDM Pulsed Drain Current 20 A PD @ TA=25°C Total Power Dissipation 2 W Linear Derating Factor 0.016 W/°C TSTG Storage Temperature Range -55 to 150 °C TJ Operating Junction Temperature Range -55 to 150 °C Thermal Data Symbol Rthj-a 8/21/2004 Rev.2.01 Parameter Thermal Resistance Junction-ambient 3 Max. www.SiliconStandard.com Value Unit 62.5 °C/W 1 of 6 SSM9960M/GM Electrical Characteristics @ T j=25oC (unless otherwise specified) Symbol Parameter Test Conditions BVDSS Drain-Source Breakdown Voltage ∆BV DSS/∆Tj Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA RDS(ON) Static Drain-Source On-Resistance 40 - - 0.032 Max. Units - V - V/°C - - 20 mΩ VGS=4.5V, ID=5A - - 32 mΩ VDS=VGS, ID=250uA 1 - 3 V VDS=10V, ID=7A - 25 - S Drain-Source Leakage Current (Tj=25 C) VDS=40V, VGS=0V - - 1 uA Drain-Source Leakage Current (Tj=70oC) VDS=32V ,VGS=0V - - 25 uA Gate-Source Leakage VGS= ± 20V - - ±100 nA ID=7A - 14.7 - nC Gate Threshold Voltage gfs Forward Transconductance o IGSS 2 Typ. VGS=10V, ID=7A VGS(th) IDSS VGS=0V, ID=250uA Min. 2 Qg Total Gate Charge Qgs Gate-Source Charge VDS=20V - 7.1 - nC Qgd Gate-Drain ("Miller") Charge VGS=4.5V - 6.8 - nC VDS=20V - 11.5 - ns 2 td(on) Turn-on Delay Time tr Rise Time ID=1A - 6.3 - ns td(off) Turn-off Delay Time RG=3.3Ω ,VGS=10V - 28.2 - ns tf Fall Time RD=20Ω - 12.6 - ns Ciss Input Capacitance VGS=0V - 1725 - pF Coss Output Capacitance VDS=25V - 235 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 145 - pF Min. Typ. VD=VG=0V , VS=1.3V - - 1.54 A Tj=25°C,IS=2.3A, VGS=0V - - 1.3 V Source-Drain Diode Symbol IS VSD Parameter Continuous Source Current ( Body Diode ) Forward On Voltage 2 Test Conditions Max. Units Notes: 1.Pulse width limited by max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board ; 135°C/W when mounted on min. copper pad. 8/21/2004 Rev.2.01 www.SiliconStandard.com 2 of 6 SSM9960M/GM 36 32 10V 6.0V 5.0V 4.5V o T C =25 C 10V 6.0V 5.0V 4.5V T C =150 o C ID , Drain Current (A) ID , Drain Current (A) 24 24 V GS =4.0V 12 V GS =4.0V 16 8 0 0 0 1 2 3 0 4 1 2 3 4 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 2 80 I D =7.0A T C =25°C I D =7.0A V GS =10V Normalized RDS(ON) RDS(ON) (mΩ ) 60 40 1.4 0.8 20 0 0.2 2 4 6 8 10 12 -50 0 100 150 T j , Junction Temperature ( C) Fig 3. On-Resistance v.s. Gate Voltage 8/21/2004 Rev.2.01 50 o V GS (V) Fig 4. Normalized On-Resistance vs. Junction Temperature www.SiliconStandard.com 3 of 6 SSM9960M/GM 10 2.4 ID , Drain Current (A) 8 1.6 PD (W) 6 4 0.8 2 0 0 25 50 75 100 125 150 0 50 T c , Case Temperature ( o C) 100 150 T c , Case Temperature ( o C) Fig 5. Maximum Drain Current vs. Fig 6. Typical Power Dissipation Case Temperature 1 100 10 ID (A) 1ms 10ms 1 100ms 1s 0.1 10s T C =25 o C Single Pulse Normalized Thermal Response (R thja) Duty Factor = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 PDM t 0.01 T Single Pulse Duty Factor = t/T Peak Tj = P DM x Rthja + Ta Rthja=135 oC/W DC 0.001 0.01 0.1 1 10 100 0.0001 0.001 V DS (V) 0.1 1 10 100 1000 t , Pulse Width (s) Fig 7. Maximum Safe Operating Area 8/21/2004 Rev.2.01 0.01 Fig 8. Effective Transient Thermal Impedance www.SiliconStandard.com 4 of 6 SSM9960M/GM f=1.0MHz 12 10000 VGS , Gate to Source Voltage (V) I D =7.0A Ciss 9 V DS =12V V DS =16V VDS =20V C (pF) 1000 6 Coss Crss 100 3 0 10 5 0 10 15 20 25 1 7 13 19 25 31 V DS (V) Q G , Total Gate Charge (nC) Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics 3.5 100 3 10 2.5 o o Tj=25 C VGS(th) (V) IS(A) Tj=150 C 1 2 1.5 0.1 1 0.5 0.01 0 0.4 0.8 1.2 -50 0 Fig 11. Forward Characteristic of Reverse Diode 8/21/2004 Rev.2.01 50 100 150 T j , Junction Temperature ( o C ) V SD (V) Fig 12. Gate Threshold Voltage vs. Junction Temperature www.SiliconStandard.com 5 of 6 SSM9960M/GM VDS 90% RD VDS D 0.5 x RATED V DS G RG TO THE OSCILLOSCOPE + 10% VGS S 10 v VGS - td(on) Fig 13. Switching Time Circuit td(off) tf tr Fig 14. Switching Time Waveform VG VDS 4.5V 0.5 x RATED V DS G S QG TO THE OSCILLOSCOPE D QGS QGD VGS + 1~ 3 mA IG I D Charge Fig 15. Gate Charge Circuit Q Fig 16. Gate Charge Waveform Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 8/21/2004 Rev.2.01 www.SiliconStandard.com 6 of 6