QUAD DRIVER DESCRIPTION FEATURES ■ ■ ■ ■ The SY10/100E112 are quad drivers designed for use in new, high-performance ECL systems. The E112 has two pairs of OR/NOR outputs from each gate and a common, buffered enable input. The data input can also be used as an ECL memory address fan-out driver, although the E111 is designed specifically for this purpose, and offers lower skew than the E112. For memory address driver applications where scan capabilities are required, please refer to the SY10/100E212 device. 600ps max. propagation delay Extended 100E VEE range of –4.2V to –5.5V Common enable input Fully compatible with industry standard 10KH, 100K I/O levels ■ Internal 75KΩ input pulldown resistors ■ Fully compatible with Motorola MC10E/100E112 ■ Available in 28-pin PLCC package Q3b Q0a Q0b VCCO Q2b Q2a PIN CONFIGURATION Q3a Q3b Q3a BLOCK DIAGRAM D0 SY10E112 SY100E112 Q0a 25 24 23 22 21 20 19 Q0b 27 17 28 16 Q2a VCC Q1b D0 EN 3 2 15 13 Q1a Q1b 12 Q1a 14 5 6 7 8 9 10 11 Q0b 4 Q2a Q2b Q2a Q2b VCCO D2 PLCC TOP VIEW J28-1 1 Q0a Q1b D3 D2 VEE D1 Q0b Q1a Q2b Q0a Q1b 18 VCCO D1 26 NC Q1a VCCO Q3a D3 Q3b PIN NAMES Q3a Q3b Pin EN Function D0-D3 Data Inputs EN Enable Input Qna, Qnb True Outputs Qna, Qnb Inverting Outputs VCCO VCC to Output Rev.: D 1 Amendment: /2 Issue Date: May, 1998 SY10E112 SY100E112 Micrel TRUTH TABLE EN Qn Qn L Dn Dn H H L DC ELECTRICAL CHARACTERISTICS VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND TA = –40°C Symbol IIH Parameter TA = 0°C Min. Typ. Max. Min. Typ. TA = +25°C TA = +85°C Max. Min. Typ. Max. Min. Typ. Max. Unit µA Input HIGH Current EN D — — — — 150 200 — — — — 150 200 — — — — 150 200 — — — — 150 200 — — 47 47 56 56 — — 47 47 56 56 — — 47 47 56 56 — — 47 54 56 65 Power Supply Current IEE mA 10E 100E AC ELECTRICAL CHARACTERISTICS VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND TA = –40°C Symbol Parameter Min. TA = 0°C TA = +25°C TA = +85°C Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. tPLH tPHL Propagation Delay to Output D 200 EN 275 400 450 600 675 200 275 400 450 600 675 200 275 400 450 600 675 200 275 400 450 600 675 tskew Within-Device Skew Dn to Qn, Qn(1) Qna to Qnb(2) — — 80 40 — — — — 80 40 — — — — 80 40 — — — — 80 40 — — 275 425 700 275 425 700 275 425 700 275 425 700 tr tf Rise/Fall Time 20% to 80% Unit ps ps NOTES: 1. Within-device skew is defined as identical transitions on similar paths through a device. 2. Skew defined between common OR or common NOR outputs of a single gate. PRODUCT ORDERING CODE Ordering Code Package Type Operating Range SY10E112JC J28-1 Commercial SY10E112JCTR J28-1 SY100E112JC SY100E112JCTR Ordering Code Package Type Operating Range SY10E112JI J28-1 Industrial Commercial SY10E112JITR J28-1 Industrial J28-1 Commercial SY100E112JI J28-1 Industrial J28-1 Commercial SY100E112JITR J28-1 Industrial 2 ps SY10E112 SY100E112 Micrel 28 LEAD PLCC (J28-1) Rev. 03 3 SY10E112 SY100E112 Micrel MICREL-SYNERGY TEL 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA + 1 (408) 980-9191 FAX + 1 (408) 914-7878 WEB http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. © 2000 Micrel Incorporated 4