SY89856U 2GHz, Low-Power, 1:6 LVPECL Fanout Buffer with 2:1 Input MUX and Internal Termination General Description The SY89856U is a 2.5V/3.3V precision, highspeed, 1:6 fanout capable of handling clocks up to 2.0GHz. A differential 2:1 MUX input is included for redundant clock switchover applications. The differential input includes Micrel’s unique, 3-pin input termination architecture that allows the device to interface to any differential signal (AC- or DCcoupled) as small as 100mV (200mVpp) without any level shifting or termination resistor networks in the signal path. The outputs are LVPECL (100k, temperature compensated), with extremely fast rise/fall times guaranteed to be less than 200ps. The SY89856U operates from a 2.5V ±5% supply or a 3.3V ±10% supply and is guaranteed over the full industrial temperature range of –40°C to +85°C. The SY89856U is part of Micrel’s high-speed, Precision ® Edge product line. All support documentation can be found on Micrel’s web site at: www.micrel.com. Functional Block Diagram ® Precision Edge Features • 6 ultra-low skew copies of the selected input • 2:1 MUX input included for clock switchover applications • Low power: 225mW typical (2.5V) • 2.5V to 3.3V supply voltage • Unique input isolation design minimizes crosstalk • Guaranteed AC performance over temperature and voltage: – Clock frequency range: DC to >2.0GHz – <400ps IN-to-OUT tpd – <200ps tr/tf times – <30ps skew (output-to-output) • Ultra-low jitter design: – <1psRMS random jitter – <10psPP total jitter (clock) – <1psRMS cycle-to-cycle jitter – <0.7psRMS crosstalk-induced jitter • Unique input termination and VT pin accepts DCand AC-coupled inputs (CML, PECL, LVDS) • 100k LVPECL compatible output swing • –40°C to +85°C industrial temperature range • Available in 32-pin (5mm x 5mm) MLF® package Applications • • • • Redundant clock distribution All SONET/SDH clock/data distribution All Fibre Channel distribution All Gigabit Ethernet clock distribution Markets • • • • LAN/WAN Enterprise servers ATE Test and measurement Precision Edge is a registered trademark of Micrel, Inc. MLF and MicroLeadFrame registered are trademarks of Amkor Technology. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com February 2007 M9999-022007-B [email protected] or (408) 955-1690 Micrel, Inc. SY89856U Ordering Information(1) Package Type Operating Range Package Marking Part Number Lead Finish SY89856UMG MLF-32 Industrial SY89856U with Pb-Free bar-line indicator NiPdAu Pb-Free MLF-32 Industrial SY89856U with Pb-Free bar-line indicator NiPdAu Pb-Free SY89856UMGTR (2) Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only. 2. Tape and Reel. Pin Configuration 32-Pin MLF® (MLF-32) February 2007 2 M9999-022007-B [email protected] or (408) 955-1690 Micrel, Inc. SY89856U Pin Description Pin Number Pin Name Pin Function Differential Input: These input pairs are the differential signal inputs to the device. These inputs accept AC- or DC-coupled signals as small as 100mV (200mVp-p). Each pin of a pair internally terminates to a VT pin through 50Ω. Note that these inputs will default to an indeterminate state if left open. Please refer to the “Input Interface Applications” section for more details. 1,4 IN0, /IN0 5, 8 IN1, /IN1 2, 6 VT0, VT1 Input Termination Center-Tap: Each side of the differential input pair terminates to a VT pin. The VT0 and VTI pins provide a center-tap to a termination network for maximum interface flexibility. See “Input Interface Applications” section for more details. 31 SEL This single-ended TTL/CMOS-compatible input selects the inputs to the multiplexer. Note that this input is internally connected to a 25kΩ pull-up resistor and will default to logic HIGH state if left open. The MUX select switchover function is asynchronous. 10 NC No connect. 11, 16, 18, VCC Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close to VCC pins as possible. 29, 28 27, 26 22, 21 20, 19 15, 14 13, 12 Q0, /Q0, Q1, /Q1, Q2, /Q2, Q3, /Q3, Q4, /Q4, Q5, /Q5 Differential Outputs: These 100k (temperature compensated) LVPECL output pairs are low skew copies of the selected input. Unused output pins may be left floating. Please refer to the “LVPECL Output Interface Applications” for details. 9, 17, 24, 32 GND, Exposed Pad Ground: Ground pins and exposed pad must be connected to the same ground plane. 3, 7 VREF-AC0 VREF-AC1 Reference Voltage: This output biases to VCC–1.2V. It is used for AC-coupling inputs (IN, /IN). Connect VREF_AC directly to the VT pin. Bypass with 0.01µF low ESR capacitor to VCC. See “Input Interface Applications” section. Maximum sink/source current is ±1.5mA. Due to the limited drive capability use for input at the same package only. 23, 25, 30 LVPECL Output Interface Applications February 2007 SEL Output 0 IN0 Input Selected 1 IN1 Input Selected 3 M9999-022007-B [email protected] or (408) 955-1690 Micrel, Inc. SY89856U Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (VCC) ..........................–0.5V to +4.0V Input Voltage (VIN) ..................................–0.5V to VCC LVPECL Output Current (IOUT) Continuous ................................................. 50mA Surge........................................................ 100mA Termination Current Source or sink current on VT .................. ±100mA VREF-AC Source or sink current………… ......... ±2.0mA Lead Temperature (soldering, 20 sec.) ..........+260°C Storage Temperature (Ts)..................–65°C to 150°C Supply Voltage (VCC).................. +2.375V to +2.625V ......................................................+3.0V to +3.6V Ambient Temperature (TA)................ –40°C to +85°C Package Thermal Resistance(3) MLF® (θJA) Still-Air ..................................................... 35°C/W MLF® (ψJB) Junction-to-Board .................................... 16°C/W DC Electrical Characteristics(4) TA = –40°C to +85°C, unless otherwise stated. Symbol Parameter VCC Power Supply Voltage ICC Power Supply Current RIN Input Resistance (IN-to-VT) RDIFF_IN Differential Input Resistance (IN-to-/IN) VIH Input High Voltage (IN, /IN) VIL Input Low Voltage (IN, /IN) VIN Input Voltage Swing (IN, /IN) VDIFF_IN Differential Input Voltage Swing |IN-/IN| VT_IN IN-to-VT (IN, /IN) VREF-AC Output Reference Voltage Condition Min Typ Max Units 2.375 2.5 2.625 V 3.0 3.3 3.6 V 90 140 mA 45 50 55 Ω 90 100 110 Ω VIH–1.2 VCC V 0 VIH–0.1 V See Figure 1a. 0.1 1.7 V See Figure 1b. 0.2 No load, max VCC. VCC–1.3 V VCC–1.2 1.28 V VCC–1.1 V Notes: 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to an absolute maximum ratings conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB. θJA and ψJB values are determined for a 4-layer board in still air, unless otherwise stated. 4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. February 2007 4 M9999-022007-B [email protected] or (408) 955-1690 Micrel, Inc. SY89856U LVPECL Outputs DC Electrical Characteristics(6) VCC = 2.5V ±5% or 3.3V ±10%; TA = –40°C to + 85°C; RL = 50Ω to VCC – 2V, unless otherwise stated. Symbol Parameter VOH Output HIGH Voltage Condition Min Typ VCC–1.145 VCC–1.945 Max Units VCC–0.895 V VOL Output LOW Voltage VOUT Output Voltage Swing See Figure 1a. 550 800 VCC–1.695 mV V VDIFF-OUT Differential Output Voltage Swing See Figure 1b. 1.1 1.6 V LVTTL/CMOS DC Electrical Characteristics(6) VCC = 2.5V ±5% or 3.3V ±10%; TA = –40°C to + 85°C, unless otherwise stated. Symbol Parameter VIH Input HIGH Voltage VIL Input LOW Voltage Condition Min Typ Max 2.0 V 0.8 IIH Input HIGH Current –125 IIL Input LOW Current –300 Units 30 V µA µA Note: 6. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. February 2007 5 M9999-022007-B [email protected] or (408) 955-1690 Micrel, Inc. SY89856U AC Electrical Characteristics(7) VCC = 2.5V ±5% or 3.3V ±10%; TA = –40°C to + 85°C, RL = 50Ω to VCC–2V, unless otherwise stated. Symbol Parameter Condition Min Typ fMAX Maximum Operating Frequency VOUT ≥400mV 2.0 3.0 tpd Differential Propagation Delay (IN0 or IN1-to-Q) 200 280 (SEL-to-Q) 140 ∆tpd Tempco Differential Propagation Delay Temperature Coefficient tSKEW Output-to-Output Note 8 Part-to-Part Note 9 tJITTER Clock Max GHz 400 ps 460 ps fs/oC 65 10 Units 30 ps 150 ps Cycle-to-Cycle Jitter Note 10 1 ps(rms) Deterministic Jitter (DJ) Note 11 10 ps(rms) Random Jitter (RJ) Note 12 1 ps(pp) Total Jitter (TJ) Note 13 10 ps(pp) Note 14 0.7 ps(rms) 200 ps Adjacent Channel Crosstalk-Induced Jitter tr, tf Output Rise/Fall Time Full swing, 20% to 80%. 75 130 Notes: 7. High-frequency AC-parameters are guaranteed by design and characterization. 8. Output-to-output skew is measured between outputs under identical input conditions. 9. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs. 10. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn – Tn-1 where T is the time between rising edges of the output signal. 23 11. Deterministic Jitter is measured at 2.5Gbps/3.2Gbps, with both K28.5 and 2 -1 PRBS pattern. 12. Random Jitter is measured with a K28.7 character pattern, measured at 2.5Gbps. 12 13. Total Jitter definition: with an ideal clock input of frequency <fMAX, no more than one output edge in 10 output edges will deviate by more than the specified peak-to-peak jitter value. 14. Crosstalk is measured at the output while applying two similar differential clock frequencies that are asynchronous with respect to each other at the inputs. February 2007 6 M9999-022007-B [email protected] or (408) 955-1690 Micrel, Inc. SY89856U Typical Operating Characteristics VCC = 3.3V, GND = 0V, VIN ≥ 400mV, tr/tf ≤ 300ps, TA = 25°C, unless otherwise stated. Output Swing vs. Frequency 900 OUTPUT SWING (mV) 800 700 600 500 400 300 200 100 0 0 1000 2000 3000 4000 5000 6000 FREQUENCY (MHz) Functional Characteristics VCC = 3.3V, GND = 0V, VIN ≥ 400mV, tr/tf ≤ 300ps, TA = 25°C, unless otherwise stated. February 2007 7 M9999-022007-B [email protected] or (408) 955-1690 Micrel, Inc. SY89856U Singled-Ended and Differential Swings VDIFF_IN,VDIFF_OUT VIN, VOUT 800mV (typical) 1600mV t(ypical) Figure 1b. Differential Voltage Swing Figure 1a. Single-Ended Voltage Swing Timing Diagrams IN /IN tpd Q /Q Input-to-Q tpd SEL tpd tpd Q /Q Select-to-Q tpd February 2007 8 M9999-022007-B [email protected] or (408) 955-1690 Micrel, Inc. SY89856U Input and Output Stages VCC VCC IN 50 VT /Q 50 GND /IN Q Figure 2a. Simplified Differential Input Stage Figure 2b. Simplified LVPECL Output Stage Input Interface Applications VCC VCC VCC IN VT RP NC /IN /IN SY89856U 0.1µF GND CML LVPECL /IN VCC IN IN LVPECL RP RP GND VREF-AC SY89856U SY89856U 0.1µF GND Note: For 3.3V, RP For 2.5V, RP Figure 3a. LVPECL Interface (DC-Coupled) VCC VT VREF-AC For 3.3V, RP For 2.5V, RP Figure 3b. LVPECL Interface (AC-Coupled) GND NC VT NC VREF-AC Option: may connect VT to VCC Figure 3c. CML Interface (DC-Coupled) VCC VCC IN IN LVDS CML /IN /IN VCC GND 0.1µF VT VREF-AC Figure 3d. CML Interface (AC-Coupled) February 2007 SY89856U SY89856U GND NC VT NC VREF-AC Figure 3e. LVDS Interface (DC-Coupled) 9 M9999-022007-B [email protected] or (408) 955-1690 Micrel, Inc. SY89856U LVPECL Output Interface Applications LVPECL has a high input impedance and a very low output impedance (open emitter), and a small signal swing which results in low EMI. LVPECL is ideal for driving 50Ω and 100Ω-controlled impedance transmission lines. There are several techniques for terminating the LVPECL output: Parallel Termination-Thevenin Equivalent, Parallel Termination (3-resistor), and AC-coupled Termination. Unused output pairs may be left floating. However, single-ended outputs must be terminated, or balanced. +3.3V +3.3V ZO = 50 R1 130 +3.3V R1 130 Z +3.3V Z +3.3V source ZO = 50 destination VCC R2 82 Rb C1 0.01µF (optional) R2 82 Notes: 2. Power-saving alternative to Thevenin termination. Notes: 3. Place termination resistors as close to destination inputs as possible. 1. For 2.5V systems, R1 = 250Ω, R2 = 62.5Ω. 4. Rb resistor sets the DC bias voltage, equal to VT. Figure 4a. Parallel Termination-Thevenin Equivalent 5. For 2.5V systems, Rb = 19Ω. Figure 4b. Parallel Termination (3-Resistors) Related Documentation Part Number Function Data Sheet Link SY58035U 4.5GHz, 1:6 LVPECL Fanout Buffer with 2:1 MUX Input and Internal Termination www.micrel.com/product-info/products/sy58035u.html ® HBW Solutions February 2007 MLF Application Note www.amkor.com/products/notes_papers/MLFappnote.pdf New Products and Applications www.micrel.com/product-info/products/solutions.shtml 10 M9999-022007-B [email protected] or (408) 955-1690 Micrel, Inc. SY89856U 32-Pin MicroLeadFrame® (MLF-32) MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2005 Micrel, Incorporated. February 2007 11 M9999-022007-B [email protected] or (408) 955-1690