TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 D D D D Excellent Output Drive Capability VO = ± 2.5 V Min at RL = 100 Ω, VCC± = ± 5 V VO = ± 12.5 V Min at RL = 600 Ω, VCC± = ± 15 V Low Supply Current . . . 280 µA Typ Decompensated for High Slew Rate and Gain-Bandwidth Product AVD = 0.5 Min Slew Rate = 10 V/µs Typ Gain-Bandwidth Product = 6.5 MHz Typ Wide Operating Supply Voltage Range VCC ± = ± 3.5 V to ± 18 V High Open-Loop Gain . . . 280 V/mV Typ Low Offset Voltage . . . 500 µV Max Low Offset Voltage Drift With Time 0.04 µV/Month Typ Low Input Bias Current . . . 5 pA Typ D D D D MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs LOAD RESISTANCE VO(PP) – Maximum Peak-to-Peak Output Voltage – V description The TLE2161, TLE2161A, and TLE2161B are JFET-input, low-power, precision operational amplifiers manufactured using the Texas Instruments Excalibur process. Decompensated for stability with a minimum closed-loop gain of 5, these devices combine outstanding output drive capability with low power consumption, excellent dc precision, and high gain-bandwidth product. In addition to maintaining the traditional JFET advantages of fast slew rates and low input bias and offset currents, the Excalibur process offers outstanding parametric stability over time and temperature. This results in a device that remains precise even with changes in temperature and over years of use. 10 VCC ± = ± 5 V TA = 25°C 8 6 4 2 0 10 100 1k RL – Load Resistance – Ω 10 k AVAILABLE OPTIONS PACKAGE TA VIOmax AT 25°C 25 C 0°C to 70°C SMALL OUTLINE (D) CHIP CARRIER (FK) CERAMIC DIP (JG) PLASTIC DIP (P) 500 µV 1 5 mV 1.5 3 mV — TLE2161ACD TLE2161CD — — — — TLE2161BCP TLE2161ACP TLE2161CP – 40°C to 85°C 500 µV 1 5 mV 1.5 3 mV — TLE2161AID TLE2161ID — — — — TLE2161BIP TLE2161AIP TLE2161IP – 55°C to 125°C 500 µV 1.5 1 5 mV 3 mV — TLE2161AMD TLE2161MD — TLE2161AMFK TLE2161MFK TLE2161BMJG TLE2161AMJG TLE2161MJG TLE2161BMP TLE2161AMP TLE2161MP The D packages are available taped and reeled. Add R suffix to device type (e.g., TLE2161ACDR). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1996, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 description (continued) A variety of available options includes small-outline packages and chip-carrier versions for high-density system applications. The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized for operation from – 40°C to 85°C. The M-suffix devices are characterized for operation over the full military temperature range of – 55°C to 125°C. FK PACKAGE (TOP VIEW) 1 8 2 7 3 6 4 5 NC VCC + OUT OFFSET N2 NC IN – NC IN + NC 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 NC VCC + NC OUT NC NC VCC – NC N2 NC OFFSET N1 IN – IN + VCC – NC N1 NC NC NC D, JG, OR P PACKAGE (TOP VIEW) NC – No internal connection equivalent schematic VCC + Q9 Q13 Q32 Q14 Q18 Q29 Q33 Q4 Q36 Q16 Q19 IN + Q25 Q37 Q27 IN – Q3 Q5 Q1 Q7 Q43 R8 Q17 Q35 R6 Q11 2.7 kΩ Q10 Q6 C1 Q30 C3 1.6 pF R3 2.4 kΩ 20 Q38 Q42 Q41 Q39 Q15 C2 15 pF Q8 Q21 OFFSET N1 OFFSET N2 Q12 R1 1.1 kΩ R4 55 kΩ R2 1.1 kΩ R5 60 kΩ Q26 Q22 VCC – All component values are nominal. POST OFFICE BOX 655303 OUT R9 100 Q24 Q31 Q2 Ω Q28 Q20 15 pF 2 Q40 Q34 Q23 • DALLAS, TEXAS 75265 R7 600 Ω Ω TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC + (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 V Supply voltage, VCC – . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 19 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 38 V Input voltage range, VI (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC ± Input current, II (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 1 mA Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 80 mA Total current into VCC + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 mA Total current out of VCC – . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 mA Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P package . . . . . . . . . . . . . . . . . 260°C Lead temperature 1,6 mm (1/16 inch) from case for 60seconds: JG package . . . . . . . . . . . . . . . . . . . . 300°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC +, and VCC –. 2. Differential voltages are at IN+ with respect to IN –. 3. The output may be shorted to either supply. Temperature and /or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING TA = 125°C POWER RATING D 725 mW 5.8 mW/°C 464 mW 377 mW 145 mW FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW JG 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW P 1000 mW 8.0 mW/°C 640 mW 520 mW 200 mW recommended operating conditions C SUFFIX Supply voltage, VCC ± Common mode input voltage, Common-mode voltage VIC Operating free-air temperature, TA VCC ± = ± 5 V VCC ± = ± 15 V I SUFFIX M SUFFIX MIN MAX MIN MAX MIN MAX ± 3.5 ± 18 ± 3.5 ± 18 + 3.5 ± 18 – 1.6 4 – 1.6 4 – 1.6 4 – 11 13 – 11 13 – 11 13 0 70 – 40 85 – 55 125 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT V V °C 3 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 electrical characteristics at specified free-air temperature, VCC ± = ± 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA† TLE2161C, TLE2161AC TLE2161BC MIN 25°C TLE2161C VIO Input offset voltage IIB VICR RS = 50 Ω VIC = 0 0, Input offset current 0.5 Full range Input bias current 6 µV/°C 0.04 µV/mo 25°C 1 0.8 Full range – 1.6 to 4 RL = 100 Ω Large signal differential voltage amplification Large-signal 25°C 3.5 Full range 3.3 25°C 2.5 VO = ± 2 2.8 8V V, RL = 10 kΩ VO = 0 to 2 V V, RL = 100 Ω VO = 0 to – 2 V V, RL = 100 Ω nA pA 2 – 1.6 to 4 Full range pA 3 25°C Common mode input voltage range Common-mode Maximum negative peak output voltage swing 1.9 25°C Full range Full range Maximum positive peak output voltage swing mV 2.4 25°C RL = 10 kΩ AVD 2.6 Full range RL = 100 Ω VOM – 0.6 3.5 25°C RL = 10 kΩ VOM + 3.1 Full range Input offset voltage long-term drift (see Note 4) IIO 0.8 UNIT 4 25°C TLE2161AC Temperature coefficient of input offset voltage MAX Full range TLE2161BC αVIO TYP –2 to 6 nA V V 3.7 V 3.1 2 25°C – 3.7 Full range – 3.3 25°C – 2.5 Full range –2 25°C 15 Full range 2 25°C 0.75 Full range 0.5 25°C 0.5 Full range 0.25 – 3.9 V – 2.7 80 45 V/mV 3 ri Input resistance 25°C 1012 Ω ci Input capacitance 25°C 4 pF zo Open-loop output impedance IO = 0 25°C 280 Ω CMRR Common mode rejection ratio Common-mode VIC=V =VICRmin min, RS = 50 Ω kSVR Supply voltage rejection ratio (∆VCC± /∆VIO) Supply-voltage VCC± = ± 5 V to ± 15 V, RS = 50 Ω ICC Supply current ∆ICC Supply-current y change g over operating g temperature range 25°C 65 Full range 65 25°C 75 Full range 75 25°C VO = 0 0, No load 82 93 280 Full range Full range dB dB 325 350 29 µA µA † Full range is 0°C to 70°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 operating characteristics at specified free-air temperature, VCC ± = ±5 V (unless otherwise noted) PARAMETER TEST CONDITIONS SR Slew rate (see Figure 1) Vn Equivalent q input noise voltage g (see Figure 2) Vn(PP) Peak-to-peak equivalent input noise voltage f = 0.1 Hz to 10 Hz In Equivalent input noise current f = 1 kHz Total harmonic distortion VO(PP) = 2 V, RL = 10 kΩ THD Gain-bandwidth product (see Figure 3) AVD = 5, RL = 10 kΩ, RS = 20 Ω, f = 10 Hz RS = 20 Ω, f = 1 kHz f = 100 kHz, f = 100 kHz, AVD = 5, RL = 10 kΩ, RL = 100 kΩ, CL = 100 pF f = 10 kHz, CL = 100 pF CL = 100 pF Settling time BOM Maximum output-swing bandwidth AVD = 5, φm Phase margin (see Figure 3) AVD = 5, AVD = 5, TYP 25°C 7 10 Full range 5 RL = 10 kΩ RL = 10 kΩ, RL = 100 Ω, CL = 100 pF 100 43 60 25°C 1 25°C 25°C CL = 100 pF 59 1.1 25°C 25°C UNIT MAX V/µs 25°C 25°C ε = 0.01% TLE2161C, TLE2161AC TLE2161BC MIN 25°C ε = 0.1% ts TA† nV/√H nV/√Hz µV fA/√Hz 0.025% 5.8 4.3 5 10 420 MHz µs kHz 70° 84° † Full range is 0°C to 70°C. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 electrical characteristics at specified free-air temperature, VCC ± = ± 15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA† TLE2161C, TLE2161AC TLE2161BC MIN 25°C TLE2161C VIO Input offset voltage 25°C RS = 50 Ω IIB VICR Input offset current VOM – 0.04 µV/mo 25°C 2 4 Full range – 11 to 13 25°C 13.2 25°C Full range Maximum negative peak output voltage swing 25°C Large signal differential voltage amplification Large-signal Full range VO = ± 10 V V, RL = 10 kΩ VO = 0 to 8 V V, RL = 600 Ω VO = 0 to – 8 V V, RL = 600 Ω – 12 to 16 nA V V 13.7 13 12.5 nA pA 3 25°C Full range pA 1 – 11 to 13 25°C RL = 600 Ω AVD 25°C Full range RL = 10 kΩ 0.5 µV/°C Common mode input voltage range Common-mode RL = 600 Ω mV 1 Full range Maximum positive peak output voltage swing 1.5 6 Full range 25°C RL = 10 kΩ VOM + 0.3 Full range Input bias current 3 2.5 Full range Input offset voltage long-term drift (see Note 4) IIO 0.5 Full range VIC = 0, UNIT MAX 3.9 25°C TLE2161AC Temperature coefficient of input offset voltage 0.6 Full range TLE2161BC αVIO TYP V 13.2 12 – 13.2 – 13.7 – 13 – 12.5 V – 13 – 12 25°C 30 Full range 20 25°C 25 Full range 10 25°C 3 Full range 1 230 100 V/mV 25 ri Input resistance 25°C 1012 Ω ci Input capacitance 25°C 4 pF zo Open-loop output impedance IO = 0 25°C 280 Ω CMRR Common mode rejection ratio Common-mode VIC = VICRmin min, kSVR Supply voltage rejection ratio (∆VCC± /∆VIO) Supply-voltage VCC± = ± 5 V to ± 15 V,, RS = 50 Ω ICC Supply current 25°C 72 Full range 70 25°C 75 Full range 75 25°C 0 VO = 0, ∆ICC RS = 50 Ω No load Supply-current y change g over operating g temperature range 90 93 290 Full range Full range dB dB 350 375 34 µA µA † Full range is 0°C to 70°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 operating characteristics at specified free-air temperature, VCC ± = ±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS SR Slew rate (see Figure 1) AVD = 5 5, RL = 10 kΩ kΩ, Vn Equivalent input noise voltage q g (see Figure 2) RS = 20 Ω, RS = 20 Ω, f = 10 Hz Vn(PP) Peak-to-peak equivalent input noise voltage f = 0.1 Hz to 10 Hz In Equivalent input noise current f = 1 kHz Total harmonic distortion VO(PP) = 2 V, RL = 10 kΩ AVD = 5, f = 10 kHz, f = 100 kHz, RL = 10 kΩ, CL = 100 pF THD Gain-bandwidth product (see Figure 3) f = 100 kHz, CL = 100 pF RL = 600 Ω, CL = 100 pF Settling time BOM Maximum output-swing bandwidth AVD = 5, φm Phase margin (see Figure 3) AVD = 5, AVD = 5, TYP 25°C 7 10 Full range 5 RL = 10 kΩ RL = 10 kΩ, RL = 600 Ω, CL = 100 pF V/µs 70 100 40 60 nV/√Hz 1.1 µV 25°C 1.1 fA/√Hz 25°C 25°C 25°C CL = 100 pF UNIT MAX 25°C 25°C ε = 0.01% TLE2161C, TLE2161AC TLE2161BC MIN 25°C f = 1 kHz ε = 0.1% ts TA† 25°C 0.025% 6.4 5.6 5 10 116 MHz µs kHz 72° 78° † Full range is 0°C to 70°C. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 electrical characteristics at specified free-air temperature, VCC ± = ± 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA† TLE2161I, TLE2161AI TLE2161BI MIN 25°C TLE2161I VIO Input offset voltage IIB VICR VIC = 0, RS = 50 Ω Input offset current 25°C 0.04 µV/mo 25°C 1 Large signal differential voltage amplification Large-signal VO = ± 2 2.8 8V V, RL = 10 kΩ VO = 0 to 2 V V, RL = 100 Ω VO = 0 to – 2 V V, RL = 100 Ω ri Input resistance ci Input capacitance zo Open-loop output impedance 3 25°C Full range – 1.6 to 4 25°C 3.5 Full range 3.1 25°C 2.5 CMRR Common mode rejection ratio Common-mode VIC=V =VICRmin min, RS = 50 Ω kSVR Supply voltage rejection ratio (∆VCC± /∆VIO) Supply-voltage VCC± = ± 5 V to ± 15 V, RS = 50 Ω ICC Supply current Supply-current change over operating temperature range No load –2 to 6 nA V 3.7 V 3.1 2 25°C – 3.7 Full range – 3.1 25°C – 2.5 Full range –2 25°C 15 Full range 2 25°C 0.75 Full range 0.5 25°C 0.5 Full range 0.25 – 3.9 V – 2.7 80 45 V/mV 3 1012 Ω 25°C 4 pF 25°C 280 Ω 25°C 65 Full range 65 25°C 75 Full range 65 25°C VO = 0 0, nA pA 4 25°C IO = 0 pA 2 – 1.6 to 4 Full range RL = 100 Ω ∆ICC µV/°C Common mode input voltage range Common-mode Maximum negative peak output voltage swing 1.9 2.7 Full range Maximum positive peak output voltage mV 6 Full range 25°C RL = 10 kΩ AVD 0.5 Full range Input bias current 2.6 3.9 25°C RL = 100 Ω VOM – 0.6 Full range RL = 10 kΩ VOM + 3.1 Full range Input offset voltage long-term drift (see Note 4) IIO 0.8 UNIT 4.4 25°C TLE2161AI Temperature coefficient of input offset voltage MAX Full range TLE2161BI αVIO TYP 82 93 280 Full range Full range dB dB 325 350 29 µA µA † Full range is – 40°C to 85°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 operating characteristics at specified free-air temperature, VCC ± = ± 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TLE2161I, TLE2161AI TLE2161BI MIN TYP 25°C 7 10 Full range 5 SR Slew rate (see Figure 1) AVD = 5 5, RL = 10 kΩ kΩ, Vn Equivalent input noise q voltage (see Figure 2) RS = 20 Ω, RS = 20 Ω, f = 10 Hz Vn(PP) Peak-to-peak equivalent input noise voltage f = 0.1 Hz to 10 Hz 25°C 1.1 In Equivalent input noise current f = 1 kHz 25°C 1 THD Total harmonic distortion VO(PP) = 2 V, RL = 10 kΩ 25°C 0.025% Gain-bandwidth product (see Figure 3) f = 100 kHz, f = 100 kHz, CL = 100 pF TA† 25°C f = 1 kHz AVD = 5, f = 10 kHz, RL = 10 kΩ, CL = 100 pF RL = 100 Ω, CL = 100 pF ε = 0.1% ts Settling time BOM Maximum output-swing bandwidth AVD = 5, φm Phase margin (see Figure 3) AVD = 5, AVD = 5, 25°C 25°C ε = 0.01% RL = 10 kΩ RL = 10 kΩ, RL = 100 Ω, 25°C CL = 100 pF CL = 100 pF 25°C V/µs 59 100 43 60 5.8 4.3 5 10 420 UNIT MAX nV/√Hz µV fA/√Hz MHz µs kHz 70° 84° † Full range is – 40°C to 85°C. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 electrical characteristics at specified free-air temperature, VCC ± = ± 15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA† TLE2161I, TLE2161AI TLE2161BI MIN 25°C TLE2161I VIO Input offset voltage RS = 50 Ω IIB VICR Input offset current VOM – µV/mo 25°C 2 4 Full range – 11 to 13 25°C 13.2 25°C Full range Maximum negative peak output voltage swing 25°C Large signal differential voltage amplification Large-signal Full range V V0 = ± 10 V, RL = 10 kΩ V0 = 0 to 8 V V, RL = 600 Ω V RL = 600 Ω V0 = 0 to – 8 V, – 12 to 16 nA V V 13.7 13 12.5 nA pA 5 25°C Full range pA 3 – 11 to 13 25°C RL = 600 Ω AVD µV/°C 0.04 Full range RL = 10 kΩ 0.5 25°C Common mode input voltage range Common-mode RL = 600 Ω mV 1.3 Full range Maximum positive peak output voltage swing 1.5 6 Full range 25°C RL = 10 kΩ VOM + 0.3 Full range Full range Input bias current 3 2.9 25°C Input offset voltage long-term drift (see Note 4) IIO 0.5 Full range VIC = 0 0, UNIT MAX 4.3 25°C TLE2161AI Temperature coefficient of input offset voltage 0.6 Full range TLE2161BI αVIO TYP V 13.2 12 – 13.2 – 13.7 – 13 – 12.5 V – 13 – 12 25°C 30 Full range 20 25°C 25 Full range 10 25°C 3 Full range 1 230 100 V/mV 25 ri Input resistance 25°C 1012 Ω ci Input capacitance 25°C 4 pF zo Open-loop output impedance IO = 0 25°C 280 Ω CMRR Common mode rejection ratio Common-mode VIC=V =VICRmin min, RS = 50 Ω kSVR Supply voltage rejection ratio (∆VCC± /∆VIO) Supply-voltage VCC± = ± 5 V to ± 15 V, RS = 50 Ω ICC Supply current ∆ICC 25°C 72 Full range 65 25°C 75 Full range 65 25°C Supply-current change over operating temperature range VO = 0 0, No load 90 93 290 Full range Full range dB dB 350 375 34 µA µA † Full range is – 40°C to 85°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA= 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 operating characteristics at specified free-air temperature, VCC ± = ± 15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TLE2161I, TLE2161AI TLE2161IB MIN TYP 25°C 7 10 Full range 5 UNIT MAX SR Slew rate (see Figure 1) AVD = 5 5, RL = 10 kΩ kΩ, Vn Equivalent input noise voltage q g (see Figure 2) RS = 20 Ω, RS = 20 Ω, f = 10 Hz Vn(PP) (PP) Peak-to-peak equivalent q input noise voltage f = 0.1 0 1 Hz to 10 Hz 25°C 11 1.1 µV In Equivalent input noise current f = 1 kHz 25°C 1.1 fA/√Hz THD Total harmonic distortion VO(PP) = 2 V,, RL = 10 kΩ Gain-bandwidth product (see Figure 3) f = 100 kHz, f = 100 kHz, CL = 100 pF TA† 25°C f = 1 kHz AVD = 5,, f = 10 kHz,, RL = 10 kΩ, RL = 600 Ω, CL = 100 pF CL = 100 pF ε = 0.1% ts Settling time BOM Maximum output-swing g bandwidth AVD = 5, 5 φm Phase margin (see Figure 3) AVD = 5, AVD = 5, 25°C 25°C 25°C ε = 0.01% RL = 10 kΩ RL = 10 kΩ, RL = 600 Ω, 25°C CL = 100 pF CL = 100 pF 25°C V/µs 70 100 40 60 nV/√Hz 0 025% 0.025% 6.4 5.6 5 10 116 MHz µs kHz 72° 78° † Full range is – 40°C to 85°C. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 electrical characteristics at specified free-air temperature, VCC ± = ± 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA† TLE2161M TLE2161AM TLE2161BM MIN 25°C TLE2161M VIO Input offset voltage αVIO Input offset current IIB Input bias current VICR VOM + VOM – AVD Maximum negative peak g output voltage swing Large-signal g g differential voltage amplification 3.1 0.6 2.6 4.6 25°C 0.5 Full range RS = 50 Ω VIC = 0, µV/°C 25°C 0.04 µV/mo 25°C 1 25°C 3 25°C Full range – 1.6 to 4 FK and JG packages RL = 600 Ω Full range 25°C Full range 25°C D and P packages RL = 100 Ω All packages RL = 10 kΩ FK and JG packages RL = 600 Ω D and P packages RL = 100 Ω All packages V0 = ± 2.8 28V V, RL = 10 kΩ V0 = 0 to 2.5 2 5 V, V RL = 600 Ω FK and JG packages D and P packages Full range 25°C Full range 25°C Full range 25°C V0 = 0 to – 2 2.5 5 V, V RL = 600 Ω V0 = 0 to 2 V V, RL = 100 Ω V0 = 0 to – 2 V, V RL = 100 Ω 3.5 2.5 V V 3.6 3.1 V 2 – 3.7 – 3.9 –3 – 2.5 – 3.5 –2 – 2.5 –2 25°C 15 Full range 2 25°C 1 25°C 3.7 2 2.5 nA V 3 Full range Full range –2 to 6 nA pA 30 – 1.6 to 4 25°C pA 15 Full range RL = 10 kΩ 1.9 6 Full range All packages mV 3.1 Full range Common mode input voltage range Common-mode Maximum positive peak output voltage swing 0.8 Full range Input offset voltage long-term drift (see Note 4) IIO MAX 6 25°C TLE2161BM Temperature coefficient of input offset voltage TYP Full range TLE2161AM UNIT V – 2.7 80 65 0.5 1 Full range 0.5 25°C 0.75 Full range 0.5 25°C 0.5 Full range 0.25 16 V/mV 45 3 † Full range is – 55°C to 125°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 electrical characteristics at specified free-air temperature, VCC ± = ± 5 V (unless otherwise noted continued) PARAMETER TLE2161M TLE2161AM TLE2161BM TA† TEST CONDITIONS MIN UNIT ri Input resistance 25°C TYP 1012 ci Input capacitance 25°C 4 pF zo Open-loop output impedance IO = 0 25°C 280 Ω CMRR Common mode rejection ratio Common-mode VIC = VICRmin min, kSVR Supply voltage rejection ratio (∆VCC±/∆VIO) Supply-voltage VCC± = ± 5 V to ± 15 V,, RS = 50 Ω ICC Supply current ∆ICC RS = 50 Ω 25°C 65 Full range 60 25°C 75 Full range 65 25°C VO = 0 0, Supply-current change over operating temperature range Ω 82 dB 93 280 Full range No load MAX dB 325 350 Full range µA µA 39 † Full range is – 55°C to 125°C. operating characteristics, VCC ± = ± 5 V, TA = 25°C PARAMETER TLE2161M TLE2161AM TLE2161BM TEST CONDITIONS MIN SR Slew rate (see Figure 1) AVD = 5, RS = 20 Ω, RL = 10 kΩ, f = 10 Hz 59 RS = 20 Ω, f = 1 kHz 43 Vn Equivalent input noise voltage (see Figure 2) Vn(PP) In Peak-to-peak equivalent input noise voltage f = 0.1 Hz to 10 Hz Equivalent input noise current f = 1 kHz THD Total harmonic distortion AVD = 5, RL = 10 kΩ Gain bandwidth product (see Figure 3) Gain-bandwidth ts Settling time BOM Maximum output-swing bandwidth φm Phase margin (see Figure 3) f = 100 kHz, f = 100 kHz, CL = 100 pF TYP 10 1.1 1 VO(PP) = 2 V, RL = 10 kΩ, RL = 600 kΩ, f = 10 kHz, CL = 100 pF 5.8 CL = 100 pF 4.3 5 ε = 0.01% 10 AVD = 5, POST OFFICE BOX 655303 RL = 10 kΩ RL = 10 kΩ, RL = 600 Ω, 420 CL = 100 pF 70° CL = 100 pF 84° • DALLAS, TEXAS 75265 MAX V/µs nV/√H nV/√Hz µV fA/√Hz 0.025% ε = 0.1% AVD = 5, AVD = 5, UNIT MHz µs kHz 13 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 electrical characteristics at specified free-air temperature, VCC ± = ±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA† TLE2161M TLE2161AM TLE2161BM MIN 25°C TLE2161M VIO Input offset voltage IIB VICR Temperature coefficient of input offset voltage RS = 50 Ω VIC = 0, Input offset current 1.5 0.3 µV/°C 25°C 0.04 µV/mo 25°C 2 4 25°C Full range – 11 to 13 13.2 12.5 25°C 12.5 Full range Maximum negative peak output voltage swing RL = 600 Ω Large signal differential voltage amplification Large-signal 25°C Full range VO = ± 10 V V, RL = 10 kΩ VO = 0 to 8 V V, RL = 600 Ω VO = 0 to – 8 V V, RL = 600 Ω – 12 to 16 nA V V 13.7 V 13.2 12 25°C – 13.2 Full range – 12.5 25°C – 12.5 Full range nA pA 40 – 11 to 13 Common mode input voltage range Common-mode pA 20 Full range Maximum positive peak output voltage swing 0.5 1.7 25°C Input bias current mV 6 Full range Full range RL = 10 kΩ AVD 0.5 3.6 25°C RL = 600 Ω VOM – 3 Full range RL = 10 kΩ VOM + 0.6 Full range Input offset voltage long-term drift (see Note 4) IIO MAX 6 25°C TLE2161BM αVIO TYP Full range TLE2161AM UNIT – 13.7 V – 13 – 12 25°C 30 Full range 20 25°C 25 Full range 7 25°C 3 Full range 1 230 100 V/mV 25 ri Input resistance 25°C 1012 Ω ci Input capacitance 25°C 4 pF zo Open-loop output impedance IO = 0 25°C 280 Ω CMRR Common mode rejection ratio Common-mode VIC = VICRmin min, kSVR Supply voltage rejection ratio (∆VCC± /∆VIO) Supply-voltage VCC± = ± 5 V to ± 15 V, RS = 50 Ω ICC Supply current ∆ICC RS = 50 Ω 25°C 72 Full range 65 25°C 75 Full range 65 25°C Supply-current change over operating temperature range VO = 0 0, No load 90 93 290 Full range Full range dB dB 350 375 46 µA µA † Full range is – 55°C to 125°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 operating characteristics at specified free-air temperature, VCC ± = ±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS RL = 10 kΩ kΩ, RS = 20 Ω, f = 10 Hz RS = 20 Ω, f = 1 kHz TYP 25°C 7 10 Full range 5 MAX Slew rate (see Figure 1) Vn Equivalent q input noise voltage g (see Figure 2) VN(PP) Peak-to-peak equivalent input noise voltage f = 0.1 Hz to 10 Hz 25°C 1.1 µV In Equivalent input noise current f = 1 Hz 25°C 1.1 fA/√Hz THD Total harmonic distortion VO(PP) = 2 V, RL = 10 kΩ f = 100 kHz, f = 100 kHz, CL = 100 pF MIN UNIT SR Gain-bandwidth product (see Figure 3) AVD = 5 5, TA† TLE2161M TLE2161AM TLE2161BM 25°C AVD = 5, f = 10 kHz, RL = 10 kΩ, CL = 100 pF RL = 600 Ω, CL = 100 pF ε = 0.1% ts Settling time BOM Maximum output-swing bandwidth AVD = 5, φm Phase margin (see Figure 3) AVD = 5, AVD = 5, 25°C 25°C 25°C ε = 0.01% RL = 10 kΩ RL = 10 kΩ, RL = 600 Ω, 25°C CL = 100 pF CL = 100 pF 25°C V/µs 70 40 nV/√Hz 0.025% 6.4 5.6 5 10 116 MHz µs kHz 72° 78° † Full range is – 55°C to 125°C. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 PARAMETER MEASUREMENT INFORMATION 8 kΩ 2 kΩ VCC + VCC + – – VO VI 2 kΩ VO + + VCC – VCC – CL (see Note A) RS RS NOTE A: CL includes fixture capacitance. Figure 2. Noise-Voltage Test Circuit Figure 1. Slew-Rate Test Circuit 10 kΩ VCC + 100 Ω VI – VO + VCC – CL (see Note A) RL NOTE A: CL includes fixture capacitance. Figure 3. Gain-Bandwidth Product and Phase-Margin Test Circuit typical values Typical values presented in this data sheet represent the median (50% point) of device parametric performance. Input bias and offset current At the picoampere bias-current level typical of the TLE2161, TLE2161A, and TLE2161B, accurate measurement of the bias current becomes difficult. Not only does this measurement require a picoammeter, but test socket leakages can easily exceed the actual device bias currents. To accurately measure these small currents, Texas Instruments uses a two-step process. The socket leakage is measured using picoammeters with bias voltages applied but with no device in the socket. The device is then inserted into the socket, and a second test that measures both the socket leakage and the device input bias current is performed. The two measurements are then subtracted algebraically to determine the bias current of the device. 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO Input offset voltage Distribution 4 IIB Input bias current vs Common-mode input voltage vs Free-air temperature 5 6 IIO VICR Input offset current vs Free-air temperature 6 Common-mode input voltage range limits vs Free-air temperature 7 VOM VOM Maximum positive peak output voltage vs Output current 8 Maximum negative peak output voltage vs Output current 9 VOM VO(PP) Maximum peak output voltage vs Supply voltage 10, 11, 12 Maximum peak-to-peak output voltage vs Frequency 13, 14, 15 AVD Large-signal differential voltage amplification vs Frequency vs Free-air temperature 16 17 IOS Short-circuit output current vs Elapsed time 18 Large-signal voltage amplification vs Free-air temperature 19 zo Output impedance vs Frequency 20 CMRR Common-mode rejection ratio vs Frequency 21 Supply current vs Supply voltage vs Free-air temperature 22 23 Pulse response Small signal Large signal 24, 25 26, 27 Noise voltage (referred to input) 0.1 to 10 Hz 28 Equivalent input noise voltage vs Frequency 29 Total harmonic distortion vs Frequency 30, 31 Gain-bandwidth product vs Supply voltage vs Free-air temperature 32 33 Phase margin vs Supply voltage vs Free-air temperature 34 35 Phase shift vs Frequency 16 ICC Vn THD φm POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 TYPICAL CHARACTERISTICS† TLE2161 DISTRIBUTION OF INPUT OFFSET VOLTAGE INPUT BIAS CURRENT vs COMMON-MODE INPUT VOLTAGE 60 736 Amplifiers Tested From 3 Wafer Lots VCC ± = ± 15 V TA = 25°C P Package 50 I IB – Input Bias Current – pA Percentage of Amplifiers – % 15 10 5 VCC ± = ± 15 V VID = 0 TA = 25°C 40 30 20 10 0 –4 –3 –2 –1 0 1 2 VIO – Input Offset Voltage – mV 3 0 4 – 20 Figure 4 COMMON-MODE INPUT VOLTAGE RANGE LIMITS vs FREE-AIR TEMPERATURE VIC – Common-Mode Input Voltage – V I IB and I IO – Input Bias and Offset Currents – pA VCC + +2 VCC ± = ± 15 V VIC = 0 104 103 ÏÏ IIB 102 ÏÏ IIO 101 1 25 45 65 85 105 TA – Free-Air Temperature – °C 125 VCC + +1 Positive Limit VCC + VCC – +4 Negative Limit VCC – +3 VCC – +2 – 75 – 50 – 25 0 25 50 75 TA – Free-Air Temperature – °C 100 Figure 7 Figure 6 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 18 20 Figure 5 INPUT BIAS CURRENT AND INPUT OFFSET CURRENT vs FREE-AIR TEMPERATURE 105 – 15 –10 – 5 0 5 10 15 VIC – Common-Mode Input Voltage – V POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 125 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 TYPICAL CHARACTERISTICS MAXIMUM NEGATIVE PEAK OUTPUT VOLTAGE vs OUTPUT CURRENT 16 TA = 25°C 14 VCC ± = ± 15 V 12 10 8 6 4 VCC ± = ± 5 V 2 0 0 – 10 – 20 – 30 – 40 IO – Output Current – mA – 50 VOM – – Maximum Negative Peak Output Voltage – V VOM+ – Maximum Positive Peak Output Voltage – V MAXIMUM POSITIVE PEAK OUTPUT VOLTAGE vs OUTPUT CURRENT – 60 ÏÏÏÏ ÏÏÏÏ – 16 TA = 25°C – 14 VCC ± = ± 15 V – 12 – 10 –8 –6 –4 VCC ± = ± 5 V –2 0 0 30 10 15 20 25 IO – Output Current – mA 5 Figure 8 MAXIMUM PEAK OUTPUT VOLTAGE vs SUPPLY VOLTAGE 20 RL = 10 kΩ TA = 25°C 15 VOM + 10 5 0 –5 – 10 VOM – – 15 VOM – Maximum Peak Output Voltage – V 20 VOM – Maximum Peak Output Voltage – V 40 Figure 9 MAXIMUM PEAK OUTPUT VOLTAGE vs SUPPLY VOLTAGE – 20 35 VOM + 10 5 0 –5 – 10 VOM – – 15 – 20 0 2 4 6 8 10 12 14 16 18 20 RL = 600 Ω TA = 25°C 15 0 2 4 6 8 10 12 14 16 18 20 | VCC ± | – Supply Voltage – V | VCC ± | – Supply Voltage – V Figure 11 Figure 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 19 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 TYPICAL CHARACTERISTICS MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY VOM – Maximum Peak Output Voltage – V 6 RL = 100 Ω TA = 25°C 4 VOM + 2 0 –2 –4 VOM – –6 0 2 4 6 8 |VCC ± | – Supply Voltage – V VO(PP) – Maximum Peak-to-Peak Output Voltage – V MAXIMUM PEAK OUTPUT VOLTAGE vs SUPPLY VOLTAGE 10 10 VCC ± = ± 5 V RL = 10 kΩ TA = 25°C 8 6 4 2 0 10 k VCC ± = ± 15 V RL = 10 kΩ TA = 25°C 20 15 10 5 0 10 k 100 k 1M f – Frequency – Hz 10 M VO(PP) – Maximum Peak-to-Peak Output Voltage – V VO(PP) – Maximum Peak-to-Peak Output Voltage – V MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FRQUENCY 25 MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY 40 VCC ± = ± 5 V RL = 10 kΩ TA = 25°C 35 30 25 20 15 10 5 0 10 k Figure 14 20 10 M Figure 13 Figure 12 30 100 k 1M f – Frequency – Hz 100 k 1M f – Frequency – Hz Figure 15 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 10 M TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 TYPICAL CHARACTERISTICS† LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FRQUENCY LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREE-AIR TEMPERATURE 120 60° 400 100 80° 350 80 100° AVD 60 120° 40 140° 20 160° ÁÁ ÁÁ ÁÁ VCC ± = ± 15 V RL = 10 kΩ CL = 100 pF TA = 25°C 0 – 20 0.1 1 180° 200° 100 k 1 M 10 M 10 100 1 k 10 k f – Frequency – Hz AVD AVD – Large-Signal Differential Voltage Amplification – V/mV Phase Shift Phase Shift AVD AVD – Large-Signal Differential Voltage Amplification – dB RL = 10 kΩ 300 250 200 ÁÁ ÁÁ ÁÁ VCC ± = ± 15 V 150 100 50 VCC ± = ± 5 V 0 – 75 – 50 – 25 0 25 50 75 100 TA – Free-Air Temperature – °C Figure 17 Figure 16 SHORT-CIRCUIT OUTPUT CURRENT vs ELAPSED TIME LARGE-SIGNAL VOLTAGE AMPLIFICATION vs FREE-AIR TEMPERATURE 80 80 VCC ± = ± 15 V VO = 0 I OS – Short-Circuit Output Current – mA I OS – Short-Circuit Output Current – mA VID = – 100 mV 60 40 20 VCC ± = ± 15 V TA = 25°C VO = 0 0 – 20 – 40 VID = 100 mV – 60 – 80 0 10 125 20 30 40 t – Elapsed Time – s 50 60 60 40 VID = –100 mV 20 0 – 20 VID = 100 mV – 40 – 60 – 80 – 75 – 50 – 25 0 25 50 75 100 TA – Free-Air Temperature – °C Figure 18 125 Figure 19 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 21 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 TYPICAL CHARACTERISTICS† 1000 VCC ± = ± 15 V TA = 25°C 100 z o – Output Impedance – Ω COMMON-MODE REJECTION RATIO vs FREQUENCY CMRR – Common-Mode Rejection Ratio – dB OUTPUT IMPEDANCE vs FREQUENCY AVD =100 10 AVD = 10 1 0.1 AVD = 1 0.01 0.001 10 100 1k 10 k 100 k 100 VCC ± = ± 5 V TA = 25°C 80 60 40 20 0 10 1M 100 1k 100 k 1M 10 M f – Frequency – Hz f – Frequency – Hz Figure 20 Figure 21 SUPPLY CURRENT vs SUPPLY VOLTAGE SUPPLY CURRENT vs FREE-AIR TEMPERATURE 340 340 VO = 0 No Load VO = 0 No Load 320 I CC – Supply Current – µ A I CC – Supply Current – µ A 10 k TA = 125°C 300 TA = 25°C 280 260 320 300 VCC ± = ± 15 V 280 VCC ± = ± 5 V 260 TA = – 55°C 240 0 2 4 6 8 10 12 14 16 18 20 240 –75 – 50 – 25 0 25 50 75 100 125 TA – Free-Air Temperature – °C |VCC ±| – Supply Voltage – V Figure 22 Figure 23 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 TYPICAL CHARACTERISTICS SMALL-SIGNAL PULSE RESPONSE SMALL-SIGNAL PULSE RESPONSE 100 VO – Output Voltage – mV VO – Output Voltage – mV 100 50 0 VCC± = ± 5 V AVD = 5 RL = 10 kΩ CL = 100 pF TA = 25°C See Figure 1 – 50 0.5 1 0 VCC ± = ± 15 V AVD = 5 RL = 10 kΩ CL = 100 pF TA = 25°C See Figure 1 – 50 – 100 0 50 1.5 2 2.5 3 – 100 0 0.5 t – Time – µs Figure 24 15 3 10 VO – Output Voltage – V VO – Output Voltage – V 2 2.5 3 LARGE-SIGNAL PULSE RESPONSE 4 2 1 VCC ± = ± 5 V AVD = 5 RL = 10 kΩ CL = 100 pF TA = 25°C See Figure 1 –1 1.5 Figure 25 LARGE-SIGNAL PULSE RESPONSE 0 1 t – Time – µs 5 0 –5 – 10 VCC± = ±15 V AVD = 5 RL = 10 kΩ CL = 100 pF TA = 25°C See Figure 1 – 15 –2 0 5 t – Time – µs 10 0 15 Figure 26 10 20 t – Time – µs 30 40 Figure 27 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 23 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 TYPICAL CHARACTERISTICS NOISE VOLTAGE (REFERRED TO INPUT) OVER A 10-SECOND INTERVAL EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY Vn – Equivalent Input Noise Voltage – nV/ Hz 1 Vn – Noise Voltage – uV µ VCC ± = ± 15 V f = 0.1 to 10 Hz TA = 25°C 0.5 0 – 0.5 –1 0 1 2 3 4 5 6 7 8 9 100 80 60 40 20 0 10 VCC ± = ± 5 V RS = 20 Ω TA = 25°C See Figure 2 1 10 t – Time – s 100 Figure 29 TOTAL HARMONIC DISTORTION vs FREQUENCY TOTAL HARMONIC DISTORTION vs FREQUENCY ÏÏÏÏÏ 0.15 0.1 Source Signal 0.05 0 10 100 1k t – Frequency – Hz ÏÏÏÏÏÏ 0.6 VCC ± = ± 5 V AVD = 2 VO(PP) = 2 V TA = 25°C THD – Total Harmonic Distortion – % THD – Total Harmonic Distortion – % 0.2 10 k 100 k 0.5 VCC ± = ± 5 V AVD = 10 VO(PP) = 2 V TA = 25°C 0.4 0.3 0.2 Source Signal 0.1 0 10 100 1k 10 k f – Frequency – Hz Figure 31 Figure 30 24 10 k f – Frequency – Hz Figure 28 0.25 1k POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 100 k TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 TYPICAL CHARACTERISTICS GAIN-BANDWIDTH PRODUCT vs SUPPLY VOLTAGE GAIN-BANDWIDTH PRODUCT vs FREE-AIR TEMPERATURE 7 f = 100 kHz RL = 10 kΩ CL = 100 pF TA = 25°C See Figure 3 6.6 Gain-Bandwidth Product – MHz Gain-Bandwidth Product – MHz 7 6.2 5.8 5.4 5 0 4 8 12 6.6 VCC ± = ± 15 V 6.2 5.8 VCC ± = ± 5 V 5.4 5 – 75 20 16 f = 100 kHz RL = 10 kΩ CL = 100 pF See Figure 3 |VCC ± | – Supply Voltage – V – 50 – 25 0 25 50 75 100 TA – Free-Air Temperature – °C Figure 32 Figure 33 PHASE MARGIN vs FREE-AIR TEMPERATURE PHASE MARGIN vs SUPPLY VOLTAGE 74° AVD = 5 RL = 10 kΩ CL = 100 pF See Figure 3 76° φ m – Phase Margin 72° φ m – Phase Margin 78° AVD = 5 RL = 10 kΩ CL = 100 pF TA = 25°C See Figure 3 73° 71° ÁÁ ÁÁ 74° 72° ÁÁ ÁÁ 70° 69° VCC ± = ± 5 V 70° 68° 68° 67° 0 2 125 4 6 8 10 12 14 16 |VCC ± | – Supply Voltage – V 18 20 66° – 75 VCC ± = ± 15 V – 50 – 25 0 25 50 75 TA – Free-Air Temperature – °C Figure 34 100 125 Figure 35 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 25 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 APPLICATION INFORMATION macromodel information Macromodel information provided was derived using Microsim Parts , the model generation software used with Microsim PSpice . The Boyle macromodel (see Note 5) and subcircuit in Figure 36 and Figure 37 were generated using the TLE2161 typical electrical and operating characteristics at 25°C. Using this information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases): • • • • • • • • • • • • Maximum positive output voltage swing Maximum negative output voltage swing Slew rate Quiescent power dissipation Input bias current Open-loop voltage amplification Gain-bandwidth product Common-mode rejection ratio Phase margin DC output resistance AC output resistance Short-circuit output current limit 99 + 9 3 VCC+ rss + vb iss rp IN – 2 dp IN + 1 j1 vc j2 11 fb dc + dlp hlim VCC – vln + + gcm ga vlim – ro1 rd2 54 4 ve – 7 8 + 91 + vlp – C2 6 C1 rd1 92 90 – r2 – 53 12 – ro2 – + 10 dln egnd de 5 – OUT Figure 36. Boyle Macromodel NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, ”Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal of Solid-State Circuits, SC-9, 353 (1974). PSpice and Parts are trademark of MicroSim Corporation. 26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 APPLICATION INFORMATION macromodel information (continued) .subckt TLE2161 1 2 3 4 5 c1 11 12 125.4E–14 c2 6 7 5.000E–12 dc 5 53 dx de 54 5d x dlp 90 91 dx dln 92 90 dx dp 4 3 dx egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5 fb 7 99 poly(5) vb vc ve vlp vln 0 4.085E6 –4E6 4E6 4E6 –4E6 ga 6 0 11 12 201.1E–6 gcm 0 6 10 99 3.576E–9 iss 3 10 dc 45.00E–6 hlim 90 0 vlim 1K j1 11 2 10 jx j2 12 1 10 jx r2 6 9 100.0E3 rd1 4 11 4.973E3 rd2 4 12 4.973E3 ro1 8 5 280 ro2 7 99 280 rp 3 4 113.2E3 rss 10 99 4.444E6 vb 9 0 dc 0 vc 3 53 dc 2 ve 54 4 dc 2 vlim 7 8 dc 0 vlp 91 0 dc 50 vln 0 92 dc 50 .model dx D (Is=800.0E–18) .model jx PJF (Is=1.000E–12 Beta=480E–6 Vto=–1) .ends Figure 37. Macromodel Subcircuit POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 27 TLE2161, TLE2161A, TLE2161B EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE µPOWER OPERATIONAL AMPLIFIERS SLOS049D – NOVEMBER 1989 – REVISED MAY 1996 APPLICATION INFORMATION input characteristics The TLE2161, TLE2161A and TLE2161B are specified with a minimum and a maximum input voltage that if exceeded at either input could cause the device to malfunction. Because of the extremely high input impedance and resulting low bias-current requirements, the TLE2161, TLE2161A, and TLE2161B are well suited for low-level signal processing; however, leakage currents on printed circuit boards and sockets can easily exceed bias-current requirements and cause degradation in system performance. It is a good practice to include guard rings around inputs (see Figure 38). These guards should be driven from a low-impedance source at the same voltage level as the common-mode input. VI + VI VO + VO – – R2 R1 R3 R4 Where R3 R4 + R2 R1 Figure 38. Use of Guard Rings input offset voltage nulling The TLE2161 series offers external null pins that can further reduce the input offset voltage. The circuit in Figure 39 can be connected as shown if the feature is desired. When external nulling is not needed, the null pins may be left disconnected. IN – – IN + + N1 N2 OUT 100 kΩ 5 kΩ VCC – Figure 39. Input Offset Voltage Nulling 28 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. 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