INFINEON TLE4265

5-V Low-Drop Voltage Regulator
TLE 4265
Bipolar IC
Features
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●
●
●
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Output voltage tolerance ≤ ± 2 %
Low-drop voltage
Very low standby current consumption
Overtemperature protection
Reverse polarity protection
Short-circuit proof
Setable reset threshold
Wide temperature range
Suitable for use in automotive electronics
Type
Ordering Code
Package
TLE 4265
Q67000-A9138
P-TO220-5-1
TLE 4265S
Q67000-A9277
P-TO220-5-2
P-TO220-5-1
P-TO220-5-2
Functional Description
TLE 4265 is a 5-V low-drop voltage regulator in a TO220-5 package. Maximum input
voltage is 45 V. It can produce an output current of > 200 mA. The IC is shortcircuit-proof
and thermal protected.
Application
The IC regulates an input voltage VI in the range 6 V < VI < 45 V to VQrated = 5.0 V. A reset
signal is generated for an output voltage VQ of < 4.5 V. The reset delay can be set with
an external capacitor. This voltage regulator is especially suitable for microprocessor
applications in automobiles.
Semiconductor Group
1
1998-11-01
TLE 4265
Pin Configuration
(top view)
P-TO220-5-1
1
VΙ
2
3
4
P-TO220-5-2
5
GND
VQ
QRES DRES
AEP01492
Pin Definitions and Functions
Pin
Symbol
Function
1
VI
Input voltage; block direct on IC with ceramic capacitor to GND
2
QRES
Reset output; open-collector output connected to output across
resistor of 30 kΩ
3
GND
Ground
4
DRES
Reset delay; wire with capacitor to GND for setting delay
5
VQ
5-V output voltage; block to GND with 22-µF capacitor
Semiconductor Group
2
1998-11-01
TLE 4265
Circuit Description
The control amplifier compares a highly precise reference voltage, produced by resistor
alignment, to a voltage that is proportional to the output voltage and drives the base of
the series transistor via a buffer. A saturation control, a function of the load current,
prevents any over-saturating of the power element. If the output voltage drops below
4.5 V, the external reset-delay capacitor is discharged by the reset generator. If the
voltage on the capacitor reaches the lower threshold VST, a signal is triggered on the
reset output and not canceled again until the upper threshold VdT is exceeded. The IC is
protected against overload, overtemperature and reverse polarity.
Temperature
Sensor
Saturation
Control and
Protection
5
In- 1
put
Control
Amplifier
Adjustment
Bandgap
Reference
Buffer
Reset
Generator
+
-
3
GND
Semiconductor Group
3
Output
4 Reset
Delay
2 Reset
Output
AEB01493
1998-11-01
TLE 4265
Block Diagram
Absolute Maximum Ratings
TJ = – 40 to 150 °C
Parameter
Symbol
Limit Values
Unit Notes
min.
max.
VI
– 42
45
V
–
VR
– 0.3
42
V
–
Vd
– 0.3
42
V
–
Output voltage
VQ
– 0.3
7
V
–
Output current
IQ
–
–
–
Limited internally
IGND
– 0.1
–
A
–
Junction temperature
TJ
–
150
°C
–
Storage temperature
Tstg
– 50
150
°C
–
Input voltage
VI
–
45
V
–
Junction temperature
TJ
– 40
150
°C
–
Input
Input voltage
Reset Output
Voltage
Reset Delay
Voltage
Output
GND
Current
Temperatures
Operating Range
Semiconductor Group
4
1998-11-01
TLE 4265
Absolute Maximum Ratings (cont’d)
TJ = – 40 to 150 °C
Parameter
Symbol
Limit Values
min.
max.
Unit Notes
Thermal Resistance
Junction ambient
Rthja
–
70
K/W –
Junction-case
Rthjc
–
10
K/W –
Optimum reliability and lifetime can be ensured in integrated circuits by not exceeding a
junction temperature of 125 °C during operation. Although operation up to the maximum
permissible junction temperature of 150 °C is possible, such boundary conditions, if
sustained, may affect device reliability.
Characteristics
VI = 13.5 V; TJ = 25 °C (unless specified otherwise)
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit Test Condition
Output voltage
VQ
4.9
5
5.1
V
5 mA ≤ IQ ≤ 150 mA
6 V ≤ VI ≤ 28 V
– 40 °C ≤ TJ ≤ 125 °C
Output-current limiting
IQ
200
250
–
mA
–
Current consumption
Iq = II – IQ
Iq
–
750
1000
µA
IQ = 0 mA
Current consumption
Iq = II – IQ
Iq
–
10
15
mA
IQ = 150 mA
Current consumption
Iq = II – IQ
Iq
–
15
20
mA
IQ = 150 mA
VI = 4.5 V
Drop voltage
VDr
–
0.35
0.5
V
IQ = 150 mA1)
Load regulation
∆VQ
–
–
25
mV
IQ = 5 to 150 mA
Semiconductor Group
5
1998-11-01
TLE 4265
Characteristics (cont’d)
VI = 13.5 V; TJ = 25 °C (unless specified otherwise)
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ.
max.
∆VQ
–
15
25
mV
VI = 6 to 28 V
IQ = 150 mA
Supply-voltage rejection SVR
–
54
–
dB
fr = 100 Hz
Vr = 0.5 Vpp
Line regulation
Reset Generator
Switching threshold
VRT
4.2
4.5
4.8
V
–
Saturation voltage
VR
–
0.1
0.4
V
IR = 1 mA
Saturation voltage
VC
–
50
100
mV
VQ < VRT
Charge current
Ich
7
10
14
µA
–
Delay switching
threshold
Vdt
1.5
1.8
2.1
V
–
Delay
td
–
18
–
ms
Cd = 100 nF
Delay
tt
–
2
–
µs
Cd = 100 nF
1) Drop voltage = VI – VQ (measured at point where VQ is 100 mV smaller than at VI = 13.5 V)
Semiconductor Group
6
1998-11-01
TLE 4265
ΙΙ
1000 µF
1
470 nF
5
ΙQ
22 µF
TLE 4265
2
VΙ
4
Ι ch
VC
5.6 k Ω
ΙR
VQ
3
Ι GND
VR
CD
AES01494
Test Circuit
1
Input
6V to 45 V
5
Output
470 nF
Reset
To MC
2
TLE 4265
4
22 µF
100 nF
3
AES01495
Application Circuit
Semiconductor Group
7
1998-11-01
TLE 4265
Drop Voltage versus Output Current
Current Consumption versus
Output Current
AED01496
700
AED01497
28
Ιq
VDr
mV
mA
500
20
400
16
300
12
V Ι = 13.5 V
T j = 25 C
200
8
100
4
0
0
50
100
150
200
mA
0
300
ΙQ
RL = 25 Ω
V
20
8
15
6
10
4
5
2
0
10
20
30
50
V
0
2
4
6
10
V
VΙ
VΙ
Semiconductor Group
300
mA
AED01499
VQ
mA
0
200
12
RL = 25 Ω
0
150
Output Voltage versus Input Voltage
AED01498
Ιq
100
50
ΙQ
Current Consumption versus Input
Voltage
30
0
8
1998-11-01
TLE 4265
Charge Current versus Temperature
AED01500
14
Ι ch
Switching Voltage VdT and VST versus
Temperature
AED01501
3.2
VdT
µA
V
V Ι = 13.5 V
Ι ch
2.4
10
V Ι = 13.5 V
VC = 1.5 V
8
2.0
VdT
1.6
6
1.2
4
0.8
2
-40
0.4
0
40
80
0
-40
160
C
0
40
80
Tj
Tj
Output Voltage versus Temperature
VQ
Output Voltage versus Input Voltage
AED01502
5.10
AED01503
300
Ι Q mA
V Ι = 13.5 V
V
160
C
T j = 25 C
250
5.00
200
4.90
150
100
4.80
50
4.70
-40
0
40
80
0
160
C
Tj
Semiconductor Group
0
10
20
30
40
50
Vj
9
1998-11-01
TLE 4265
Package Outlines
P-TO220-5-1
(Plastic Transistor Single Outline)
10 +0.4
10.2 -0.2
1x45˚
+0.1
1.27
+0.1
2.6
5
15.4 ±0.3
0.4 +0.1
1.7
0.8 +0.1 1)
0.6 M
5x
4.5 ±0.4
8.4 ±0.4
1) 1-0.15 at dam bar (max 1.8 from body)
1) 1-0.15 im Dichtstegbereich (max 1.8 vom Körper)
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
Semiconductor Group
10
GPT05107
1
8.6 ±0.3
10.2 ±0.3
8.8 -0.2
19.5 max
16 ±0.4
2.8
3.75
4.6 -0.2
Dimensions in mm
1998-11-01
TLE 4265
P-TO220-5-2
(Plastic Transistor Single Outline)
10 +0.4
10.2 -0.2
4.6 -0.2
1x45˚
3.75 +0.1
1
5
15.4 ±0.3
12.9 ±0.2
10.9 ±0.2
8.8 -0.2
2.8
1.27
+0.1
0.4 +0.1
1.7
2.6 ±0.15
0.6 M
5x
1) 1-0.15 at dam bar (max 1.8 from body)
1) 1-0.15 im Dichtstegbereich (max 1.8 vom Körper)
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
Semiconductor Group
11
GPT05256
0.8 +0.1 1)
Dimensions in mm
1998-11-01