www.ti.com SLVS346−SEPTEMBER 2003 FEATURES D Ultralow Noise: 60-µVRMS Typical D High PSRR: 65-dB Typical at 1 kHz D Low Dropout Voltage: 280-mV Typical at APPLICATIONS D Optical Drives D Optical Networking D Noise Sensitive Circuitry D GaAs FET Gate Bias D Video Amplifiers 200 mA, 2.5 V D Available in −2.5 V, and Adjustable (−1.2 V to −10 V) Versions D Stable With a 2.2-µF Ceramic Output Capacitor D Less Than 2-µA Typical Quiescent Current in Shutdown Mode D 2% Overall Accuracy (Line, Load, Temperature) D Thermal and Overcurrent Protection D 5-Pin SOT-23 (DBV) Package D −40°C to 125°C Operating Junction Temperature Range DESCRIPTION The TPS723xx family of low-dropout (LDO) negative voltage regulators offers an ideal combination of features to support low noise applications. The devices are capable of operating with input voltages from −10 V to −2.7 V, and supporting outputs from −10 V to −1.2 V. These regulators are stable with small, low-cost ceramic capacitors, and include enable (EN) and noise reduction (NR) functions. Thermal short-circuit and over-current protections are provided by internal detection and shutdown logic. High PSRR (65 dB at 1 k Hz) and low noise (60 µVRMS) make the TPS723xx ideal for low-noise applications. The TPS723xx uses a precision voltage reference to achieve 2% overall accuracy over load, line, and temperature variations. Available in a small SOT23−5 package, the TPS723xx family is fully specified over a temperature range of −40°C to 125°C. DBV PACKAGE (TOP VIEW) TPS72301 TYPICAL APPLICATION CIRCUIT 2 OUT IN 5 +1.5 V GND −1.5 V ON OFF ON GND 1 IN 2 EN 3 5 OUT 4 FB Adjustable Option 3 EN NR DBV PACKAGE (TOP VIEW) TPS723xx 4 GND 1 +1.5 V GND −1.5 V ON GND 1 IN 2 EN 3 5 OUT 4 NR OFF ON Fixed Option Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. !" # $%&" !# '%()$!" *!"&+ *%$"# $ " #'&$$!"# '& ",& "&# &-!# #"%&"# #"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*& "&#"0 !)) '!!&"&#+ Copyright 2003, Texas Instruments Incorporated www.ti.com SLVS346−SEPTEMBER 2003 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION VOLTAGE(1) TJ PACKAGE Variable −1.2 V to −10 V −40°C to 125°C SOT-23 (DBV) PART NUMBER TPS72301DBVT(2) TPS72301DBVR(3) (2) TPS72325DBVT TPS72325DBVR(3) SYMBOL TO8I −2.5 V TO2I (1) Custom output voltages from −1.2 V to −9 V in 100-mV increments are available. Minimum order quantities apply. Contact TI for details and availability. (2) The DBVT indicates tape and reel of 250 parts. (3) The DBVR indicates tape and reel of 3000 parts. ABSOLUTE MAXIMUM RATINGS over operating temperature range (unless otherwise noted)(1)(2) UNITS Input voltage range, VIN −11 V to 0.3 V Enable voltage range, V(EN) −VI to 5 V −11 + VDO Output voltage range, VOUT Output current, IOUT Internally limited Output short-circuit duration Indefinite Continuous total power dissipation, PD See Dissipation Rating Table Junction temperature range, TJ −55°C to 150°C Storage temperature range, Tstg −65°C to 150°C ESD rating, HBM 2 kV (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to network ground terminal. RECOMMENDED OPERATING CONDITIONS MIN Input voltage range, VIN 2 −10 Output voltage range, VOUT −10 + VDO Operating junction temperature, TJ −40 NOM MAX UNIT −2.7 V −1.2 125 V °C www.ti.com SLVS346−SEPTEMBER 2003 ELECTRICAL CHARACTERISTICS over operating junction temperature range, VIN = VOUT(nom) − 0.5 V, IOUT = 1 mA, V(EN) = 1.5 V, COUT = 2.2 µF, C(NR) = 0.01 µF (unless otherwise noted). Typical values are at 25°C PARAMETER TEST CONDITIONS VIN Input voltage range(1) V(FB) Feedback reference voltage TPS72301 Output voltage range TPS72301 Accuracy TPS72325 vs VIN/IOUT/T TPS72301 vs VIN/IOUT/T TJ = 25°C TJ = 25°C −10 V < VIN < VOUT − 0.5 V, 10 µA < IOUT < 200 mA VOUT%/VIN Line regulation −10 V < VIN < VOUT(nom) − 0.5 V VOUT%/IOUT Load regulation 0 mA < IO < 200 mA VDO Dropout voltage at VOUT = 0.96 x VOUT(nom) I(CL) Current limit I(GND) TYP MAX UNIT −2.7 V −1.162 V −10 + VDO V(FB) V −1% 1% −10 Nominal VOUT MIN TPS72325 −1.186 −2% ±1% 2% −3% ±1% 3% IOUT = 200 mA VOUT = 0.85 x VOUT(nom) Ground pin current −1.210 300 0.04 %/V 0.002 %/mA 280 500 mV mA 550 800 IOUT = 0 mA, (IQ) −10 V < VIN < VOUT − 0.5 V 130 200 IOUT = 200 mA, −10 V < VIN < VOUT − 0.5 V 350 500 µA A I(SHDN) Shutdown ground pin current −0.4 V < V(EN) < 0.4 V, −10 V < VIN < VOUT − 0.5 V 0.1 2.0 µA I(FB) Feedback pin current , −10 V < VIN < VOUT − 0.5 V 0.05 1.0 µA PSRR Power supply rejection ratio TPS72325 Vn Output noise voltage TPS72325 t(STR) Startup time VEN(hi) Enable threshold positive VEN(lo) Enable threshold negative −1.5 V VDIS(hi) Disable threshold positive 0.4 V VDIS(lo) Disable threshold negative I(EN) Enable pin current Thermal shutdown temperature TJ IOUT = 200 mA, 1 kHz, CIN = COUT = 10 µF 65 IOUT = 200 mA, 10 kHz, CIN = COUT = 10 µF 48 COUT = 10 µF, 10 Hz = 100 kHz, IOUT = 200 mA 60 µVrms 1 ms dB VOUT = −2.5 V, COUT = 1 µF, RL = 25 Ω 1.5 V −0.4 V −10 V ≤ VIN ≤ V − 0.5 V, −10 V ≤ V(EN) ≤ ±3.5 V 0.1 Shutdown, temperature increasing 165 Reset, temperature decreasing 145 Operating junction temperature −40 2.0 µA °C 125 °C (1) Maximum VIN = VOUT + VDO or − 2.7 V, whichever is more negative. 3 www.ti.com SLVS346−SEPTEMBER 2003 FUNCTIONAL BLOCK DIAGRAM TPS72301 IN EN OUT 100 kΩ Vref 1.19 V Current Limit / Thermal Protection − 5 pF + R1 FB GND R2 R1 + R2 = 97 kW TPS72325 IN EN OUT 100 kΩ Vref 1.19 V − 5 pF + Current Limit / Thermal Protection R1 GND R2 R1 + R2 = 97 kW NR Terminal Functions TERMINAL NAME DESCRIPTION NO. GND 1 Ground VIN 2 Unregulated input supply EN 3 Bipolar enable pin. Driving this pin above the positive enable threshold or below the negative enable threshold turns on the regulator. Driving this pin below the positive disable threshold and above the negative disable threshold puts the regulator into shutdown mode. NR 4 Fixed voltage versions only. Connecting an external capacitor between this pin and ground, bypasses noise generated by the internal bandgap. This allows output noise to be reduced to very low levels. FB 4 Adjustable voltage version only. This is the input to the control loop error amplifier. It is used to set the output voltage of the device VOUT 5 Regulated output voltage. A small 2.2 µF ceramic capacitor is needed from this pin to GND to ensure stability. 4 www.ti.com SLVS346−SEPTEMBER 2003 TYPICAL CHARACTERISTICS (TPS72325 VIN = VOUT(nom) − 0.5 V, IOUT = 1 mA, V(EN) = 1.5 V, COUT = 2.2 µF, C(NR) = 0.01 µF unless otherwise noted) OUTPUT VOLTAGE vs INPUT VOLTAGE −2.475 −2.475 −2.488 VOUT − Output Volatge − V −2.475 VOUT − Output Volatge − V VOUT − Output Volatge − V OUTPUT VOLTAGE vs AMBIENT TEMPERATURE OUTPUT VOLTAGE vs OUTPUT CURRENT −2.488 TJ = 25°C TJ = −40°C −2.500 TJ = 125°C TJ = 25°C −2.500 TJ = 85°C −2.513 TJ = −40°C −2.513 TJ = 125°C −2.525 −10 −2.525 −9 −8 −7 −6 −5 −4 −3 −2 0 50 VIN − Input Voltage − V 100 150 200 VI = 3 V, IO = 200 mA −2.488 VI = 10 V, IO = 200 mA −2.500 VI = 10 V, IO = 0 −2.513 VI = 3 V, IO = 0 −2.525 −40 −20 Figure 1 0 20 Figure 2 TJ = 125°C 250 TJ = 25°C 200 150 TJ = −40°C 50 350 300 300 TJ = 125°C 250 TJ = 25°C 200 150 100 TJ = −40°C 50 0 −7 −6 −5 −4 −3 −2 0 Figure 4 350 250 200 No,Loads Ground Current − µ A Ground Current − µ A 400 450 300 75 100 125 150 175 200 IOUT − Output Current − mA Figure 7 50 0 20 40 60 80 100 120 140 TA − Ambient Temperature − °C GROUND CURRENT vs AMBIENT TEMPERATURE 500 450 TJ = 25°C 300 250 TJ = 125°C 200 150 TJ = −40°C 100 400 VI = 10 V, IO = 200 mA 350 300 250 200 VI = 3 V, IO = 0 150 100 VI = 10 V, IO = 0 50 0 −10 −9 −8 −7 −6 −5 −4 −3 −2 −1 0 VIN − Input Voltage − V 100 Figure 6 50 0 150 0 −40 −20 50 100 50 200 GROUND CURRENT vs OUTPUT CURRENT 500 RL = 12.5 Ω 250 Figure 5 GROUND CURRENT vs INPUT VOLTAGE 350 25 Ground Current − µ A −8 VIN − Input Voltage − V 150 V DO − Dropout Voltage − mV V DO − Dropout Voltage − mV V DO − Dropout Voltage − mV 300 400 DROPOUT VOLTAGE vs AMBIENT TEMPERATURE 350 −9 80 100 120 140 TPS72325 DROPOUT VOLTAGE vs OUTPUT CURRENT 350 0 −10 60 Figure 3 TPS72301 DROPOUT VOLTAGE vs INPUT VOLTAGE 100 40 TA − Ambient Temperature − °C IOUT − Output Current − mA 0 50 100 150 IOUT − Output Current − mA Figure 8 200 0 −40 −20 0 20 40 60 80 100 120 140 TA − Ambient Temperature − °C Figure 9 5 www.ti.com SLVS346−SEPTEMBER 2003 TPS72325 TPS72301 STANDBY CURRENT vs AMBIENT TEMPERATURE CURRENT LIMIT vs AMBIENT TEMPERATURE 800 FEEDBACK PIN CURRENT vs AMBIENT TEMPERATURE 250 200 200 −200 0 Standby Current − nA 700 Current Limit − mA 650 600 550 500 450 VIN = −10 V 150 VIN = −3 V 100 50 400 Standby Current − nA 750 VOUT = −2.5 V −400 −600 −800 VOUT = −1.2 V −1000 −1200 −1400 −1600 −1800 350 300 −40 −20 0 20 40 60 80 0 −40 −20 0 100 120 140 −2000 20 40 60 80 100 120 140 −40 −20 0 20 40 60 80 100 120 140 TA − Ambient Temperature − °C TA − Ambient Temperature − °C TA − Ambient Temperature − °C Figure 10 Figure 11 Figure 12 TPS72301 LINE AND LOAD REGULATION vs AMBIENT TEMPERATURE ENABLE PIN CURRENT vs AMBIENT TEMPERATURE −2 0.25 1000 400 VIN = −10 V, V(EN) −0.5 V 0 −200 VIN = −10 V, V(EN)= 3.5 V −400 −600 0.13 Load 0 Line −0.13 VIN = −10 V, V(EN)= −10 V −800 −40 −20 0 20 40 60 80 −0.25 −40 −20 0 100 120 140 TPS72325 CIN = 2.2 µF COUT= 2.2 µF Cbyp = 0 µF −3.0 −3.5 −4.0 40 60 80 100 120 140 160 180 200 t − Time − µs Figure 16 6 −6 −7 TJ = 125°C −8 −9 −10 −10 100 120 140 −9 −8 CIN = 2.2 µF COUT= 2.2 µF Cbyp = 0 µF 0 0 −100 −200 20 40 60 80 100 120 140 160 180 200 t − Time − µs Figure 17 −6 −5 −4 −3 −2 Figure 15 100 0 −7 VIN − Input Voltage − V TPS72325 LOAD TRANSIENT RESPONSE ∆ V OUT − Change In Output Voltage − V 0 20 80 LOAD TRANSIENT RESPONSE ∆ V OUT − Change In Output Voltage − V 50 −4.5 0 60 −5 TPS72325 LINE TRANSIENT RESPONSE 0 40 TJ = −40°C −4 Figure 14 Current Load − mA V IN − Input Voltage − V V OUT − Output Voltage − mV Figure 13 −50 20 −3 TA − Ambient Temperature − °C TA − Ambient Temperature − °C Current Load − mA 200 Minimum Required Input Voltage − V 600 Line Regulation − %/V Load Regulation − %/mA Enable Pin Current − nA 800 −1000 MINIMUM REQUIRED INPUT VOLTAGE vs OUTPUT VOLTAGE 100 CIN = 2.2 µF COUT= 2.2 µF Cbyp = 0 µF 0 0 −100 −200 0 20 40 60 80 100 120 140 160 180 200 t − Time − µs Figure 18 www.ti.com 0 2 V 0.1 0. 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 2 t − Time − ms V IN − Input Voltage − V − Input Voltage − V V IN 0 0 1 CIN = 2.2 µF, COUT = 2.2 µF, IOUT = 50 mA, Cbyp = 0.01 µF 2 3 −3.5 V 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0 1 2 3 4 5 6 7 8 9 Figure 20 Figure 21 TPS72325 TPS72325 TOTAL NOISE vs C(NR) (10 Hz − 100 kHz) OUTPUT NOISE vs TIME NOISE SPECTRAL DENSITY vs FREQUENCY CIN −2.2 µF COUT = 2.2 µF, IOUT = 100 mA 200 10 µ CIN −2.2 µF, COUT = 2.2 µF, Cbyp = 0.01 µF, IOUT = 100 mA 100 µ V / div COUT = 2.2 µF, IOUT = 25 µA COUT = 10 µF, IOUT = 25 µA 100 Noise Spectral Density − Vrms COUT = 10 µF, IOUT = 100 mA 150 50 0 10 100 1k 10 k IOUT = 25 µA IOUT = 100 mA 1µ 100 n CIN = 0.01 µF , COUT = 2.2 µF, Cbyp = 0.01 µF, 10 n 100 100 k t − Time −1 ms / div C(NR) − pF 10 t − Time − ms TPS72325 250 Total Noise − µ Vrms 1 t − Time − ms Figure 19 1 CIN = 2.2 µF, COUT = 2.2 µF, IOUT = 50 mA, Cbyp = 0 µF 0V 1 OUT CIN= 2.2 µF, COUT = 2.2 µF, IOUT = 50 mA, Cbyp = 0 µF TPS72325 POWERUP-POWERDOWN V IN − Input Voltage − V START-UP RESPONSE TPS72325 START-UP RESPONSE Hz V OUT − Output Voltage − mV TPS72325 V OUT − Output Voltage − mV − Output Voltage − mV SLVS346−SEPTEMBER 2003 1k 100 k 10 k f − Frequency − Hz Figure 22 Figure 23 Figure 24 TPS72325 NOISE SPECTRAL DENSITY vs FREQUENCY Noise Spectral Density − Vrms Hz PSRR − Power Supply Rejection Ratio − dB 10µ IOUT = 100 mA 1µ 100 n 10 n 100 IOUT = 25 µA CIN = 0 µF, COUT = 2.2 µF, Cbyp = 0.01 µF, 1k 10 k 100 k 90 80 70 60 IOUT = 100 mA 50 IOUT = 1 mA 40 30 20 10 0 −10 10 VIN = −5 V, CIN = 10 µF, COUT = 10 µF, Cbyp = 0 100 1k IOUT = 200 mA 10 k 100 k f − Frequency − Hz f − Frequency − Hz Figure 25 Figure 26 1M POWER SUPPLY REJECTION RATIO vs FREQUENCY PSRR − Power Supply Rejection Ratio − dB POWER SUPPLY REJECTION RATIO vs FREQUENCY 90 80 70 IOUT = 1 mA 60 IOUT = 100 mA 50 40 30 20 10 0 −10 10 VIN = −5 V, CIN = 10 µF, COUT = 10 µF, Cbyp = 0.01 100 1k IOUT = 200 mA 10 k 100 k 1M f − Frequency − Hz Figure 27 7 www.ti.com SLVS346−SEPTEMBER 2003 APPLICATION INFORMATION CAPACITOR SELECTION FOR STABILITY DEVICE OPERATION The TPS723xx is a low-dropout negative linear voltage regulator with a rated current of 200 mA. It is offered in trimmed output voltages between −1.5 V and −5.2 V and as an adjustable regulator from −1.2 V to −10 V. It features very low noise and high PSRR making it ideal for high sensitivity analog and RF applications. A shutdown mode is available, reducing ground current to 2 µA maximum over temperature and process. The TPS723xx is offered in a small SOT23 package and is specified over a −40°C to 125°C temperature range. ENABLE The enable pin is active above 1.5 V and below −1.5 V, allowing it to be controlled by a standard TTL signal or by connection to VI if not used. When driven to GND most internal circuitry is turned off, putting the TPS723xx into shutdown mode, drawing 2 µA maximum ground current. The TPS72301 allows designers to specify any output voltage from −10 V to −1.2 V. As shown in the application circuit in Figure 28, an external resistor divider is used to scale the output voltage VO to the reference voltage 1.186 V. For best accuracy, use precision resistors for R1 and R2. 2 IN OUT O ǒ Ǔ + 1.186 1 ) R1 R2 FB EN GND 1 4 R2 Figure 28. TPS72301 Adjustable LDO Regulator Programming 8 Without external bypassing, output noise of the TPS723xx from 10 Hz to 100 kHz is 200 µVRMS typical. The dominant contributor to output noise is the internal bandgap reference. Adding an external 0.01-µF capacitor to ground reduces noise to 60 µVRMS. Best noise performance is achieved using appropriate low ESR capacitors for bypassing noise at the NR and VOUT pins. See the Noise vs COUT plot in the Typical Characteristics section. POWER SUPPLY REJECTION CURRENT LIMIT The TPS723xx has internal circuitry that monitors and limits output current to protect the regulator from damage under all load conditions. When output current reaches the output current limit (550 mA typical), protection circuitry turns on, reducing output voltage to ensure current does not increase. See Current Limit in the Typical Characteristics section. THERMAL PROTECTION 5 R1 3 OUTPUT NOISE The TPS723xx offers a very high power supply rejection ratio (PSRR) for applications with noisy input sources or highly sensitive output supply lines. For best PSRR, use high quality input and output capacitors. ADJUSTABLE VOLTAGE APPLICATIONS V Appropriate input and output capacitors should be used for the intended application. The TPS723xx only requires a 2.2-µF ceramic output capacitor to be used for stable operation. Both the capacitor value and ESR affect stability, output noise, PSRR, and transient response. For typical applications, a 2.2-µF ceramic output capacitor located close to the regulator is sufficient. As protection from damage due to excessive junction temperatures, the TPS723xx has internal protection circuitry. When junction temperature reaches approximately 165°C, the output device is turned off. After the device has cooled by about 20°C, the output device is enabled, allowing normal operation. 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