ETC TQFP48L

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TMPA421DS
Preliminary
www.class-d.com.tw
15W + 6W × 2
Rev.2.0
December 20, 2005
2.1 Channel CLASS-D AUDIO POWER AMPLIFIER
GENERAL DESCRIPTION
FEATURES
The TMPA421DS is a 2.1 Channel Class-D output ♦ Integrated 2.1 channel power amplifier in one
audio power amplifier for driving speakers with
high power efficiency. The bass output is
designed as BTL (Bridge-Tied-Load) for high
chip
♦ 15W + 6W × 2
2.1 Channel Class-D Output
output power. The right& left channels are ♦ Power efficiency is up to 82%
designed as SE (Single-Ended). The outputs are
♦ Convenient gain control
able to drive 4Ω, 6Ω, 8Ω or 16Ω speakers. The
output power can be up to 15W for bass and 6W ♦ Time delay for de-pop control
for either Right or Left channel. No external
heat-sink is necessary.
♦ Thermal Protection
♦ Output Pin Short-Circuit Protection (Short to
The gain of the amplifier is defined by either
gain0/gain1 gain control or by input resistance.
Thermal protection and short-circuit protection
are integrated for safety purpose.
The internal de-pop circuitry eliminates pop
noise at power-up & shutdown operations.
Other Outputs, Short to VCC, Short to Ground)
♦ Low Quiescent Current (10mA Typical at 12V)
♦ Low Current in Shutdown Mode (<1µA Typical)
♦ Separate VCC & PVCC
♦ Regulated 5-V Supply Output
For best performance, please refer to
APPLICATIONS
http://www.taimec.com.tw/English/EVM.htm
TMPA421DS
http://www.class-d.com.tw/English/EVM.htm
is convenient for 2.1 channel
applications. It can be used for LCD Monitors, for PCB layout.
TVs, DVD Players, Powered Speakers or any 2.1
channel power amplifiers.
PACKAGE
TQFP48L available
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TMPA421DS
Preliminary
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Rev.2.0
December 20, 2005
REFERENCE CIRCUIT
BOUT-
BOUT+
C1
C2
1uF
1uF
L5
33uH
L6
33uH
D1
DIODE
D2
PVCC
C22
0.1uF
C23
0.1uF
48
47
46
45
44
43
42
41
40
39
38
37
+
C15
10uF
DIODE
C18(optional) PVCC
1000uF(16V)
+
1
2
3
C5 0.47uF 4
C11 1uF
5
C6 6.8nF 6
C3 6.8nF
7
C12 1uF
8
9
GAINO
10
GAIN1
11
12
SHUT DOWN
BASS INPUT
SD
BINN
BINP
HFVDDB
RIN
LIN
HFVDD
AGND
GAINO
GAIN1
NC
NC
NC
NC
NC
AVCC
NC
NC
AGND
VDDZ
AVDD
HFRC
AGND
NC
421DS
36
35
34
33
32
31
30
29 AVDD
28
27
26
25
VCC
+
C24
0.1uF
C16
10uF
C13 1uF
+
C14 10uF
13
14
15
16
17
18
19
20
21
22
23
24
NC
PV CCL
PV CCL
LO UT
LO UT
PG NDL
PG NDR
ROU T
ROU T
PV CCR
PV CCR
NC
RIGHT INPUT
LEFT INPUT
C4 0.47uF
NC
PVCCB
PVCCB
BOU TN
BOU TN
PGNDB
PGNDB
BOU TP
BOU TP
PVCCB
PVCCB
NC
U1
PVCC
C25
0.1uF
+
C17
10uF
D3
C26
0.1uF
+ C18(optional)
1000uF(16V)
PVCC
PVCC
DIODE
VCC
R12
100
D4
DIODE
L7
33uH
L8
33uH
C7
C8
1uF
1uF
+ C28
47uF
ROUT
+ C29
47uF
LOUT
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Preliminary
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TMPA421DS
Rev.2.0
December 20, 2005
(Please email [email protected] for complete datasheet.)
Tai-1 Microelectronics reserves the right to make corrections, modifications, enhancements, improvements, and other
changes to its products and services at any time and to discontinue any product or service without notice. Customers are
responsible for their products and applications using Tai-1 Microelectronics components.
Note that the external components or PCB layout should be designed not to generate abnormal
voltages to the chip to prevent from latch up which may cause damage to the device.
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TMPA421DS
Preliminary
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Rev.2.0
December 20, 2005
Typical Application
BOUT-
BOUT+
C1
C2
1uF(16V)
1uF(16V)
L5
33uH
L6
33uH
D1
DIODE(optional)
D2
PVCC
C15
+ 10uF(16V)
C22
0.1uF(16V)
PVCC
J1
RIN
R5 12k
R6 22k
PHONEJACKSTEREO
LIN
R10 22k
J4
C10
1nF(6.3V)
C30
1nF(6.3V)
1
switch S1
2
C4 1uF(6.3V)
3
C5 1uF(6.3V)4
C11 1uF(6.3V)
5
C6 6.8nF(6.3V)
6
C3 6.8nF(6.3V)
7
C12 1uF(6.3V)8
9
J2
SWSPST
10
J3
SWSPST
11
12
AVDD
R4
120k
SD
BINN
BINP
HFVDDR
RIN
LIN
HFVDDL
AGND
GAINO
GAIN1
NC
NC
NC
NC
NC
AVCC
NC
NC
AGND
VDDZ
AVDD
HFRC
AGND
NC
421DS
NC
PVCCR
PVCCR
ROUT
ROUT
PGNDR
PGNDL
LOUT
LOUT
PVCCL
PVCCL
NC
SD
NC
PVCCB
PVCCB
BOUTN
BOUTN
PGNDB
PGNDB
BOUTP
BOUTP
PVCCB
PVCCB
NC
U1
C9
33nF(6.3V)
R8 12k
C23
0.1uF(16V)
48
47
46
45
44
43
42
41
40
39
38
37
R9
10k
R7 6k
DIODE(optional)
C18(optional) PVCC
1000uF(25V)
+
36
35
34
33
32
31
30
29
28 AVDD
27
26
25
VCC
C24
0.1uF(16V)
+
C16
10uF(16V)
C13 1uF(6.3V)
C14 10uF(6.3V)
13
14
15
16
17
18
19
20
21
22
23
24
R11 120k
R2 330
R3 330
PVCC
VR
C25
0.1uF(16V)
R1 0
D3
+
C17
10uF(16V)
PVCC
C26
0.1uF(16V)
+
C19(optional)
1000uF(25V)
100
PVCC
DIODE(optional)
L8
33uH
C7
C8
1uF(16V)
1uF(16V)
+
C28
47uF(16V)
ROUT
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D4
DIODE(optional)
L7
33uH
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VCC
R12
+
C29
47uF(16V)
LOUT
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TMPA421DS
Preliminary
Tai-1 Microelectronics
www.class-d.com.tw
Rev.2.0
December 20, 2005
TERMINAL FUNCTIONS
TERMINAL
NAME
HV/LV
I/O
DESCRIPTION
PIN NO
AGND
8,26,30
-
-
AVCC
33
HV
-
AVDD
28
LV
I
5-V voltage
HFVDDB
4
LV
O
2.5-V Reference for convenience of single-ended bass input
HFVDD
7
LV
O
2.5-V Reference for convenience of right and left channel inputs
HFRC
27
LV
O
Power up delay
LIN
6
LV
I
Left channel input
RIN
Analog ground
High-voltage power supply (8V to 15V)
5
LV
I
Right channel input
ROUT
20,21
HV
O
Class-D right channel output
LOUT
16,17
HV
O
Class-D left channel output
PGNDR
19
-
-
Power ground for right channel
PGNDL
18
-
-
Power ground for left channel
PGNDB
42,43
-
-
Power ground for bass
PVCCR
22,23
HV
-
Power supply for right channel
PVCCL
14,15
HV
-
Power supply for left channel
PVCCB
38,39,46,47
HV
-
Power supply for bass
BINP
3
LV
I
BINN
2
LV
I
Negative differential input for bass
BOUTN
44,45
HV
O
Class-D negative output for bass
BOUTP
40,41
HV
O
Class-D positive output for bass
1
HV
I
Shutdown (Low valid)
SD
(8V to 15V)
(8V to 15V)
(8V to 15V)
Positive differential input for bass
GAIN0
9
LV
I
Gain0 control
GAIN1
10
LV
I
Gain1 control
29
LV
O
5-V Regulated output (25mA output max.)
-
-
No connection
VDDZ
11,12,13,24,
NC
25,31,32,34,
35, 36,37,48
ABSOLUTE MAXIMUM RATINGS
Over operating free-air temperature range unless otherwise noted(1)
In normal mode
Supply voltage, PVCCR, PVCCL, AvCC
In shutdown mode
Input voltage, SD
Input voltage, Gain0, Gain1, RIN, LIN, BINP, BINN
Continuous total power dissipation
Operating free-air temperature, TA
-0.3V to 18V
V
-0.3V to 18V
V
-0.3V to AVCC+0.3V
V
-0.3V to 5V
V
See package dissipation ratings
。C
-20 to 85
Operating junction temperature, TJ
-20 to 150
Storage temperature, Tstg
-40 to 150
。C
。C
(1) Stresses beyond those listed under”absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions “is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
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TMPA421DS
Preliminary
Tai-1 Microelectronics
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Rev.2.0
December 20, 2005
RECOMMENDED OPERATING CONDITIONS
MIN
MAX
UNIT
8
15
V
Supply voltage, VCC
PVCCB, PVCCR, PVCCL, AVCC
High-level input voltage, V IH
SD , Gain0, Gain1
Low-level input voltage, V IL
SD , Gain0, Gain1
0.8
VCC=15V, SD =15V
100
High-level input current, IIH
VCC=15V,
Low-level input current, IIL
2.0
V
Gain0=Gain1=5V
V
uA
5
VCC=15V, SD =0V
0.5
VCC=15V,
0.5
Gain0=Gain1=0V
Operating free-air temperature, TA
-20
uA
。C
85
PACKAGE DISSIPATION RATINGS
PACKGE
TQFP48L(FD)
DERATING
TA ≤ 25。C
TA = 70。C
TA = 85。C
FACTOR
POWER RATING
POWER RATING
POWER RATING
33 mW/。C
4.125W
2.64W
2.15W
DC CHARACTERISTICS
T A=25。C, VCC=15V, RL=8Ω speaker (unless otherwise noted)
PARAMETER
│VOS│
VDD/AVDD
HFVDD/HFVDDB
Half VDD reference output
fOSC
Oscillator frequency
ICC
ICC(SD)
rds(on)
Gainb
Gain
TEST CONDITIONS
Output offset voltage for right/left channel LIN and RIN AC grounded
IO=0 to25mA, SD =High,
5-V Regulated output
VCC=8V to 15V
MIN
MAX
30
4.5
5.0
UNIT
mV
5.5
V
350
20
30
kHz
0.5×
AVDD
No load
VCC=8-15V
SD =High, VCC= 12V
Quiescent current (no load)
SD =High, VCC= 15V
SD =0.8V, VCC= 12V
Supply current in shutdown mode
SD =0.8V, VCC= 15V
High side
Drain-source on-state resistance for all VCC=15V
IO=1A,
output
Low side
Gain0=High,
Gain0=Low,
Voltage Gain of bass at Vcc=15V
Gain0=High,
Gain0=Low,
Gain0=High,
Gain0=Low,
Voltage Gain of bass at Vcc=12V
Gain0=High,
Gain0=Low,
Gain0=High,
Gain0=Low,
Voltage Gain of bass at Vcc=9v
Gain0=High,
Gain0=Low,
Gain0=High,
Voltage Gain of right and left channel at Gain0=Low,
Vcc=15V
Gain0=High,
Gain0=Low,
Gain0=High,
Voltage Gain of right and left channel at Gain0=Low,
Vcc=12V
Gain0=High,
Gain0=Low,
Voltage Gain of right and left channel at Gain0=High,
TYP
Gain1= High
Gain1=High
Gain1= Low
Gain1= Low
Gain1= High
Gain1=High
Gain1= Low
Gain1= Low
Gain1= High
Gain1=High
Gain1= Low
Gain1= Low
Gain1= High
Gain1=High
Gain1= Low
Gain1= Low
Gain1= High
Gain1=High
Gain1= Low
Gain1= Low
Gain1= High
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250
10
16
1
1
600
500
34
28
22
18
32
26
20
16
30
25
19
14
35
29
23
19
33
27
21
17
31
mA
uA
mΩ
dB
dB
dB
dB
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Rev.2.0
Vcc=9v
Zi
TMPA421DS
Preliminary
Tai-1 Microelectronics
Gain0=Low,
Gain0=High,
Gain0=Low,
Gain0=High,
Gain0=Low,
Gain0=High,
Gain0=Low,
Input resistance ofBINN/BINP/RIN/LIN
Gain1=High
Gain1= Low
Gain1= Low
Gain1= High
Gain1=High
Gain1= Low
Gain1= Low
December 20, 2005
25
19
15
15
30
60
100
kΩ
AC CHARACTERISTICS
T A=25。C, VCC=15V, RL=8Ω speaker (unless otherwise noted)
PARAMETER
TEST CONDITIONS
12V
10
9V
6.22
15V
14.5
12V
9.3
Maximum continuous output power of
9V
5.34
bass (r.m.s) at 1kHz
15V
12.7
RL=6Ω
RL=8Ω
RL=16Ω
RL=4Ω
*PO(max)
TYP
15
RL=4Ω
*PO(max)
MIN
15V
Maximum continuous output power of
right/left channel (r.m.s) at 1kHz
RL=6Ω
RL=8Ω
Vn
Output noise
SNR
Signal-to-noise ratio
Crosstalk Crosstalk SE→BTL
12V
8
9V
4.58
15V
7.65
12V
4.8
9V
2.73
15V
6
12V
3.8
9V
2.17
15V
4.6
12V
3.0
9V
1.67
15V
3.75
12V
2.35
9V
1.34
Maximum output at THD+N<0.5%,
f=1kHz
Gain0=Gain1=high, VCC=12V,
PO(SE)=2W, RL=8Ω
Thermal trip point
Thermal hysteresis
MAX
UNIT
W
W
W
W
W
W
W
-70
dBV
85
dB
-70
dB
145
。C
。C
25
For best performance, please refer to
http://www.taimec.com.tw/data/Tmpa421EVM/tmpa421dsEVM.pdf
for PCB layout.
*Important notice:More copper area and vias are required for high output power especially
when the total output power is higher than 15W.
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TMPA421DS
Rev.2.0
December 20, 2005
DETAILED DESCRIPTION
Efficiency
The output transistors of a class D amplifier act as switches. The power loss is mainly due to
the turn on resistance of the output transistors when driving current to the load. As the turn on
resistance is so small that the power loss is small and the power efficiency is high. With 8 ohm
load the power efficiency can be better than 80%.
PCB layout for power dissipation
No heat sink is necessary for power dissipation. However the PCB layout should be well
designed to dissipate heat for high output power. With 80% power efficiency the generated
heat when driving 15 watts to the 8 ohm load is about 3.75 watts. The heat can be carried out
through the thermal pad of the device to the PCB. To ensure proper dissipation of heat the
PCB has to have heat path from the bottom of the device which is soldered to the PCB. The
area of the metal on the PCB for heat dissipation should be big enough. It is suggested that
both sides of the PCB are used for power dissipation.
Shutdown
The shutdown mode reduces power consumption. A LOW at shutdown pin forces the device in
shutdown mode and a HIGH forces the device in normal operating mode. Shutdown mode is
useful for power saving when not in use. Internal circuit for shutdown is shown below.
Pop-less
A soft start capacitor can be added to the HFRC pin. This capacitor introduced delay for the
circuit to be stable before driving the load. The set up time for internal circuit to be stable is
quite fast, typically it is less than 100ms. Thus the pop noise caused by SDNB operation can
be fixed easily. But for external circuitry the setup time depends on the component values used
in the application.
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TMPA421DS
Rev.2.0
December 20, 2005
Class-D amplifier
+
47uF
+
13k
13k
PVCC
For single-ended outputs or right/left channels a build-in voltage divider is to provide half Vcc
to the output pin as shown in the above diagram. During power up this divider is to pre-charge
output capacitor to half Vcc before output signal is enabled to drive the speaker. Since the
equivalent resistance of the voltage divider is 6.5k ohms (13kohms//13kohms) and the
capacitance of the output coupling capacitor is 47uF the RC constant is 0.3 seconds. This
indicates that the power up delay has to be much longer than 0.3 seconds. Normally
a capacitor of 10uF at HFRC pin would provide 2.2 seconds start up delay to save power up
pop noise.
Above discussion assumes that the separation frequency is 500Hz and the speaker is 8 ohms.
If the separation frequency is 200Hz and the speaker is 4 ohms instead then the output
coupling capacitance would be changed to 200uF as calculated below.
f =1 / (2π x 4 ohms x C) = 200 Hz
C = 1 / (2πx 4 ohms x 200 Hz ) = 200 uF
In this case the RC constant of the charging circuit is 6.5 k ohms x 200uF = 1.3 seconds
To save pop noise the start up delay time should be much longer than 1.3 seconds. A
capacitance of 47 uF would provide 9.4 seconds delay.
For frequency separation please refer to “Band pass filter for frequency separation of bass and
R/L channels”.
HFRC
HFRC provides a way of soft start up delay. A half_Vcc voltage detector is integrated to detect
a RC charge up. The resistor of 320k ohms of the RC circuit is also integrated in the chip but
the capacitor is externally hooked up. For C=10uF the half_Vcc delay is
1-e-t/RC=0.5
or
e-t/RC=0.5
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TMPA421DS
Rev.2.0
December 20, 2005
that is
t = - RC In(0.5)= (320k × 10u)
(0.693) = 2.2 seconds
The delay time changes linearly with capacitance at HFRC. So a 10uF capacitance will provide
about 2.2 seconds delay.
Differential input VS single ended input
Differential input offers better noise immunity over single ended input. A differential input
amplifier suppresses common noise and amplifies the difference voltage at the inputs. For
single ended applications just tie the negative input end of the balanced input structure to
ground. If external input resistors are used, the negative input has to be grounded with a
series resistor of the same value as the positive input to reduce common noise.
Band pass filter for frequency separation of bass and R/L channels
For best sound effect the frequency of bass and R/L channels has to be separated. The bass
channel amplifies the lower frequencies while the R/L channels amplify the higher frequencies.
The power is saved not to drive bass speaker with high frequencies and not to drive R/L
channel speakers with low frequencies. The noise level can be reduced as well. Typically the
frequency boundary of bass and R/L channels is set 500 Hz and the output power of bass is
set around 3~5 times of the R/L channels. Note that different applications may have different
requirement for these values. Please refer to EVM documentation if the separation frequency
is 200 Hz instead.
Bass channel filter
If the audio source is stereo (right channel signal and left channel signal) one can generate
audio source for bass amplifier by mixing right and left signals and in the mean time filter out
frequencies above 500 Hz. A typical application is shown below. Note that Zin=15k ohms is the
internal resistance of the class-D amplifier when gain0=gain1=High.
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TMPA421DS
Preliminary
Tai-1 Microelectronics
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Rev.2.0
Rin
R1 12k
Lin
R1
December 20, 2005
Cin
12k
0.47uF
C1
37nF
(R1)/2 12k//12k
Zin
15k
Class-D amplifier
Cin
0.47uF
Zin
15k
The -3db frequency at high frequency corner is f-3db = 1/ (2πR C) where R=2(Zin // (R1)/2)
and C=C1. With specified values f-3db = 500Hz.
The -3db frequency at low frequency corner is calculated as f-3db = 1/ (2πR C) where R=Zin
+ (R1)/2
and C=Cin. With specified values f-3db = 16Hz.
Right and Left channel filters
To block frequencies below 500Hz, a typical application is shown below.
Rin
Lin
R1
C1
22k
R1 22k
C2 8.6nF
0.9nF
C1
Zin
C2 8.6nF
0.9nF
Zin
15k
Class-Damplifier
15k
The -3db frequency at low frequency corner is f-3db = 1/ (2πR C) where R=Zin + R1 and
C=C1. With specified values f-3db = 500Hz.
The -3db frequency at high frequency corner is f-3db = 1/ (2πR C) where R=Zin // R1
and
C=C2. With specified values f-3db = 20kHz.
Note that if gain0 and gain1 are set at different states the internal input resistance is changed
accordingly. Please refer to DC CHARACTERISTICS for detail. As such the filters should be
redesigned to meet the 500 Hz frequency boundary.
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TMPA421DS
Preliminary
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Rev.2.0
December 20, 2005
Voltage gain
The voltage gain can be set through gain0/gain1 control or by external input resistors
connecting to input pins. If external resistors are used for BINP and BINN of bass channel then
these input resistors should be well matched. Well matched resistors are also required even
for single ended input configuration for low noise. Suppose the external input resistors Rext
are used then the voltage gain is roughly
Av=750k ohm / (Rext+15k ohm) for gain0=gain1=High
Where 15k ohm is the internal resistance of the input pins. For other gain0/gain1 states please
refer to DC CHARACTERISTICS for different input resistance.
Power ratio of bass channel and right/left channels
The output power ratio of bass to R/L channels is normally set 3~5. However different music
has different stress in different frequency range. It becomes difficult to define a fix voltage gain
for different applications and to maintain the requirement of bass to R/L ratio. A convenient way
of controlling the ratio is to make bass adjustable relative to R/L channels. An easier way is to
use VR as shown below.
Rin
VR
R1 12k
Lin
VR
R1
12k
Cin
BINP
0.47uF
Cin
6k
Zin
BINN
0.47uF
Zin
Bass amplifier
Another way is to use frequency synthesizer to preset voltage gain for different frequency
range for particular music content.
For simply applications an example is given below to show 3X ratio between bass output
power and R/L output power.
For Vcc=15v and 8ohm load the voltage gain of the bass channel is around 32. If the power
3 =1.732 and the gain of the R/L channel is 18.5. The
voltage gain of the R/L channels is roughly defined as
ratio is 3 then the voltage ratio is
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(750k ohms)/(Ri+15k ohms)
resulting Ri= 25.5k ohms.
To meet the -3db frequency of the R/L channels which is 500Hz, the filter capacitance should
be adjusted to
C= 1/(2π x (25.5k+15k ohms) x 500Hz) = 7.86nF.
For higher output power one can consider to use 4 ohm speaker for bass and 8 ohm
speakers for R/L channels. Suppose the power ratio is set 5X, then the voltage ratio is
5 / 2 =1.58. For Vcc=15v and 4ohm load the voltage gain of the bass channel is around 30.
Thus the gain of the R/L channel is 19.
The voltage gain of the R/L channels is defined as
(750k ohms)/(Ri+15k ohms)
resulting Ri= 24.5kohms .
To meet the -3db frequency of the R/L channels which is 500Hz, the filter capacitance should
be adjusted to
C= 1/(2π x (24.5+15k ohms) x 500) = 8nF.
Note that the formula for voltage gain varies with supply voltage and loading. But the
procedure is to find out the value of Ri before the capacitance is determined.
Output coupling capacitor
The speaker of the bass channel is tied as BTL. There is no need to have an output capacitor
at the output end. But for right and left channels coupling capacitors are required to
block DC from the speakers. Since the right and left channels do not amplify frequencies
below 500Hz the output coupling capacitance does not have to be big. One can choose the
-3db frequency of the output coupling stage to be 200Hz, not too high to attenuate voltage at
500Hz, then the coupling capacitance is
C= 1/(2πx 8 ohm x 200Hz) =100uF for 8 ohm load.
or
C= 1/(2πx 4 ohm x 200Hz) =200uF for 4 ohm load.
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TMPA421DS
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Input filter
In case band pass filter for frequency separation of bass and R/L channels is not used, the AC
coupling capacitors are still required to block the DC voltage from the device. They also define
the –3db frequency at the low frequency side.
The –3db frequency of the low frequency side is
f-3db = 1/ (2πR C)
where C is the AC coupling capacitance and R is the total resistance in series with C.
Note that R=Zin(internal resistance) + Rext(external resistance)
Also note that the input resistance of BINN/BINP/LIN/RIN is 15K ohms at Gain0=Gain1=high.
Please refer to DC CHARACTERISTICS for detail.
Output filter
Ferrite bead filter can be used for EMI purpose. The ferrite filter reduces EMI around 1 MHz
and higher(FCC and CE only test radiated emissions greater than 30 MHz). When selecting a
ferrite bead, choose one with high impedance at high frequencies, but low impedance at low
frequencies.
Use an LC output filter if there are low frequency(<1 MHz)EMI sensitive circuits and/or there
are long wires from the amplifier to the speaker. EMI is also affected by PCB layout and the
placement of the surrounding components.
For BTL output the suggested LC values for different speaker impendence are showed in
following figures.
LC Output Filter, Speaker Impedance= 4Ω
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TMPA421DS
Rev.2.0
December 20, 2005
LC Output Filter, Speaker Impedance=6Ω & 8Ω
15μH
Vo+
0.22μ F
15μH
1μ F
Vo0.22μ F
LC Output Filter, Speaker Impedance=4Ω
33μH
Vo+
0.47μ F
0.1μ F
33μH
Vo0.1μ F
LC Output Filter, Speaker Impedance=6Ω & 8Ω
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TMPA421DS
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December 20, 2005
Ferrite
Chip Bead
Vo+
Ferrite
Chip Bead
100pF
Vo100pF
Typical Ferrite Chip Bead Filter
(Chip bead example:遠越科技 KML2012Q102N
1kohms@100MHz, DCR=0.2ohms, I=1A)
For single-ended output the suggested LC values for different speaker impendence are
showed in following figures.
LC Output Filter, Speaker Impedance= 4Ω
LC Output Filter, Speaker Impedance= 6Ω & 8Ω
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TMPA421DS
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Typical Ferrite Chip Bead Filter
(Chip bead example:遠越科技 KML2012Q102N
1kohms@100MHz, DCR=0.2ohms, I=1A)
EARPHONE USE
Class-D output can be used to drive earphone. However to avoid high power to overdrive
earphone and to prevent human ear to accidentally be hurt by loud noise, a resistor has to be
put in series with the earphone speaker. Typically a resistor of 330 ohms is adequate for this
purpose.
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Over temperature protection
A temperature sensor is built in the device to detect the temperature inside the device. When
a high temperature around 145oC and above is detected the switching output signals are
disabled to protect the device from over temperature. Automatic recovery circuit enables the
device to come back to normal operation when the internal temperature of the device is below
around 120oC.
Over current protection
A current detection circuit is built in the device to detect the switching current of the output
stages of the device. It disables the device when a pulse current beyond 8 amps is detected. It
protects the device when there is an accident short between outputs or between output and
power/gnd pins. It also protects the device when an abnormal low impedance is tied to the
output. High current beyond the specification may potentially causes electron migration and
permanently damage the device. Shutdown or power down is necessary to resolve the
protection situation. There is no automatic recovery from over current protection.
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Rev.2.0
Physical Dimensions
SYMBOLS
A
A1
A2
b
C
D1
D
E1
E
e
L
L1
ccc
MIN.
0.00
0.95
0.17
0.09
6.90
8.80
6.90
8.80
0.45
-
December 20, 2005
( IN MILLIMETERS)
NDM.
1.00
0.22
7.00
9.00
7.00
9.00
0.50(TYP)
0.60
1.00(REF)
-
MAX.
1.15
0.10
1.05
0.27
0.20
7.10
9.20
7.10
9.20
0.75
0.08
TQFP48
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TMPA421DS
Rev.2.0
December 20, 2005
IMPORTANT NOTICE
Tai-1 Microelectronics Corp. reserves the right to make changes to its products and services and to
discontinue any product or service without notice. Customers should obtain the latest relevant information for
reference. Testing and quality control techniques are used to screen the parameters. Testing of all
parameters of each product is not necessarily performed.
Tai-1 Microelectronics Corp. assumes no liability for applications assistance or customer product design. To
minimize the risks associated with customer products and applications, customers should provide adequate
design and operating safeguards.
Reproduction of information in data sheets or related documentation is permissible only if reproduction is
without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Tai-1
Microelectronics Corp. is not responsible or liable for such altered documentation.
Resale of Tai-1 Microelectronics Corp. products or services with statements different from the parameters
stated by Tai-1 Microelectronics Corp. for that product or service voids all express and any implied warranties.
Tai-1 Microelectronics Corp. is not responsible or liable for any such statements.
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