TOUCHSTONE TS3004

TS3004
A 1.55V to 5.25V, 1.9µA, 3.3µs to 233s Silicon Timer
FEATURES
DESCRIPTION
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The TS3004 is a single-supply, second-generation
Touchstone Semi oscillator/timer fully specified to
operate at a supply voltage range of 1.55V to 5.25V
while consuming less than 2.4μA(max) supply
current. Requiring only a resistor to set the base
output frequency (or output period) at 25kHz (or
40µs) with a 50% duty cycle, the TS3004
timer/oscillator is compact, easy-to-use, and versatile.
Optimized for ultra-long life, low frequency,
battery-powered/portable applications, the TS3004
joins the TS3001, TS3002, TS3003 and TS3006 in
Touchstone’s CMOS timer family in its “NanoWatt
Analog™” series of high-performance analog
integrated circuits.
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Ultra Low Supply Current: 1.9μA at 25kHz
Supply Voltage Operation: 1.55V to 5.25V
Single Resistor Sets FOUT at 50% Duty Cycle
3-pin User-Programmable FOUT Period:
 3.3µs ≤ tFOUT ≤ 233s
FOUT Period Accuracy: 3%
FOUT Period Drift: 0.02%/ºC
Single Resistor Sets Output Frequency
Separate PWM Control and Buffered Output
FOUT/PWMOUT Output Driver Resistance:
160Ω
The TS3004 output period can be user-adjusted from
3.3µs to 233s without additional components. In
addition, the TS3004 represents a 25% reduction in
pcb area and a factor-of-10 lower power consumption
over
other
CMOS-based
integrated
circuit
oscillators/timers. When compared against industrystandard 555-timer-based products, the TS3004
offers up to 84% reduction in pcb area and over three
orders of magnitude lower power consumption.
APPLICATIONS
Portable and Battery-Powered Equipment
Low-Parts-Count Nanopower Oscillator
Compact Micropower Replacement for Crystal and
Ceramic Oscillators
Micropower Pulse-width Modulation Control
Micropower Pulse-position Modulation Control
Micropower Clock Generation
Micropower Sequential Timing
The TS3004 is fully specified over the -40°C to +85°C
temperature range and is available in a low-profile,
10-pin 3x3mm TDFN package with an exposed
back-side paddle.
TYPICAL APPLICATION CIRCUIT
TS3004 Flashing Railroad Lights Circuit
The Touchstone Semiconductor logo and “NanoWatt Analog” are
registered trademarks of Touchstone Semiconductor, Incorporated.
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© 2013 Touchstone Semiconductor, Inc. All rights reserved.
TS3004
ABSOLUTE MAXIMUM RATINGS
VDD to GND............................................................... -0.3V to +5.5V
PWM_CNTRL to GND .............................................. -0.3V to +5.5V
FOUT, PWMOUT to GND......................................... -0.3V to +5.5V
RSET to GND ........................................................... -0.3V to +2.5V
CPWM to GND ......................................................... -0.3V to +5.5V
FDIV to GND ............................................................ -0.3V to +5.5V
Continuous Power Dissipation (TA = +70°C)
10-Pin TDFN (Derate at 13.48mW/°C above +70°C) ... 1078mW
Operating Temperature Range ................................ -40°C to +85°C
Storage Temperature Range ................................. -65°C to +150°C
Lead Temperature (Soldering, 10s) ..................................... +300°C
Electrical and thermal stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These
are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections
of the specifications is not implied. Exposure to any absolute maximum rating conditions for extended periods may affect device reliability and
lifetime.
PACKAGE/ORDERING INFORMATION
ORDER NUMBER
PART
CARRIER QUANTITY
MARKING
TS3004ITD1033TP
Tape
& Reel
-----
Tape
& Reel
3000
3004I
TS3004ITD1033T
Lead-free Program: Touchstone Semiconductor supplies only lead-free packaging.
Consult Touchstone Semiconductor for products specified with wider operating temperature ranges.
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TS3004
ELECTRICAL CHARACTERISTICS
VDD = 3V, VPWM_CNTRL= VDD, RSET = 4.32MΩ, RLOAD(FOUT) = Open Circuit, CLOAD(FOUT) = 0pF, CLOAD(PWM) = 0pF, CPWM = 47pF, FDIV2:0 = 000 unless
otherwise noted. Values are at TA = 25°C unless otherwise noted. See Note 1.
PARAMETER
Supply Voltage
SYMBOL
VDD
CONDITIONS
CPWM = VDD
Supply Current
IDD
MIN
1.55
TYP
1.9
-40°C ≤ TA ≤ 85°C
3.3
-40°C ≤ TA ≤ 85°C
FOUT Period
FOUT Period Line
Regulation
tFOUT
ΔtFOUT/V
-40°C ≤ TA ≤ 85°C
1.55V ≤ VDD ≤ 5.25V
49
ΔtFOUT/ΔT
PWMOUT Duty Cycle
DC(PWMOUT)
PWMOUT Duty Cycle
Line Regulation
ΔDC(PWMOUT)/V
CPWM Sourcing Current
ICPWM
UVLO Hysteresis
FOUT, PWMOUT
Rise Time
FOUT, PWMOUT
Fall Time
VUVLO
FDIV Input Current
37
15
51
1.55V < VDD < 5.25V, FDIV2:0 = 000
FDIV2:0 = 000, 001
FDIV2:0 000, 001
(VDD=1.55V) – (VDD_SHUTDOWN VOLTAGE)
41.6
930
810
48
24
%
%
%
1050
1150
97
150
µs
%/°C
-3
-40°C ≤ TA ≤ 85°C
µA
%/V
0.02
VPWM_CNTRL= 0V
UNITS
V
250
nA
nA
mV
tRISE
See Note 2, CL = 15pF
10
ns
tFALL
See Note 2, CL = 15pF
10
ns
0.001
%
FOUT Jitter
RSET Pin Voltage
40.1
0.17
FOUT Duty cycle
FOUT Period
Temperature
Coefficient
39
38
MAX
5.25
2.4
2.7
3.6
4.5
41.2
42
See Note 3
V(RSET)
IFDIV
0.3
V
10
nA
-40°C ≤ TA ≤ 85°C
20
Maximum Oscillator
Fosc
RSET= 360K
300
kHz
Frequency
High Level Output
Voltage, FOUT and
VDD - VOH
IOH = 1mA
160
mV
PWMOUT
Low Level Output
Voltage, FOUT and
VOL
IOL = 1mA
140
mV
PWMOUT
Dead Time
TDT
FOUT edge falling and PWMOUT edge rising
106
ns
Note 1: All devices are 100% production tested at TA = +25°C and are guaranteed by characterization for TA = TMIN to TMAX, as specified.
Note 2: Output rise and fall times are measured between the 10% and 90% of the V DD power-supply voltage levels. The specification is based
on lab bench characterization and is not tested in production.
Note 3: Timing jitter is the ratio of the peak-to-peak variation of the period to the mean of the period. The specification is based on lab bench
characterization and is not tested in production.
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TS3004
TYPICAL PERFORMANCE CHARACTERISTICS
VDD = 3V, VPWM_CNTRL= VDD, RSET = 4.32MΩ, RLOAD(FOUT) = Open Circuit, CLOAD(FOUT) = 0pF, CLOAD(PWM) = 0pF, CPWM = VDD, FDIV2:0 = 000
unless otherwise noted. Values are at TA = 25°C unless otherwise noted.
FOUT Period vs Temperature
Supply Current vs FOUT Period
14
41
40.5
10
PERIOD - µs
SUPPLY CURRENT - µA
12
8
6
4
39.5
2
0
39
0
20
40
60
80
100
-40
35
60
Supply Current vs CLOAD(FOUT)
Supply Current vs Temperature
85
2.5
SUPPLY CURRENT - µA
SUPPLY CURRENT - µA
10
TEMPERATURE - ºC
6
4
2
2.3
2.1
1.9
1.7
0
0
10
20
30
40
-40
10
35
60
TEMPERATURE - ºC
FOUT Period vs Supply Voltage
Start-up Time vs Supply Voltage
85
START-UP TIME - ms
11
40.18
40.16
40.14
40.12
40.1
1.55
-15
CLOAD- pF
40.2
10
9
8
7
6
5
2.29
3.03
3.77
4.51
SUPPLY VOLTAGE - Volt
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-15
PERIOD - µs
8
PERIOD - µs
40
5.25
1.55
2.29
3.03
3.77
4.51
5.25
SUPPLY VOLTAGE - Volt
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TS3004
TYPICAL PERFORMANCE CHARACTERISTICS
VDD = 3V, VPWM_CNTRL= VDD, RSET = 4.32MΩ, RLOAD(FOUT) = Open Circuit, CLOAD(FOUT) = 0pF, CLOAD(PWM) = 0pF, CPWM = VDD, FDIV2:0 = 000
unless otherwise noted. Values are at TA = 25°C unless otherwise noted.
Supply Current Distribution
120
35%
100
30%
PERCENT OF UNITS - %
PERIOD - µs
Period vs RSET
80
60
40
20
0
25%
20%
15%
10%
5%
0%
0
2
4
6
8
10
12
1.95
RSET - MΩ
1.97
1.99
2.01
SUPPLY CURRENT - µA
FOUT
VDD = 5V, CLOAD = 15pF
FOUT
1V/DIV
FOUT
1V/DIV
FOUT
VDD = 3V, CLOAD = 15pF
FOUT and PWMOUT
VDD = 3V, CLOAD = 15pF, VPWM_CNTRL= VDD, CPWM = 47pF
FOUT and PWMOUT
VDD = 5V, CLOAD = 15pF, VPWM_CNTRL= VDD, CPWM = 47pF
PWMOUT
2V/DIV
PWMOUT
2V/DIV
FOUT
2V/DIV
5µs/DIV
FOUT
2V/DIV
5µs/DIV
5µs/DIV
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5µs/DIV
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TS3004
PIN FUNCTIONS
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PIN
NAME
1
FOUT
2,3,4
FDIV2:0
5
PWMOUT
6
PWM_CNTRL
7
GND
8
CPWM
9
VDD
10
RSET
FUNCTION
Fixed Frequency Output. A push-pull output stage with an
output resistance of 160Ω. FOUT pin swings from GND to
VDD. For lowest power operation, capacitance loads should
be minimized and resistive loads should be maximized.
Frequency Divider Input. Various combinations of these
inputs will change the FOUT frequency for a fixed value of
RSET. Refer to Table 1.
Pulse-width Modulated Output. A push-pull output stage with
an output resistance of 160Ω, the PWMOUT pin is wired
anti-phase with respect to FOUT and swings from GND to
VDD. For lowest power operation, capacitance loads should
be minimized and resistive loads should be maximized.
PWM Output Pulse Control Pin. Applying a voltage between
GND and VRSET will reduce the duty cycle of the PWMOUT
output that is set by the capacitor connected to the CPWM
pin. Connect PWM_CNTRL to VDD for fixed PWMOUT
output pulse time (determined only by capacitor at CPWM).
Ground. Connect this pin to the system’s analog ground
plane.
PWMOUT Pulse Width Programming Capacitance Input. A
target capacitance connected from this pin to GND sets the
duty cycle of the PMW output. Minimize any stray
capacitance on this pin. The voltage on this pin will swing
from GND to VRSET. Connect CPWM to VDD to disable PWM
function (saves PWM current).
Power Supply Voltage Input. The supply voltage range is
1.55V ≤ VDD ≤ 5.25V. Bypass this pin with a 0.1uF ceramic
coupling capacitor in close proximity to the TS3004.
FOUT Programming Resistor Input. A 4.32MOhm resistor
connected from this pin to ground sets the T3004’s internal
oscillator’s output period to 40µs (25KHz). For optimal
performance, the composition of the RSET resistor shall be
consistent with a tolerance of 1% or lower. The RSET pin
voltage is approximately 0.3V.
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TS3004
BLOCK DIAGRAM
FDIV
tFOUT(s)
FOUT (Hz)
ICPWM (A)
2:0
000
3.3µ-111.1µs
300k-9k
1µ
001
26.4µ-888.88µs
37.5k-1.125k
1µ
010
211.2µ-7.11ms
4.69k-140.62
100n
011
1.7ms-56.88ms
586-17.578
100n
100
13.6ms-455.16ms
73.25-2.197
100n
101
108.8ms-3.64
9.16-0.2746
100n
110
870.4ms-29.15
1.14-0.0343
100n
111
6.99-233
0.143-0.00429
100n
Table 1: FOUT and PWMOUT Frequency Range per FDIV2:0 Combination
THEORY OF OPERATION
The TS3004 is a user-programmable oscillator where
the period of the square wave at its FOUT terminal is
generated by an external resistor connected to the
RSET pin. The output period is given by:
t
O T
s =
8
V2 0
x RS T
1.08 11
Equation 1. FOUT Frequency Calculation where
FDIV2:0 = 0 to 7
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RSET (MΩ)
tFOUT(s)
0.360
6.99
1
19.42
2.49
48.35
4.32
83.89
6.81
132.27
9.76
189.39
12
233
Table 2: tFOUT vs RSET for FDIV2:0 = 111(7)
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TS3004
With an RSET = 4.32MΩ and FDIV2:0=111, the FOUT
period is approximately 83.89s with a 50% duty cycle.
As design aids, Tables 2 lists TS3004’s typical O T
period for various standard values for RSET and
FDIV2:0 = 111(7).
The output period can be user-adjusted from 3.3µs to
233s without additional components. Frequency
divider inputs FDIV2:0 can be set to a logic state
HIGH or LOW in order to set the desired frequency
as shown in to Table 1.
The TS3004 also provides a separate PWM output
signal at its PWMOUT terminal that is anti-phase with
respect to FOUT. A dead time of approximately
106ns exists between FOUT and PWMOUT. To
adjust the pulse width of the PWMOUT output, a
single capacitor can be placed at the CPWM pin. To
determine the capacitance needed for a desired
pulse width, the following equation is to be used:
C WM
=
ulse Width s x C WM
VC WM 300mV
Connect CPWM to VDD to disable the PWM function
and in turn, save power. Connect PWM_CNTRL to
VDD for a fixed PWMOUT output pulse width, which
is determined by the CPWM pin capacitor only.
APPLICATIONS INFORMATION
Minimizing Power Consumption
To keep the TS3004’s power consumption low,
resistive loads at the FOUT and PWMOUT terminals
increase dc power consumption and therefore should
be as large as possible. Capacitive loads at the
FOUT and PWMOUT terminals increase the
TS3004’s transient power consumption and, as well,
should be as small as possible.
One challenge to minimizing the TS3004’s transient
power consumption is the probe capacitance of
oscilloscopes and frequency counter instruments.
Most instruments exhibit an input capacitance of
15pF or more. Unless buffered, the increase in
transient load current can be as much as 400nA.
Equation 2. CPWM Capacitor Calculation
where ICPWM and VCPWM is the current supplied and
voltage applied to the CPWM capacitor, respectively.
The pulse width is determined based on the period of
FOUT and should never be greater than the period at
FOUT. Make sure the PWM_CNTRL pin is set to at
least 400mV when calculating the pulse width of
PWMOUT. Note VCPWM is approximately 300mV,
which is the RSET voltage. Also note that I CPWM is
either 1µA or 100nA. Refer to Table 1.
The PWMOUT output pulse width can be adjusted
further after selecting a CPWM capacitor. This can be
achieved by applying a voltage to the PWM_CNTRL
pin between VRSET and GND. With a voltage of at
least VRSET, the pulse width is set based on Equation
2. For example, with a period of 40µs( 25kHz) a 47pF
capacitor at the CPWM pin generates a pulse width
of approximately 16µs. This can be calculated using
equation 2. By reducing the PWM_CNTRL voltage
from VRSET
300mV to GND, the pulse width is
reduced from 16µs to approximately 8µs. This is a
pulse width reduction of 50%. Note that as the FOUT
frequency increases, the amount of pulse width
reduction reduces and vice versa. Furthermore, if the
PWMOUT output is half the frequency of the FOUT
output, this means your CPWM capacitor is too large
and as a result, the pulse width is greater than the
FOUT period. In this case, use Equation 2 and
reduce the capacitor value to less than the period.
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Figure 1: Using an External Capacitor in Series with
Probes Reduces Effective Capacitive Load.
To minimize capacitive loading, the technique shown
in Figure 1 can be used. In this circuit, the principle of
series-connected capacitors can be used to reduce
the effective capacitive load at the TS3004’s O T
and PWMOUT terminals.
To determine the optimal value for CEXT once the
probe capacitance is known by simply solving for
CEXT using the following expression:
C
T
1
=
1
C
OA
1
C
RO
Equation 3:External Capacitor Calculation
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TS3004
or example, if the instrument’s input probe
capacitance is 15pF and the desired effective load
capacitance at either or both FOUT and PWMOUT
terminals is to be ≤5p , then the value of CEXT should
be ≤7.5p .
TS3004 Start-up Time
As the TS3004 is powered up, its FOUT terminal
(and PWMOUT terminal, if enabled) is active once
the applied VDD is higher than 1.55V. Once the
applied VDD is higher than 1.55V, the master
oscillator achieves steady-state operation within 8ms.
Figure 2: 2 Weeks and 2 Days Counter Circuit
2 Weeks and 2 Days Counter Circuit with TS3004
The TS3004 can be configured into a 2 Weeks and 2
Days counter as shown in Figure 2. The circuit is
composed of a TS3004 timer and three dual
74VHC393 4-bit counters. The TS3004 divider inputs
are set to FDIV2:0 = 111. With an RS T of 4.32MΩ,
the FOUT period is approximately 1.4 minutes. The
complete circuit consumes approximately 11µA and
is powered with a single 3V CR2032 lithium button
cell battery. If a longer period is desired, a sixth
counter is available in the third 74VHC393.
Divide the PWMOUT Output Frequency by Two
with the TS3004
Using a single resistor and capacitor, the TS3004 can
be configured to a divide by two circuit as shown in
Figure 3. To achieve a divide by two function with the
TS3004, the pulse width of the PWMOUT output
must be at least a factor of 2 greater than the period
set at FOUT by resistor RSET. The CPWM capacitor
selected must meet this pulse width requirement and
can be calculated using Equation 2. In Figure 3, a
value of 4.32MΩ for RS T sets the O T output
period to 40µs. A CPWM capacitor of 265pF was
chosen, which sets the pulse width of PWMOUT to
Figure 3: Configuring the TS3004 into a Divide by
Two Frequency Divider
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TS3004
approximately 80µs. This is well above the required
minimum pulse width of 40µs.
Using the TS3004 and a Potentiometer to Dim an
LED
Flashing Railroad Lights with the TS3004
The TS3004 can be configured to dim an LED by
modulating the pulse width of the PWMOUT output.
With the input divider set to FDIV2:0 = 011 and
RSET= 2MΩ, the
O T output frequency is
approximately 100Hz (or 10ms period). Refer to
Figure 5. The CPWM capacitor was calculated using
Equation 2 with a pulse width of 8.1ms. To reduce
the pulse width from 8.1ms and in turn, dim the LED,
a 1MΩ potentiometer is used. The potentiometer is
connected to the PWM_CNTRL pin in a voltage
divider configuration. The supply voltage of the circuit
is 5V.
With only three resistors and two off the shelf LEDs,
the TS3004 can be configured into a flashing railroad
lights circuit. With the input divider set to
FDIV2:0 = 101 and RSET= 3.24MΩ, the O T output
frequency is 1Hz. Refer to Figure 4. During the time
the output is HIGH, only the pull-down LED is on
while when the output is LOW, only the pull-up LED
is on. The supply voltage of the circuit is 5V.
Figure 4: Flashing Railroad Lights with the
TS3004
Figure 5: TS3004 Configured to Dim an LED with a
Potentiometer
.
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TS3004
PACKAGE OUTLINE DRAWING
10-Pin TDFN33 Package Outline Drawing
(N.B., Drawings are not to scale)
3.00±0.05
Dap Size
2.65X1.90 mm
0.25±0.05
CO.35
Pin 1 DOT BY
MARKING
3.00±0.05
0.50 BSC
2.30±0.10
1.60±0.10
0.40±0.05
0.30Ref
TOP VIEW
BOTTOM VIEW
NOTE!
 All dimensions in mm.
 Compliant with JEDEC MO-229
0.75±0.05
0.00±0.05
SIDE VIEW
Information furnished by Touchstone Semiconductor is believed to be accurate and reliable. However, Touchstone Semiconductor does not
assume any responsibility for its use nor for any infringements of patents or other rights of third parties that may result from its use, and all
information provided by Touchstone Semiconductor and its suppliers is provided on an AS IS basis, WITHOUT WARRANTY OF ANY KIND.
Touchstone Semiconductor reserves the right to change product specifications and product descriptions at any time without any advance
notice. No license is granted by implication or otherwise under any patent or patent rights of Touchstone Semiconductor. Touchstone
Semiconductor assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using Touchstone Semiconductor components. To minimize the risk associated with customer products and applications,
customers should provide adequate design and operating safeguards. Trademarks and registered trademarks are the property of their
respective owners.
Touchstone Semiconductor, Inc.
630 Alder Drive, Milpitas, CA 95035
+1 (408) 215 - 1220 ▪ www.touchstonesemi.com
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