Preliminary Data Sheet μ PA2761UGR R07DS0010EJ0100 Rev.1.00 Jun 01, 2010 MOS FIELD EFFECT TRANSISTOR Description The μ PA2761UGR is N-Channel MOS Field Effect Transistor designed for power management applications of a notebook computer. Features • Low on-state resistance ⎯ RDS(on)1 = 18.5 mΩ MAX. (VGS = 10 V, ID = 9 A) ⎯ RDS(on)2 = 30 mΩ MAX. (VGS = 4.5 V, ID = 7 A) • Low Ciss: Ciss = 550 pF TYP. (VDS = 15 V, VGS = 0 V) • Small and surface mount package (Power SOP8) • RoHS Compliant Ordering Information Part No. μ PA2761UGR-E1-AT ∗1 μ PA2761UGR-E2-AT ∗1 LEAD PLATING Pure Sn (Tin) PACKING Tape 2500 p/reel Package Power SOP8 0.08 g TYP. Note: ∗1. Pb-free (This product does not contain Pb in external electrode and other parts.) Absolute Maximum Ratings (TA = 25°C, All terminals are connected) Item Drain to Source Voltage (VGS = 0 V) Gate to Source Voltage (VDS = 0 V) Drain Current (DC) Drain Current (pulse) ∗1 Total Power Dissipation ∗2 Total Power Dissipation (PW = 10 sec) ∗2 Channel Temperature Storage Temperature Single Avalanche Current ∗3 Single Avalanche Energy ∗3 Symbol VDSS VGSS ID(DC) ID(pulse) PT1 PT2 Tch Tstg IAS EAS Ratings 30 ±25 ±9 ±40 1.1 2.5 150 −55 to +150 9 8.1 Unit V V A A W W °C °C A mJ Notes: ∗1. PW ≤ 10 μs, Duty Cycle ≤ 1% ∗ 2. Mounted on glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mmt ∗ 3. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, VGS = 20 → 0 V, L = 100 μH R07DS0010EJ0100 Rev.1.00 Jun 01, 2010 Page 1 of 6 μ PA2761UGR Chapter Title Electrical Characteristics (TA = 25°C, All terminals are connected) Item Zero Gate Voltage Drain Current Symbol IDSS Gate Leakage Current Gate Cut-off Voltage Forward Transfer Admittance ∗1 IGSS VGS(off) | yfs | RDS(on)1 Drain to Source On-state Resistance ∗1 Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage ∗1 Reverse Recovery Time RDS(on)2 Ciss Coss Crss td(on) tr td(off) tf QG QGS QGD VF(S-D) trr Reverse Recovery Charge Qrr Min Typ 1.0 2.5 Max 10 Unit μA Test Conditions VDS = 30 V, VGS = 0 V ±100 2.5 μA VGS = ±20 V, VDS = 0 V VDS = 10 V, ID = 1 mA VDS = 10 V, ID = 4.5 A VGS = 10 V, ID = 9 A VGS = 4.5 V, ID = 7 A VDS = 15 V, VGS = 0 V, f = 1 MHz VDD = 15 V, ID = 4.5 A, VGS = 10 V, RG = 10 Ω 21 V S mΩ mΩ pF pF pF ns ns ns ns nC nC nC V ns 13.5 nC 14.3 20.1 550 93 56 8 3.3 24.5 4 5.5 2.1 2.7 18.5 30 1.2 VDD = 15 V, VGS = 5 V, ID = 9 A IF = 9 A, VGS = 0 V IF = 9 A, VGS = 0 V, di/dt = 100 A/μs Note: ∗1. Pulsed TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = 20 → 0 V TEST CIRCUIT 2 SWITCHING TIME D.U.T. L 50 Ω VGS RL Wave Form RG PG. VDD VGS 0 VGS 10% 90% VDD VDS 90% BVDSS IAS 90% VDS VGS 0 VDS 10% 0 10% Wave Form VDS ID τ VDD Starting Tch τ = 1 μs Duty Cycle ≤ 1% td(on) tr ton td(off) tf toff TEST CIRCUIT 3 GATE CHARGE PG. D.U.T. IG = 2 mA RL 50 Ω VDD R07DS0010EJ0100 Rev.1.00 Jun 01, 2010 Page 2 of 6 μ PA2761UGR Chapter Title Typical Characteristics (TA = 25°C) FORWARD BIAS SAFE OPERATING AREA DERATING FACTOR OF FORWARD BIAS SAFE 120 100 ID(pulse) PW 100 ID - Drain Current - A dT - Percentage of Rated Power - % OPERATING AREA 80 60 40 11 10 11 11 0 25 50 75 100 125 150 1 00 m 1 s 30 0 μs s 11 m 1 s s Power Dissipation Limited 0.1 TA = 25°C Single Pulse Mounted on glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mmt 0.01 0.01 175 m 1 20 0 0 0 = TC - Case Temperature - °C 0.1 1 10 100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH rth(t) - Transient Thermal Resistance - °C/W 1000 Single pulse Rth(ch-A) = 113.6°C/W 100 10 1 0.1 Rth(ch-A): Mounted on a glass epoxy board of 25.4mm x 25.4mm x 0.8 mmt 0.01 100 μ 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s FORWARD TRANSFER CHARACTERISTICS 50 10 40 8 ID - Drain Current - A ID - Drain Current - A DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE VGS = 10 V 30 4.5 V 20 10 Pulsed 0 0 0.2 0.4 0.6 0.8 VDS - Drain to Source Voltage - V R07DS0010EJ0100 Rev.1.00 Jun 01, 2010 VDS = 10 V Pulsed TA = −55°C 25°C 75°C 125°C 6 4 2 0 1 0 1 2 3 4 5 VGS - Gate to Source Voltage - V Page 3 of 6 μ PA2761UGR Chapter Title FORWARD TRANSFER ADMITTANCE vs. DRAIN TEMPERATURE CURRENT 2.5 2 1.5 1 0.5 VDS = 10 V ID = 1 mA 0 RDS(on) - Drain to Source On-state Resistance - mΩ -50 0 50 100 10 TA = −55°C 25°C 75°C 125°C 1 VDS = 10 V Pulsed 0.1 150 0.1 1 10 Tch - Channel Temperature - °C ID - Drain Current - A DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT GATE TO SOURCE VOLTAGE 50 Pulsed 40 30 VGS = 4.5 V 20 10 V 10 0 1 10 100 ID - Drain Current - A RDS(on) - Drain to Source On-state Resistance - mΩ VGS(off) - Gate Cut-off Voltage - V 3 | yfs | - Forward Transfer Admittance - S GATE CUT-OFF VOLTAGE vs. CHANNEL 50 ID = 9 A Pulsed 40 30 20 10 0 0 5 10 15 20 VGS - Gate to Source Voltage - V CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE DRAIN TO SOURCE ON-STATE RESISTANCE vs. 50 Pulsed 40 VGS = 4.5 V, ID = 7 A 30 20 10 V, 9 A 10 0 1000 Ciss, Coss, Crss - Capacitance - pF RDS(on) - Drain to Source On-state Resistance - mΩ CHANNEL TEMPERATURE Ciss 100 Coss Crss 10 -50 0 50 100 Tch - Channel Temperature - °C R07DS0010EJ0100 Rev.1.00 Jun 01, 2010 150 VGS = 0 V f = 1 MHz 0.1 1 10 100 VDS - Drain to Source Voltage - V Page 4 of 6 μ PA2761UGR Chapter Title DYNAMIC INPUT CHARACTERISTICS SOURCE TO DRAIN DIODE FORWARD VOLTAGE 100 6 VDD = 24 V 15 V 6V 5 4 3 2 1 ID = 9 A 0 0 1 2 3 4 5 QG - Gate Charge - nC R07DS0010EJ0100 Rev.1.00 Jun 01, 2010 6 7 IF - Diode Forward Current - A VGS - Gate to Source Voltage - V 7 10 VGS = 10 V 0V 1 Pulsed 0.1 0 0.2 0.4 0.6 0.8 1 1.2 VF(S-D) - Source to Drain Voltage - V Page 5 of 6 μ PA2761UGR Chapter Title Package Drawings (Unit: mm) Power SOP8 8 5 1, 2, 3 ; Source 4 ; Gate 5, 6, 7, 8 ; Drain 6.0 ±0.3 4 4.4 5.37 MAX. 0.8 0.15 +0.10 –0.05 1.44 0.05 MIN. 1.8 MAX. 1 0.5 ±0.2 0.10 1.27 0.78 MAX. 0.40 +0.10 –0.05 0.12 M Equivalent Circuit Drain Body Diode Gate Source Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. R07DS0010EJ0100 Rev.1.00 Jun 01, 2010 Page 6 of 6 μ PA2761UGR Revision History Rev. Date Page 1.00 June 01, 2010 − Description Summary First Eddition Issued All trademarks and registered trademarks are the property of their respective owners. C-1 Notice 1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website. 2. 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