Preliminary Data Sheet μ PA2806 R07DS0008EJ0100 Rev.1.00 June 01, 2010 MOS FIELD EFFECT TRANSISTOR Description The μ PA2806 is N-channel MOSFET designed for DC/DC converter and power management applications. Features • Low on-state resistance ⎯ RDS(on)1 = 57 mΩ MAX. (VGS = 10 V, ID = 10 A) ⎯ RDS(on)2 = 70 mΩ MAX. (VGS = 8 V, ID = 10 A) • Low Ciss: Ciss = 780 pF TYP. (VDS = 10 V, VGS = 0 V, f = 1 MHz) • Built-in gate protection diode • Thin type surface mount package with heat spreader (8-pin HVSON) • RoHS Compliant Ordering Information Part No. ∗1 μ PA2806T1L-E1-AY μ PA2806T1L-E2-AY ∗1 LEAD PLATING Pure Sn (Tin) PACKING Package Tape 3000 p/reel 8-pin HVSON (3333) typ. 0.028 g Note: ∗1. Pb-free (This product does not contain Pb in external electrode.) Absolute Maximum Ratings (TA = 25°C) Item Drain to Source Voltage (VGS = 0 V) Gate to Source Voltage (VDS = 0 V) Drain Current (DC) (TC = 25°C) Drain Current (pulse) ∗1 Total Power Dissipation ∗2 Total Power Dissipation (PW = 10 sec) ∗2 Total Power Dissipation (TC = 25°C) ∗2 Channel Temperature Storage Temperature Single Avalanche Current ∗3 Single Avalanche Energy ∗3 Symbol VDSS VGSS ID(DC) ID(pulse) PT1 PT2 PT3 Tch Tstg IAS EAS Ratings 100 ±20 ±21 ±31 1.5 3.8 52 150 −55 to +150 14.3 20.4 Unit V V A A W W W °C °C A mJ Notes: ∗1. PW ≤ 10 μs, Duty Cycle ≤ 1% ∗ 2. Mounted on a glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mmt ∗ 3. Starting Tch = 25°C, VDD = 50 V, RG = 25 Ω, VGS = 20 → 0 V, L = 100 μH Thermal Resistance Channel to Ambient Thermal Resistance ∗1 Channel to Case (Drain) Thermal Resistance Rth(ch-A) Rth(ch-C) 83.3 2.4 °C/W °C/W Note: ∗1. Mounted on a glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mmt R07DS0008EJ0100 Rev.1.00 June 01, 2010 Page 1 of 6 μ PA2806 Chapter Title Electrical Characteristics (TA = 25°C) Item Zero Gate Voltage Drain Current Symbol IDSS Gate Leakage Current Gate Cut-off Voltage Forward Transfer Admittance ∗1 IGSS VGS(off) | yfs | RDS(on)1 Min Typ 2.0 5 Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage ∗1 Reverse Recovery Time RDS(on)2 Ciss Coss Crss td(on) tr td(off) tf QG QGS QGD VF(S-D) trr 47 49 780 150 51 20 10 46 7 18 5 6 0.88 50 Reverse Recovery Charge Gate Resistance Qrr RG 110 2.2 Drain to Source On-state Resistance ∗1 Max 10 Unit μA Test Conditions VDS = 100 V, VGS = 0 V ±10 4.0 μA VGS = ±20 V, VDS = 0 V VDS = 10 V, ID = 1 mA VDS = 10 V, ID = 10 A VGS = 10 V, ID = 10 A VGS = 8 V, ID = 10 A VDS = 10 V, VGS = 0 V, f = 1 MHz VDD = 50 V, ID = 10 A, VGS = 10 V, RG = 10 Ω 57 70 V S mΩ mΩ pF pF pF ns ns ns ns nC nC nC V ns VDD = 50 V, VGS = 10 V, ID = 21 A IF = 21 A, VGS = 0 V IF = 21 A, VGS = 0 V, di/dt = 100 A/μs f = 1 MHz nC Ω Note: ∗1. Pulsed TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω D.U.T. L 50 Ω PG. VGS = 20 → 0 V TEST CIRCUIT 2 SWITCHING TIME RL RG PG. VDD VGS VGS Wave Form 0 VGS 10% 90% VDD VDS 90% BVDSS IAS VDS ID VDS 0 10% 10% tr td(off) Wave Form τ VDD Starting Tch 90% VDS VGS 0 τ = 1 μs Duty Cycle ≤ 1% td(on) ton tf toff TEST CIRCUIT 3 GATE CHARGE D.U.T. IG = 2 mA PG. 50 Ω R07DS0008EJ0100 Rev.1.00 June 01, 2010 RL VDD Page 2 of 6 μ PA2806 Chapter Title Typical Characteristics (TA = 25°C) FORWARD BIAS SAFE OPERATING AREA DERATING FACTOR OF FORWARD BIAS SAFE 120 100 ID(pulse) 100 1 150 0 d it e 125 11 1 100 = m Li 75 S μs TC = 25°C Single Pulse 0.01 50 G 00 n 0 25 O S( (V 11 s 0.1 20 0 D V ) 1 = t io pa 40 R N Li ) i m si 60 m 1 d te is ID - Drain Current - A 10 11 D er 80 PW ID(DC) w Po dT - Percentage of Rated Power - % OPERATING AREA 175 0.1 1 TC - Case Temperature - °C 10 100 1000 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH rth(t) - Transient Thermal Resistance - °C/W 1000 Rth(ch-A) = 83.3°C/W 100 10 Rth(ch-C) = 2.4°C/W 1 0.1 0.01 100 μ Single Pulse Rth(ch-A): Mounted on a glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mmt 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE FORWARD TRANSFER CHARACTERISTICS 100 ID - Drain Current - A 10 VGS(off) - Gate Cut-off Voltage - V 5 Tch = −55°C −25°C 25°C 75°C 125°C 150°C 1 0.1 0.01 0.001 VDS = 10 V Pulsed 0.0001 0 2 4 6 VGS - Gate to Source Voltage - V R07DS0008EJ0100 Rev.1.00 June 01, 2010 VDS = 10 V ID = 1 mA 4 3 2 1 0 8 -75 -25 25 75 125 175 Tch - Channel Temperature - °C Page 3 of 6 Chapter Title DRAIN TO SOURCE ON-STATE RESISTANCE vs. CURRENT DRAIN CURRENT 100 Tch = −55°C −25°C 25°C 75°C 125°C 150°C 10 1 VDS = 10 V Pulsed 0.1 0.01 0.1 1 10 100 RDS(on) - Drain to Source On-state ResistanceΩ ID - Drain Current - A RDS(on) - Drain to Source On-state Resistance - mΩ FORWARD TRANSFER ADMITTANCE vs. DRAIN 100 80 60 VGS = 8.0 V 10 V 40 20 Pulsed 0 0.1 10 100 ID - Drain Current - A DRAIN TO SOURCE ON-STATE RESISTANCE GATE TO SOURCE VOLTAGE vs. CHANNEL TEMPERATURE 100 80 ID = 16.8 A 10 A 4.2 A 60 40 20 Pulsed 0 0 2 4 6 8 10 12 14 16 18 20 120 100 80 VGS = 8 V, ID = 10 A 60 10 V, 10 A 40 20 Pulsed 0 -75 25 75 125 175 SWITCHING CHARACTERISTICS CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 100 td(on), tr, td(off), tf - Switching Time - ns 10000 Ciss 1000 Coss 100 10 -25 Tch - Channel Temperature - °C VGS - Gate to Source Voltage - V Ciss, Coss, Crss - Capacitance - pF 1 DRAIN TO SOURCE ON-STATE RESISTANCE vs. RDS(on) - Drain to Source On-state ResistanceΩ | yfs | - Forward Transfer Admittance - S μ PA2806 VGS = 0 V f = 1 MHz 0.1 Crss td(off) td(on) tr tf 10 VDD = 50 V VGS = 10 V RG = 10 Ω 1 1 10 VDS - Drain to Source Voltage - V R07DS0008EJ0100 Rev.1.00 June 01, 2010 100 0.1 1 10 100 ID - Drain Current - A Page 4 of 6 μ PA2806 Chapter Title DYNAMIC INPUT/OUTPUT CHARACTERISTICS VDD = 80 V 50 V 20 V 80 8 VGS 60 6 40 4 20 2 VDS ID = 21 A 0 100 IF - Diode Forward Current - A 10 VGS - Gate to Source Voltage - V VDS - Drain to Source Voltage - V 100 SOURCE TO DRAIN DIODE FORWARD VOLTAGE 0 0 5 10 15 10 VGS = 10 V 1 0.1 Pulsed 0.01 20 0 0.5 QG - Gate Charge - nC 1 1.5 VF(S-D) - Source to Drain Voltage - V REVERSE RECOVERY TIME vs. DIODE SINGLE AVALANCHE CURRENT vs. FORWARD CURRENT INDUCTIVE LOAD 1000 100 100 10 di/dt = 100 A/μs VGS = 0 V 1 0.1 1 10 IF - Diode Forward Current - A R07DS0008EJ0100 Rev.1.00 June 01, 2010 100 IAS - Single Avalanche Current - A trr - Reverse Recovery Time - ns 0V IAS = 14.3 A 10 1 EAS = 20.4 mJ VDD = 50 V VGS = 20 → 0 V RG = 25 Ω 10 μ 100 μ 1m 10 m L - Inductive Load - H Page 5 of 6 μ PA2806 Chapter Title Package Drawings (Unit: mm) 8 7 6 5 4 3.3±0.15 0.22±0.05 0.9±0.05 0.10 S 0 +0.05 –0 3.0±0.1 0.10 M 0.32±0.05 3 3.3±0.15 1 2 3.15±0.1 0.65 8-pin HVSON (3333) 0.35 1, 2, 3 : Source 4 : Gate 5, 6, 7, 8: Drain 2.34±0.1 0.2 0.4±0.1 0.4±0.1 1.75±0.1 Equivalent Circuit Drain Body Diode Gate Gate Protection Diode Remark Source The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. R07DS0008EJ0100 Rev.1.00 June 01, 2010 Page 6 of 6 μ PA2806 Revision History Rev. Date Page 1.00 June 01, 2010 − Description Summary First Eddition Issued All trademarks and registered trademarks are the property of their respective owners. C-1 Notice 1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website. 2. 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