DATA SHEET
MOS INTEGRATED CIRCUIT
µ PD168116A
7-CHANNEL H-BRIDGE DRIVER
WITH A MICRO STEP FUNCTION SUPPORTING PULSE INPUT
DESCRIPTION
The µ PD168116A is a 7-channel H-bridge driver with a micro step function supporting pulse input that consists of a
CMOS control circuit and a MOS output stage. It can reduce the current consumption and the voltage loss at the
output stage compared with a conventional driver using bipolar transistors, thanks to employment of a MOS process.
The µ PD168116A can drive a stepping motor by inputting pulses, so that the number of signal lines necessary for
controlling the motor can be decreased.
The package is a 56-pin WQFN that helps reduce the mounting area and height.
The µ PD168116A can be used to drive two stepping motors, or two DC motors and one coil.
FEATURES
• Seven H-bridge circuits employing power MOSFET
• Low-voltage driving
VDD = 2.7 to 3.6 V
VM = 2.7 to 5.5 V
• Output on-state resistance: 1.0 Ω TYP., 1.5 Ω MAX. (sum of top and bottom stage, ch1 to ch4, and ch7)
1.5 Ω TYP., 2.0 Ω MAX. (sum of top and bottom stage, ch5 and ch6)
• PWM output (ch1 to ch6) , linear output (ch7)
• Output current
<ch1 to ch6>
DC current: 0.4 A/ch (when each channel is used independently)
Peak current: 0.7 A/ch (when each channel is used independently)
<ch7>
DC current: 0.5 A/ch (when used independently)
Peak current: 0.7 A/ch (when used independently)
• Input logic frequency: 100 kHz supported
• Undervoltage lockout circuit
Shuts down the internal circuit at VDD = 1.7 V TYP.
• Overheat protection circuit
Operates at 150°C or more and shuts down internal circuitry.
• 56-pin WQFN (□8 mm, 0.5 mm pitch)
ORDERING INFORMATION
Part Number
Package
µ PD168116AK9-9B4-A
56-pin plastic WQFN (8 x 8)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. S16967EJ1V0DS00 (1st edition)
Date Published December 2003 NS CP(K)
Printed in Japan
2003
µ PD168116A
1. PIN CONFIGURATION
2
IN7B
SEL7
MOB2
MOB1
OUT3B
VM34
OUT3A
PGND34
OUT4B
VM34
OUT4A
RESETB
FIL3
FIL2
Package: 56-pin plastic WQFN (8 x 8)
42
41
40
39
38
37
36
35
34
33
32
31
30
29
24 FB1
VM7
48
23 OUT1B
OUT7B
49
22 VM12
VDD
50
21 OUT1A
LGND
51
20 PGND12
COSC
52
19 OUT2B
OE1
53
18 VM12
CLK1
54
17 OUT2A
CW1
55
16 IN5A
OE2/IN3A
56
15 IN5B
1
2
3
4
5
6
7
8
9
10
11
12
13
14
IN6A
47
IN6B
OUT7A
MODE1
25 FB2
MODE2
46
MODE3
FB7
MODE4/IN4B
26 FB3
OUT5B
45
VM56
R7
OUT5A
27 FB4
PGND56
44
OUT6A
FIL7
OUT6B
28 FIL1
CW2/IN4A
43
CLK2/IN3B
IN7A
Data Sheet S16967EJ1V0DS
µ PD168116A
2. PIN FUNCTIONS
(1/2)
Pin No.
Pin Name
Function
1
CLK2/IN3B
H-bridge 3, H-bridge 4 CLK input pin/H-bridge 3 input pin B
2
CW2/IN4A
H-bridge 3, H-bridge 4 driving direction input pin/H-bridge 4 input pin A
3
OUT6B
H-bridge 6 output pin B
4
OUT6A
H-bridge 6 output pin A
5
PGND56
H-bridge 5, H-bridge 6 GND pin
6
OUT5A
H-bridge 5 output pin A
7
VM56
H-bridge 5, H-bridge 6 power supply pin
8
OUT5B
H-bridge 5 output pin B
9
MODE4/IN4B
Mode selection pin 4/H-bridge 4 input pin B
10
MODE3
Mode selection pin 3
11
MODE2
Mode selection pin 2
12
MODE1
Mode selection pin 1
13
IN6B
H-bridge 6 input pin B
14
IN6A
H-bridge 6 input pin A
15
IN5B
H-bridge 5 input pin B
16
IN5A
H-bridge 5 input pin A
17
OUT2A
H-bridge 2 output pin A
18
VM12
H-bridge 1, H-bridge 2 power supply pin
19
OUT2B
H-bridge 2 output pin B
20
PGND12
H-bridge 1, H-bridge 2 GND pin
21
OUT1A
H-bridge 1 output pin A
22
VM12
H-bridge 1, H-bridge 2 power supply pin
23
OUT1B
H-bridge 1 output pin B
24
FB1
Current detection resistor connection pin 1
25
FB2
Current detection resistor connection pin 2
26
FB3
Current detection resistor connection pin 3
27
FB4
Current detection resistor connection pin 4
28
FIL1
Filter capacitor connection pin 1
29
FIL2
Filter capacitor connection pin 2
30
FIL3
ch3 reference voltage output pin (Leave this pin open.)
31
RESETB
Reset pin (low active)
32
OUT4A
H-bridge 4 output pin A
33
VM34
H-bridge 3, H-bridge 4 power supply pin
34
OUT4B
H-bridge 4 output pin B
35
PGND34
H-bridge 3, H-bridge 4 GND pin
36
OUT3A
H-bridge 3 output pin A
37
VM34
H-bridge 3, H-bridge 4 power supply pin
38
OUT3B
H-bridge 3 output pin B
Data Sheet S16967EJ1V0DS
3
µ PD168116A
(2/2)
Pin No.
4
Pin Name
Function
39
MOB1
MOB signal output pin 1 (open drain output)
40
MOB2
MOB signal output pin 2 (open drain output)
41
SEL7
ch7 excitation mode selection pin
42
IN7B
H-bridge 7 input pin B
43
IN7A
H-bridge 7 input pin A
44
FIL7
Amplifier operation stabilizing filter connection pin
45
R7
Amplifier operation stabilizing resistor connection pin
46
FB7
Current detection resistor connection pin 7
47
OUT7A
H-bridge 7 output pin A
48
VM7
H-bridge 7 power supply pin
49
OUT7B
H-bridge 7 output pin B
50
VDD
Logic block power supply pin
51
LGND
Logic block GND pin
52
COSC
Chopping frequency setting capacitor connection pin
53
OE1
H-bridge 1, H-bridge 2 output enable pin
54
CLK1
H-bridge 1, H-bridge 2 CLK input pin
55
CW1
H-bridge 1, H-bridge 2 driving direction input pin
56
OE2/IN3A
H-bridge 3, H-bridge 4 output enable pin/H-bridge 3 input pin A
Data Sheet S16967EJ1V0DS
µ PD168116A
3. BLOCK DIAGRAM
RESETB
VDD
MODE3
MOB1
OE2/ CLK2/ CW2/ MODE4/
OE1 CLK1 CW1 MODE1 MODE2
LGND
MOB2 IN3A IN3B IN4A IN4B
FB1
Current
Sense 1
FB2
Current
Sense 2
OSC
Current
Sense 3
VM12
Current
Sense 4
VM12
OUT1A
OUT1B
VM34
VM34
ch1/ch2
Control
ch3/ch4
Control
OUT3A
ch3
H-bridge
OUT3B
FIL1
OUT2B
FB3
FB4
ch1
H-bridge
PGND12
OUT2A
COSC
PGND34
ch2
H-bridge
FIL3
Control and
Pre-driver
OUT4A
ch4
H-bridge
FIL2
OUT4B
VM56
PGND56
ch5
H-bridge
OUT5A
TSD
ch6
H-bridge
IN7A
UVLO
IN7B
VM7
OUT5B
ch7
H-bridge
IN5A IN5B
IN6A IN6B OUT6AOUT6B SEL7 R7
Data Sheet S16967EJ1V0DS
FIL7
FB7 OUT7A
OUT7B
5
µ PD168116A
4. STANDARD CONNECTION EXAMPLE
3 to 5 V
43 IN7A
30
29
1000 pF x 2
FIL2
31
FIL3 (open)
32
RESETB
33
OUT4A
34
VM34
35
OUT4B
36
OUT3A
37
VM34
38
OUT3B
39
MOB1
40
MOB2
SEL7
IN7B
41
PGND34
VDD VDD
42
22 µF
M
100 kΩ x 2
FIL1 28
10 kΩ 150 pF
44 FIL7
FB4 27
45 R7
FB3 26
46 FB7
FB2 25
47 OUT7A
FB1 24
10 kΩ
1Ω
48 VM7
22 µF 3 to 5 V
49 OUT7B
10 µF 3 V
50 VDD
OUT1A 21
51 LGND
PGND12 20
52 COSC
OUT2B 19
53 OE1
VM12 18
VM56
OUT5B
MODE4/IN4B
MODE3
MODE2
MODE1
IN6B
IN6A
56 OE2/IN3A
OUT5A
IN5A 16
PGND56
55 CW1
OUT6A
OUT2A 17
OUT6B
54 CLK1
CW2/IN4A
(at 100 kHz
PWM)
VM12 22
CLK2/IN3B
330 pF
5 kΩ x 4
OUT1B 23
1
2
3
4
5
6
7
8
9
10
11
12
13
14
M
3 to 5 V
M
3 to 5 V
22 µF
IN5B 15
M
22 µF
Cautions 1. Be sure to connect all of the pins which have more than one.
2. The constants shown in the above diagram are provided as examples only. Perform design
based on thorough evaluation with the actual machine, and change the underlined constants as
necessary.
3. A pull-down resistor (50 to 200 kΩ) is connected to the MODE1, MODE2, MODE3, SEL7, OE1, CLK1,
CW1, OE2/IN3A, CLK2/IN3B, CW2/IN4A, MODE4/IN4B, IN5A, IN5B, IN6A, IN6B, IN7A, and IN7B pins.
Fix these input pins to GND when they are not used.
6
Data Sheet S16967EJ1V0DS
µ PD168116A
5. SYSTEM APPLICATION DIAGRAM
6
CPU
10 µF
100 kΩ x 2
3V
RESETB
VDD
MODE3
MOB1
OE2/ CLK2/ CW2/ MODE4/
OE1 CLK1 CW1 MODE1 MODE2
LGND
MOB2 IN3A IN3B IN4A IN4B
FB1
Current
Sense 1
FB2
Current
Sense 2
OSC
330 pF
Current
Sense 3
VM12
5 kΩ x 2
Current
Sense 4
VM12
OUT1A
OUT1B
1000 pF
M
1000 pF
5 kΩ
VM34
VM34
ch1/ch2
Control
ch3/ch4
Control
OUT3A
ch3
H-bridge
OUT3B
FIL1
OUT2B
FB3
FB4
ch1
H-bridge
PGND12
OUT2A
COSC
PGND34
ch2
H-bridge
FIL3
Control and
Pre-driver
OUT4A
ch4
H-bridge
FIL2
OUT4B
M
VM56
PGND56
M
ch5
H-bridge
OUT5A
TSD
ch6
H-bridge
IN7A
UVLO
IN7B
3 to 5 V
VM7
OUT5B
ch7
H-bridge
IN5A IN5B
IN6A IN6B OUT6AOUT6B SEL7 R7
M
FIL7
FB7 OUT7A
22 µF
OUT7B
10 kΩ
10 kΩ 150 pF
1Ω
Caution The constants shown in the above diagram are provided as examples only. Perform design based
on thorough evaluation with the actual machine.
Data Sheet S16967EJ1V0DS
7
µ PD168116A
6. FUNCTION OPERATION TABLE
6.1 Power Save Function
This IC can be placed in the power-save mode by making MODE1, MODE2, MODE3, and MODE4 high level.
This function allows holding of the excitation position when the stepping motor mode is selected and the operation to
be started from where the excitation position is held when the power-save mode is cleared. In the power-save mode,
the current consumption is reduced to 20 µA TYP. because the internal circuits other than UVLO are stopped.
In the power-save mode, only input of the RESETB pin is acknowledged, and the other input signals are ignored.
The operation modes of ch1 to ch4 can be set by a combination of MODE1 to MODE4. For the combination of the
MODE pins, refer to Table 6−1. MODE Pin Truth Table.
Table 6−1. Mode Pin Truth Table
MODE1
MODE2
MODE3
MODE4
Operation Mode
(/IN4B)
L
L
L
L
L
L
L
L
H
L
L
H
L
H
L
L
H
L
L
H
H
L
H
H
L
H
L
General-purpose driving
1-2 phase excitation
General-purpose driving
Micro step
General-purpose driving
L
2-phase excitation
2-phase excitation
H
H
1-2 phase excitation
1-2 phase excitation
L
L
2-phase excitation (current
2-phase excitation (current
limiting)
limiting)
1-2 phase excitation
1-2 phase excitation
(current limiting)
(current limiting)
H
H
L
H
L
2-phase excitation
Micro step
H
L
H
H
1-2 phase excitation
Micro step
H
H
L
L
Micro step
2-phase excitation
H
H
L
H
Micro step
1-2 phase excitation
H
H
H
L
Micro step
Micro step
H
H
H
H
Power save mode
Remark H: High level, L: Low level
8
ch3, ch4
2-phase excitation
L
IN4B input
ch1, ch2
Data Sheet S16967EJ1V0DS
µ PD168116A
6.2 ch1, ch2 (Dedicated to Stepping Motor)
RESETB
CLK1
CW1
OE1
Operation Mode
H
L
H
Pulse progress, CW mode
H
H
H
Pulse progress, CCW mode
H
x
x
L
Output Hi-Z (Internal information is held.)
L
x
x
x
Reset mode (output Hi-Z)
Remark x: High level or low level, Hi-Z: High impedance
6.3 ch3, ch4 (Selecting Stepping Motor, DC Motor and Coil Driving)
<Stepping motor drive mode>
RESETB
CLK2
CW2
OE2
Operation Mode
H
L
H
Pulse progress, CW mode
H
H
H
Pulse progress, CCW mode
H
x
x
L
Output Hi-Z (Internal information is held.)
L
x
x
x
Reset mode (output Hi-Z)
<General-purpose drive mode>
RESETB
IN3A/IN4A
IN3B/IN4B
OUT3A/OUT4A
H
L
L
Z
H
L
H
H
H
L
H
H
H
L
x
x
L
H
OUT3B/OUT4B
Z
H
Note
H
Note
Operation Mode
Stop
Reverse
L
Forward
H
Brake
Reset mode (output Hi-Z)
Note When the µ PD168116A is used for constant-current driving (when a sense resistor is connected to the FB
pin) , PWM chopping driving is performed.
Remark Z: Output high impedance
Data Sheet S16967EJ1V0DS
9
µ PD168116A
6.4 ch5, ch6
RESETB
IN5A/IN6A
IN5B/IN6B
OUT5A/OUT6A
OUT5B/OUT6B
H
L
L
Z
Z
Stop
H
L
H
L
H
Reverse
H
H
L
H
L
Forward
H
H
H
H
H
Brake
L
x
x
Forward
Reset mode (output Hi-Z)
Reverse
VM
ON
LOAD
ON
A
Brake
VM
ON
OFF
LOAD
ON
LOAD
A
B
OFF
A
B
OFF
GND
10
OFF
GND
VM
OFF
B
ON
GND
OFF
ON
LOAD
B
OFF
VM
OFF
OFF
A
Stop
Operation Mode
OFF
GND
Data Sheet S16967EJ1V0DS
µ PD168116A
6.5 ch7
RESETB
SEL7
IN7A
IN7B
OUT7A
OUT7B
H-bridge Output State
Q1
Q2
Q3
Q4
H
H
L
L
Z
Z
OFF
OFF
OFF
OFF
H
H
L
H
L
H
OFF
ON
ON
OFF
(linear)
H
H
H
L
(linear)
H
L
ON
OFF
OFF
(linear)
H
H
H
L
L
x
H
L
H
ON
(linear)
H
ON
ON
OFF
OFF
Weak excitation operation when SEL7 = H (Function is equivalent.)
x
x
Z
Z
OFF
OFF
OFF
OFF
VM7
Q1
Q2
OUT7A
OUT7B
−
+
−
+
Q3
Q4
6.6 SEL7 Pin
The current that flows into ch7 can be changed by setting the SEL7 pin.
SEL7
Operation Mode
L
Weak excitation mode (Current 2/3 of the normal setting flows.)
H
Normal operation mode
Data Sheet S16967EJ1V0DS
11
µ PD168116A
7. COMMAND INPUT TIMING CHART
Figure 7−1. In The Micro Step Mode
RESETB
1
2
3
4
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
CLK
CW
OE
1
2
3
4
5 6 7 8 9 10 11 12 13 14 15 16 17 18 17 16 15 14 13 12 11 10 9
Pulse out
(internal)
Chopping
pulse
MOB
CW mode
Reset state
12
Data Sheet S16967EJ1V0DS
CCW mode
Output Hi-Z
Reset
state
µ PD168116A
Table 7−1. Relationship between Revolution Angle, Phase Current, and Vector Amount (64 micro steps)
Step
Revolution
Phase A - Phase Current
Phase B - Phase Current
Vector
Angle
Amount
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
TYP.
θ0
0
−
100
−
−
0
3.8
100
θ1
5.625
94.5
100
104.5
2.5
9.8
17.0
100.48
θ2
11.250
93.2
98.1
103.0
12.4
19.5
26.5
100
θ3
16.875
90.7
95.7
100.7
22.1
29.0
36.1
100.02
θ4
22.500
87.4
92.4
97.4
31.3
38.3
45.3
100.02
θ5
28.125
83.2
88.2
93.4
40.1
47.1
54.1
99.99
θ6
33.750
78.1
83.1
88.1
48.6
55.6
62.6
99.98
θ7
39.375
72.3
77.3
82.3
58.4
63.4
68.4
99.97
θ8
45
65.7
70.7
75.7
65.7
70.7
75.7
99.98
θ9
50.625
58.4
63.4
68.4
72.3
77.3
82.3
99.97
θ 10
56.250
48.6
55.6
62.6
78.1
83.1
88.1
99.98
θ 11
61.875
40.1
47.1
54.1
83.2
88.2
93.2
99.99
θ 12
67.500
31.3
38.3
45.3
87.4
92.4
97.4
100.02
θ 13
73.125
22.1
29.0
36.1
90.7
95.7
100.7
100.02
θ 14
78.750
12.4
19.5
26.5
93.2
98.1
103.0
100
θ 15
84.375
2.5
9.8
17.0
94.5
100
104.5
100.48
θ 16
90
−
0
3.8
−
100
−
100
Caution θ 0 shows the excitation start position after release of reset. Each value is an ideal value and is not a
guarantee value.
Data Sheet S16967EJ1V0DS
13
µ PD168116A
8. FUNCTIONAL DEPLOYMENT
8.1 Reset Function
An initialization operation is performed and all the internal data is cleared when RESETB = L. The output remains in
the Hi-Z state.
When RESETB = H, signals can be input. Be sure to perform a reset operation after turning on power supply.
When RESETB = L, the internal circuitry is stopped whenever possible, so that the self current consumption can be
reduced. When the external input signal is stopped, the current consumption can be lowered to 1 µA MAX.
Immediately after release of reset, excitation is started from the position where the current of ch1 is 100% and the
current of ch2 is 0%, in the micro step drive mode and 1-2 phase excitation drive mode. In the 2-phase excitation
drive mode, excitation is started from the position where the currents of ch1 and ch2 are 100%.
8.2 2-phase Excitation Drive Mode and 1-2 Phase Excitation Drive Mode
In the 2-phase excitation drive mode, current of ±100% is allowed to flow into ch1 and ch2 simultaneously. In the 12 phase excitation drive mode, the motor can be driven at a higher torque by allowing a current to flow so that the
synthesized torque of ch1 and ch2 is the same as the torque at phase 1 position. The 2-phase excitation, 1-2 phase
excitation, and micro step driving modes are selected by the MODE1 to MODE4 pins.
Note that 100% (= saturation drive mode) and a mode in which the current set by the sense resistor is used
can be selected by the MODE pin. Current control is performed by chopping drive.
8.3 Micro Step Drive Mode of Stepping Motor
The current flowing into the H-bridge is constant by using a vector value so that one period can be stopped in 1/64
steps. This function is provided to realize high-accuracy positioning control of a stepping motor.
To realize this micro step driving, the following functions are internally realized by the driver.
• Detection of current flowing into each channel by sense resistor as voltage value
• Synthesizing half the dummy sine waveform generated by the internal D/A with PWM oscillation waveform for
chopping operation
• Driver stage performing PWM drive based on result of comparing detected voltage and synthesized
waveform
Because the internal dummy sine wave consists of 64 steps per period, it can be used to drive a stepping motor
using 64 divisions. The micro step drive mode, 2-phase excitation drive mode, and 1-2 phase excitation drive mode
can be selected by using external pins.
14
Data Sheet S16967EJ1V0DS
µ PD168116A
Figure 8−1. Concept of Micro Step Drive Operation
+
M
A
8.4 Output Enable (OE) Pin
The OE1 (OE2) pin can be used to forcibly stop pulse output of ch1 and ch2 (or ch3 and ch4) .
When OE1 (OE2) = L, the output is forcibly made to go into Hi-Z. Because the internal information is held, however,
the motor position information is recorded unless reset is performed.
To drive a motor, make sure that OE1 (OE2) = H.
8.5 MOB Output
In the micro step drive mode, L is output from the MOB1 (MOB2) pin when the current of ch1 (ch3) or ch2 (ch4) is
±100%.
In the 2-phase excitation or 1-2 phase excitation drive mode, L is output when the current of ch1 and ch2 is +100%.
By monitoring the MOB output, the excitation position of the stepping motor can be checked. When OE1 (OE2) = L,
MOB1 (MOB2) = Hi-Z.
8.6 Current Detection Resistor Connection (FB) Pin
(1) ch1 to ch4
The current detection resistor is connected when current driving is necessary. It is used for micro step driving and
solenoid driving.
The current that flows into the output is {500 mV (reference voltage) /FB pin resistance x 1000}.
Example)
Where FB = 4.7 kΩ
Output current = 500 (mV) /4.7 (kΩ) x 1000
≅ 106 (mA)
This means constant current driving of about 106 mA.
When current driving is not performed, connect the FB pin to GND.
Data Sheet S16967EJ1V0DS
15
µ PD168116A
(2) ch7
Connect the current detection circuit between the source of the driver low side and GND. Because the circuit is
configured to detect current directly, connect a detection resistor of low resistance (1 Ω maximum) .
The current that flows into the output is {200 mV (reference voltage) /FB7 pin resistance} (when SEL7 = H) .
Example)
Where FB7 = 0.5 Ω
Output current = 200 (mV) /0.5 (Ω)
= 400 (mA)
This means constant current driving of 400 mA.
Because only ch7 employs the linear drive mode and directly detects the output current, the current accuracy is
determined only by the external resistor and the offset of the current control amplifier.
8.7 Undervoltage Lockout (UVLO) Circuit
This function is to forcibly stop the operation of the IC to prevent malfunctioning if VDD drops.
When UVLO operates, the IC is in the reset status.
If VDD drops abruptly in the order of several µs, this function may not operate.
8.8 Overheat Protection (TSD) Circuit
This function is to forcibly stop the operation of the IC to protect it from destruction due to overheating if the chip
temperature of the IC rises.
The overheat protection circuit operates when the chip temperature rises to 150°C or more. When overheat is
detected, all the circuits are stopped. When RESETB = L or when UVLO is detected, the overheat protection circuit
does not operate.
8.9 Power Up Sequence
This IC has a circuit that prevents current from flowing into the VM pin when VDD = 0 V. Therefore, the current that
flows into the VM pin is cut off when VDD = 0 V.
Because the VDD pin voltage and VM pin voltage are monitored, a current of 3 µA MAX. flows into the VM pin when
VDD is applied.
16
Data Sheet S16967EJ1V0DS
µ PD168116A
9. OPERATION DESCRIPTION
9.1 Output Current Setting
The peak value of the output current (100% of the current of ch1 (ch3) or ch2 (ch4) ) is determined by resistor RFB
connected to FB1 (FB3) or FB2 (FB4) .
This IC has reference power supply VREF (500 mV TYP.) for current
comparison, and performs driving with the current obtained from RFB and VREF as the peak output current.
Peak output current: IMAX (A) ≅ VREF (V) ÷ RFB (Ω) x 1000
9.2 Pulse Output
The motor is driven by inputting a pulse to the CLK1 (CLK2) pin. The operation advances by one pulse at the rising
edge of the CLK1 (CLK2) signal.
9.3 Motor Revolution Direction Setting
CLK1 (CLK2) is used to specify the motor revolution direction.
In the CW mode, the current of ch2 (ch4) is output, 90° degrees in phase behind the current of ch1 (ch3) .
In the CCW mode, the current of ch2 (ch4) is output, 90° degrees in phase ahead of the current of ch1 (ch3) .
9.4 Selecting 2-phase Excitation/Micro Step Drive Mode
The 2-phase excitation, 1-2 phase excitation, or micro step drive mode can be selected by using the MODE1 to
MODE4 pins.
Refer to Table 6−1. Mode Pin Truth Table for details.
Immediately after release of reset, the IC is initialized. In the 1-2 phase excitation and micro step drive mode,
excitation is started from the position where the output current of ch1 (ch3) is 100% and output current of ch2 (ch4) is
0%. In the 2-phase excitation drive mode, excitation is started from the position where the currents of both ch1 (ch3)
and ch2 (ch4) are +100%.
When the mode is changed from the micro step driving to the 2-phase excitation (or 1-2 phase excitation) , the
position of micro step is held until CLK is input. Pulse output is started by the first CLK input, the position is skipped to
the 2-phase position of the next quadrant (or to the closest 1-2 phase position at the rotation direction destination) ,
and driving is started.
Figure 9−1. Concept of Change Operation, Micro Step Driving ↔ 2-phase Excitation (1-2 Phase Excitation) .
(4)
Microstep stop
position (example 1)
2-phase excitation
stop position
(1)
Skipes to the next
quadrant
Microstep stop
position (example 2)
(3)
(2)
Data Sheet S16967EJ1V0DS
17
µ PD168116A
10. NOTE ON CORRECT USE
10.1 Transmitting Data
Data input when RESETB = L is ignored.
10.2 Pin Processing of Unused Circuit
The input/output pins of an unused circuit must be processed as specified below.
A VM power supply pin is provided for each output circuit. The current consumption of the internal circuit can be
reduced by dropping the VM power of the unused circuit to GND. However, if there are multiple power supply pins, be
sure to connect all of them to the same potential.
<ch1, ch2>
Lower OE1, CLK1, and CW1.
Open FIL1, FIL2, OUT1A, OUT1B, OUT2A, and OUT2B.
Connect FB1 and FB2 to GND.
<ch3, ch4>
Set the general-purpose drive mode.
Lower OE2/IN3A, CLK2/IN3B, CW2/IN4A, and MODE4/IN4B.
Open FIL3, OUT3A, OUT3B, OUT4A, and OUT4B.
Connect FB3 and FB4 to GND.
<ch5, ch6>
Lower IN5A (IN6A) and IN5B (IN6B) .
Open OUT5A (OUT6A) and OUT5B (OUT6B) .
<ch7>
Lower SEL7, IN7A, and IN7B.
Open OUT7A and OUT7B.
Connect FIL7, FB7, and R7 to GND.
18
Data Sheet S16967EJ1V0DS
µ PD168116A
11. STEPPING MOTOR DRIVING WAVEFORM
Figure 11−1. 2-phase Excitation Output Mode
Figure 11−2. 1-2 Phase Excitation Output Mode
Phase A current
Phase A current
100%
100%
70% of
a current
setting
70% of
a current
setting
−100%
−100%
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
6
7
8
Phase B current
Phase B current
100%
100%
70% of
a current
setting
70% of
a current
setting
−100%
−100%
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
Remarks 1. Solid line: Output duty 100% drive, Dotted line: Current control drive (The current is in accordance with
the current setting.)
2. The horizontal axis of the above charts indicates the number of steps. The above charts show an
example in the CW (forward) mode.
The current flowing into phases A and B is positive in the direction from OUT pin A to OUT pin B, and
negative in the direction from OUT pin B to OUT pin A.
Data Sheet S16967EJ1V0DS
19
µ PD168116A
Figure 11−3. Micro Step Drive Mode
RESET
position
100
99.5
98.1 95.7
92.4
88.2
83.1
77.3
70.7
ch1 current
63.4
55.6
47.1
38.3
29.0
19.5
9.8
0
−9.8
−19.5
−29.0
−38.3
−47.1
−55.6
−63.4
−70.7
−77.3
−83.1
−88.2
−92.4
−98.1 −95.7
−100 −99.5
0
5
10
15
20
25
30
35
40
45
50
40
45
50
55
60
65
ch2 current
100
99.5
98.1 95.7
92.4
88.2
83.1
77.3
70.7
63.4
55.6
47.1
38.3
29.0
19.5
9.8
0
−9.8
−19.5
−29.0
−38.3
−47.1
−55.6
−63.4
−70.7
−77.3
−83.1
−88.2
−92.4
−98.1 −95.7
−100 −99.5
0
5
10
15
20
25
30
35
55
60
65
Remark The horizontal axis of the above charts indicates the number of steps. The above charts show an example
in the CW (forward) mode.
The current flowing into phases A and B is positive in the direction from OUT pin A to OUT pin B, and
negative in the direction from OUT pin B to OUT pin A.
20
Data Sheet S16967EJ1V0DS
µ PD168116A
12. ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings (TA = 25°C, glass epoxy board of 100 mm x 100 mm x 1 mm with copper foil area
of 15%)
Parameter
Power supply voltage
Symbol
Condition
Rating
Unit
VDD
Control block
−0.5 to +6.0
V
VM
Motor block
−0.5 to +6.0
V
−0.5 to VDD +0.5
V
Input voltage
VIN
Output pin voltage
VOUT
Motor block
6.2
V
DC output current (ch1 to 6ch)
ID(DC)
DC (during output independent operation)
±0.4
A/ch
DC output current (ch7)
ID(DC)
DC (during output independent operation)
±0.5
A/ch
Instantaneous output current
ID(pulse)
PW < 10 ms, Duty Cycle ≤ 20%
±0.7
A/ch
(during output independent operation)
Power consumption
PT
1.0
W
Peak junction temperature
Tch(MAX)
150
°C
Storage temperature
Tstg
−55 to +150
°C
Remark The overheat protection circuit operates at Tch > 150°C. When overheat is detected, all the circuits are
stopped. The overheat protection circuit does not operate at reset or on detection of ULVO.
Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any
parameter. That is, the absolute maximum ratings are rated values at which the product is on the
verge of suffering physical damage, and therefore the product must be used under conditions that
ensure that the absolute maximum ratings are not exceeded.
Recommended Operating Conditions (TA = 25°C, glass epoxy board of 100 mm x 100 mm x 1 mm with copper
foil area of 15%)
Parameter
Power supply voltage
Symbol
Condition
MIN.
TYP.
MAX.
Unit
VDD
Control block
2.7
3.6
V
VM
Motor block
2.7
5.5
V
0
VDD
V
Input voltage
VIN
DC output current (ch1 to 6ch)
ID(DC)
DC (during output independent operation)
−0.3
+0.3
A/ch
DC output current (ch7)
ID(DC)
DC (during output independent operation)
−0.4
+0.4
A/ch
Instantaneous output current
ID(pulse)
PW < 10 ms, Duty Cycle ≤ 20%
−0.6
+0.6
A/ch
(during output independent operation)
Capacitor capacitance
COSC
MOB pin output sink current
IMOB
Logic input frequency
fIN
Operating temperature range
TA
330
Open-drain output
−10
Data Sheet S16967EJ1V0DS
pF
5
mA
100
kHz
75
°C
21
µ PD168116A
Electrical Characteristics (Unless otherwise specified, TA = 25°C, VDD = 3.0 V, VM = 3.0 V)
Parameter
Symbol
Condition
MIN.
TYP.
MAX.
Unit
VDD pin current in standby mode
IDD(STB)
RESETB pin: Low level
1.0
µA
VDD pin current in during operation
IDD(ACT)
RESETB pin: High level
5.0
mA
High-level input current
IIH
VIN = VDD
60
µA
Low-level input current
IIL
VIN = 0 V
Input pulldown resistance
RIND
200
kΩ
High-level input voltage
VIH
2.7 V ≤ VDD ≤ 3.6 V
Low-level input voltage
VIL
2.7 V ≤ VDD ≤ 3.6 V
COSC oscillation frequency
fOSC
COSC = 330 pF
100
H-bridge on-state resistance
Ron
IM = 0.3 A, sum of upper and lower
1.0
1.5
Ω
1.5
2.0
Ω
1.0
µA
µA
−1.0
50
0.7 x VDD
V
0.3 x VDD
V
kHz
stages (ch1 to ch4, and ch7)
Ron56
IM = 0.3 A, sum of upper and lower
stages (ch5 and ch6)
Output leakage current
Note1
Low-voltage detection voltage
Internal reference voltage
Current detection ratio
Note2
IM(off)
Per VM pin, All control pin: low level
1.7
2.5
V
VREF
VDDS
ch1 to ch4
450
500
550
mV
VREF7
ch7
180
200
220
mV
IM = 0.1 A, with sense resistor of 2 kΩ,
950
1050
1150
0.02
0.35
1.0
µs
0.02
0.35
1.0
µs
Note2
ch1 to ch4
Output turn-on time
ton
Output turn-off time
toff
RL = 20 Ω
Notes 1. This IC has a circuit that prevents current from flowing into the VM pin when VDD = 0 V.
2. The motor current accuracy varies depending on the motor actually used. With this IC, the total of the
reference voltage EVRMAX error and the current sense circuit error is within ±10%.
22
Data Sheet S16967EJ1V0DS
µ PD168116A
13. PACKAGE DRAWING
56-PIN PLASTIC WQFN (8x8)
HD
D
D /2
HD /2
42
43
4−C0.5
29
28
A2
E /2
A1
HE E
C
DETAIL OF P PART
HE /2
15
14
56
1
x4
ZE
f
ZD
y1
A
S
c1 c2
S A B
b1
S
b
y
S
TERMINAL SECTION
P
x4
B
t
S A B
A
(UNIT:mm)
ITEM
D
E
7.75
f
0.20
HD
8.00
HE
8.00
t
0.20
A
0.67 +0.08
–0.04
A1
0.03 +0.02
–0.025
A2
0.64
b
0.23±0.05
b1
0.20±0.03
c
0.08MIN.
0.08MIN.
e
b
x
M
DIMENSIONS
7.75
0.17
c1
0.14−0.16
c2
0.14−0.20
Lp
e
0.50
S A B
Lp
NOTES
1 "t" AND "f" EXCLUDES MOLD FLASH
2 ALTHOUGH THERE ARE 4 TERMINALS IN THE CORNER PART
OF A PACKAGE, THESE TERMINALS ARE NOT DESIGNED FOR
INTERCONNECTION, BUT FOR MANUFACTURING PROCESS OF
THE PACKAGE, THEREFOR DO NOT INTEND TO SOLDER THESE
4 TERMINALS, SOLDERABLITY OF THE 4 TERMINALS ARE NOT
GUARANTEED.
Data Sheet S16967EJ1V0DS
0.40±0.10
x
0.05
y
0.08
y1
0.10
ZD
0.625
ZE
0.625
P56K9-50-9B4
23
µ PD168116A
14. RECOMMENDED SOLDERING CONDITIONS
The µ PD168116A should be soldered and mounted under the following recommended conditions.
For soldering methods and conditions other than those recommended below, contact an NEC Electronics sales
representative.
For technical information, see the following website.
Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html)
Type of Surface Mount Device
µ PD168116AK9-9B4-A: 56-pin plastic WQFN (8 x 8)
Process
Infrared reflow
Conditions
Symbol
Package peak temperature: 260°C, Time: 60 seconds MAX. (at 220°C or higher) ,
Count: Three times or less, Exposure limit: 3 days
Note
IR60-103-3
(after that, prebake at 125°C for
10 hours) , Flux: Rosin flux with low chlorine (0.2 Wt% or below) recommended.
<Precaution>
Products other than in heat-resistant trays (such as those packaged in a magazine,
taping, or non-thermal-resistant tray) cannot be baked in their package.
Note After opening the dry pack, store it a 25°C or less and 65% RH or less for the allowable storage period.
Caution Do not use different soldering methods together (except for partial heating) .
24
Data Sheet S16967EJ1V0DS
µ PD168116A
NOTES FOR CMOS DEVICES
1
PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note:
Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity
as much as possible, and quickly dissipate it once, when it has occurred. Environmental control
must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using
insulators that easily build static electricity. Semiconductor devices must be stored and transported
in an anti-static container, static shielding bag or conductive material. All test and measurement
tools including work bench and floor should be grounded. The operator should be grounded using
wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need
to be taken for PW boards with semiconductor devices on it.
2
HANDLING OF UNUSED INPUT PINS FOR CMOS
Note:
No connection for CMOS device inputs can be cause of malfunction. If no connection is provided
to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence
causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels
of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused
pin should be connected to V DD or GND with a resistor, if it is considered to have a possibility of
being an output pin. All handling related to the unused pins must be judged device by device and
related specifications governing the devices.
3
STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note:
Power-on does not necessarily define initial status of MOS device. Production process of MOS
does not define the initial operation status of the device. Immediately after the power source is
turned ON, the devices with reset function have not yet been initialized. Hence, power-on does
not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the
reset signal is received. Reset operation must be executed immediately after power-on for devices
having reset function.
Data Sheet S16967EJ1V0DS
25
µ PD168116A
Reference Documents
NEC Semiconductor Device Reliability/Quality Control System (C10983E)
Quality Grades On NEC Semiconductor Devices (C11531E)
• The information in this document is current as of December, 2003. The information is subject to
change without notice. For actual design-in, refer to the latest publications of NEC Electronics data
sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not
all products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
• No part of this document may be copied or reproduced in any form or by any means without the prior
written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may
appear in this document.
• NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from the use of NEC Electronics products listed in this document
or any other liability arising from the use of such products. No license, express, implied or otherwise, is
granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others.
• Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
circuits, software and information in the design of a customer's equipment shall be done under the full
responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by
customers or third parties arising from the use of these circuits, software and information.
• While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products,
customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To
minimize risks of damage to property or injury (including death) to persons arising from defects in NEC
Electronics products, customers must incorporate sufficient safety measures in their design, such as
redundancy, fire-containment and anti-failure features.
• NEC Electronics products are classified into the following three quality grades: "Standard", "Special" and
"Specific".
The "Specific" quality grade applies only to NEC Electronics products developed based on a customerdesignated "quality assurance program" for a specific application. The recommended applications of an NEC
Electronics product depend on its quality grade, as indicated below. Customers must check the quality grade of
each NEC Electronics product before using it in a particular application.
"Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio
and visual equipment, home electronic appliances, machine tools, personal electronic equipment
and industrial robots.
"Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support).
"Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems and medical equipment for life support, etc.
The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC
Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications
not intended by NEC Electronics, they must contact an NEC Electronics sales representative in advance to
determine NEC Electronics' willingness to support a given application.
(Note)
(1) "NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its
majority-owned subsidiaries.
(2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as
defined above).
M8E 02. 11-1