1/4 ◇Structure Silicon monolithic integrated circuit ◇Product Series Lens control LSI ◇Type BU24025MWV ◇Applications Digital still cameras ◇Functions ・driver (1-5 channels) : Voltage control type H-bridge(Adaptable to STM 2 systems) ・driver (6,7 channels) : Current control type H-bridge ◇Absolute maximum ratings (Ta 25℃) Symbol Parameter Power supply voltage Input voltage Limits Unit DVDD -0.3～4.5 V MVCC -0.3～7.0 V Remark VIN -0.3～DVDD+0.3 V ±500 mA Driver block (by MVCC pin) Input/output current IIN ＋50 mA by PIOUT pin Storage temperature range TSTG -55～125 C Operating temperature range TOPE -10～85 C Permissible dissipation 1 PD 3000 mW This product is not designed for anti-radiation applications. *1 To use this product at a temperature higher than Ta=25℃, reduce 30mW per 1℃ (At mounting ROHM’s standard board : 74.2mmx74.2mmx1.6tmm/4 layer Board ) ◇Operating conditions (Ta=25℃) Parameter Symbol Limits Unit Remark Digital power supply voltage DVDD 2.7～3.6 V DVDD≦MVCC 2.7～5.5 V Driver power supply voltage MVCC MHz Reference clock Clock operating frequency FCLK 1～27.5 ◇Electrical characteristics (Unless otherwise specified, Ta25℃, DVDD3.0V, MVCC5.0V, DVSSMGND 0.0V) Limits Parameter Symbol Unit Condition MIN. TYP. MAX. <Current consumption> Quiescence DVDD ISSD 0.45 1.5 mA CMD_RS=0 MVCC ISSVM 50 100 μA CMD_RS=0 Operation DVDD IDDD 6 10 mA <Logic block> Low-level input voltage VIL DVSS － 0.3DVDD V High-level input voltage VIH 0.7DVDD － DVDD V Low-level input current IIL 0 － 10 μA VIL = DVSS High-level input current IIH 0 － 10 μA VIH = DVDD Low-level output voltage VOL DVSS － 0.2DVDD V IOL = 1.0mA High-level output voltage VOH 0.8DVDD － DVDD V IOH = 1.0mA <PI driving circuit> Output voltage PIVO 0.16 0.50 V IIH = 30mA <Voltage driver block> ON-resistance Ron 1.5 2.0 Ω IO=±100 mA(the sum of high and low sides) OFF-leak current IOZ -10 0 10 μA Output Hiz setting Average voltage accuracy Vdiff -5 +5 ％ Vdiff setting: 010_1011 between differential output pins <Current driver block> ON-resistance Ron 1.1 1.5 Ω IO=±100 mA(the sum of high and low sides) OFF-leak current IOZ -10 0 10 μA Output Hiz setting Output current IO 190 200 210 mA DAC setting: 1000_0000 RRNF=1 [] REV. B 2/4 ◇3-wire serial interface Control commands are framed by 16-bit serial input (MSB first) and input through the CSB, SCLK, and SDATA pins. 4 higher-order bits specify addresses, while the remaining 12 bits specify data. Data of every bit is input through the SDATA pin, retrieved on the rising edges of SCLK. Data becomes valid in the CSB Low area. The loading timing is different in the resistor. (as shown in “Note4,5”) CSB SCLK x D15 D14 D13 D12 D11 D10 SDATA D9 D8 D7 Address D6 D5 D4 D3 D2 D1 D0 x Data ＜Register map＞ Address[3:0] Data[11:0] 15 14 13 12 11 0 0 0 0 0 0 0 1 10 9 8 7 ModeA[1:0] SelA[1:0] 0 6 5 4 3 2 1 0 Ach different output voltage[6:0] 0 0 0 0 Ach Cycle[7:0] 0 0 1 0 Ach Cycle[15:8] 0 1 1 0 A_BEXC 0 0 1 1 1 0 0 0 APOS[1:0] A_BSL A_AEXC 0 0 A_ASL 0 0 0 ASTOP 0 0 1 0 EnA RtA 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 ModeB[1:0] SelB[1:0] 0 0 0 0 0 B_ASL 0 4_chop[1:0] 1 0 0 1 0 Ach Pulse[9:0] Bch different output voltage [6:0] 0 Bch Cycle[7:0] 0 0 1 0 0 1 1 0 B_BEXC 0 0 Bch Cycle[15:8] 1 0 0 0 0 0 3_chop[1:0] 1 0 1 3_PWM_Ct[1:0] 1 1 0 4_PWM_Ct[1:0] 1 1 1 0 0 0 0 0 0 0 0 CacheM 0 0 B_BSL B_AEXC 0 3ch PWM_Duty[6:0] 4ch PWM_Duty[6:0] BPOS[1:0] 0 0 0 0 0 Isel P_CTRL 1 0 1 0 EnB RtB 1 0 1 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 0 1 0 0 0 0 0 5_Sel[1:0] 0 1 0 0 0 0 1 1 1 0 0 BSTOP 0 0 Bch Pulse[9:0] Chopping[1:0] 5_PWM_Ct[1:0] 0 CLK_DIV[2:0] 0 PI_CTRL1 PI_CTRL2 5_Chop[1:0] 5ch PWM_Duty[6:0] Current driver reference voltage adjustment6 (DAC6 output value) [7:0] 0 1 0 0 7ch_S 1 0 0 0 Current driver reference voltage adjustment7 (DAC7 output value) [7:0] 0 1 1 0 0 0 Addresses other than those above 7_PWM_Ct[1:0] 0 0 0 6ch_S 0 0 0 6_PWM_Ct[1:0] 0 CMD_RS Setting prohibited (Note 1) The notations A, B, in the register map correspond to Ach, Bch respectively. (Note 2) The Ach is defined as 1ch and 2ch driver output, the Bch as 3ch and 4ch driver output, (Note 3) After resetting (Power ON reset, and CMD_RS), “initial setting” is saved in all registers. (Note 4) For Mode, different output voltage, Cycle, En, and Rt registers, data that are written before the access to the Pulse register becomes valid, and determined at the rising edge of CSB after the access to the Pulse register. (The Mode, different output voltage, Cycle, En, Rt, and Pulse registers contain Cache registers, but any registers other than those do not contain with such registers.) (Note 5) For POS, STOP, chop, PWM_Ct, and PWM_duty registers, data are determined at the rising edge of CSB, and for any registers other than those, data are determined at the rising edge of 16th SCLK . REV. B 3/4 ◇Block Diagram ◇Pin functions No. Pin name Power supply 1 2 CSB SCLK DVDD DVDD 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 SDATA PIOUT1 OUT5A MVCC5 MGND5 OUT5B DVSS FCLK DVDD OUT1A MVCC12 OUT1B OUT2A MGND12 OUT2B PIOUT2 IN5A IN5B IN6A IN6B DVDD DVDD MVCC5 MVCC5 DVDD MVCC12 MVCC12 MVCC12 MVCC12 DVDD DVDD DVDD DVDD DVDD 18 19 20 21 22 Function CSB logic input SCLK logic input SDATA logic input PI driving output1 5-channel driver A output 5-channel driver power supply 5-channel driver ground 5-channel driver B output Digital ground FCLK logic input Digital power supply 1-channel drive A output 1-2channel driver power supply 1-channel drive B output 2-channel drive A output 1-2channel driver ground 2-channel drive B output PI driving output2 IN5A logic input IN5B logic input IN6A logic input IN6B logic input No. Pin name Power supply Function 23 24 SENSE6 VDDAMP67 VDDAMP67 - 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 OUT6A RNF6 OUT6B MGND67 OUT7A RNF7 OUT7B SENSE7 IN7A IN7B STATE11 STATE12 STATE21 STATE22 OUT3A RNF6 RNF6 RNF6 RNF7 RNF7 RNF7 VDDAMP67 DVDD DVDD DVDD DVDD DVDD DVDD MVCC34 Negative input for 6ch current driver Power supply of 6-7channel current driver control 6-channel driver A output 6-channel driver power supply 6-channel driver B output 6-7channel driver ground 7-channel driver A output 7-channel driver power supply 7-channel driver B output Negative input for 7ch current driver IN7A logic input IN7B logic input STATE11 logic output STATE12 logic output STATE21 logic output STATE22 logic output 3-channel driver A output 40 41 42 43 44 MVCC34 OUT3B OUT4A MGND34 OUT4B MVCC34 MVCC34 MVCC34 REV. B 3-4channel driver power supply 3-channel driver B output 4-channel driver A output 3-4channel driver ground 4-channel driver B output 4/4 ◇Outline dimensions/Marking figure 24025MWV ◇Pin assignment diagram 32 33 30 31 29 28 26 27 25 24 23 22 IN6B IN7B 34 STATE11 35 21 IN6A STATE12 36 20 IN5B STATE21 37 19 IN5A STATE22 38 18 PIOUT2 OUT3A 39 17 OUT2B MVCC34 40 16 MGND12 OUT3B 41 15 OUT2A OUT4A 42 14 OUT1B 13 MVCC12 MGND34 43 OUT4B 44 12 OUT1A 1 2 3 4 5 6 7 8 9 10 11 ◇Cautions on use (1) Absolute maximum ratings If applied voltage, operating temperature range, or other absolute maximum ratings are exceeded, the LSI may be damaged. Do not apply voltages or temperatures that exceed the absolute maximum ratings. If you expect that any voltage or temperature could be exceeding the absolute maximum ratings, take physical safety measures such as fuses to prevent any conditions exceeding the absolute maximum ratings from being applied to the LSI. (2) GND potential Maintain the GND pin at the minimum voltage even under any operating conditions. Actually check to be sure that none of the pins have voltage lower than that of GND pin, including transient phenomena. (3) Thermal design With consideration given to the permissible dissipation under actual use conditions, perform thermal design so that adequate margins will be provided. (4) Short circuit between pins and malfunctions To mount the LSI on a board, pay utmost attention to the orientation and displacement of the LSI. Faulty mounting to apply a voltage to the LSI may cause damage to the LSI. Furthermore, the LSI may also be damaged if any foreign matters enter between pins, between pin and power supply, or between pin and GND of the LSI. (5) Operation in strong magnetic field Make a thorough evaluation on use of the LSI in a strong magnetic field. Not doing so may malfunction the LSI. REV. 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