VIPER26 Fixed frequency VIPerTM plus family Features ■ 800 V avalanche rugged power section ■ PWM operation with frequency jittering for low EMI ■ Operating frequency: – 60 kHz for L type – 115 kHz for H type SO16 narrow SO-16 DIP-7 Description ■ Standby power < 50 mW at 265 VAC ■ Limiting current with adjustable set point ■ On-board soft-start ■ Safe auto-restart after a fault condition ■ Hysteretic thermal shutdown The device is an off-line converter with an 800 V avalanche ruggedness power section, a PWM controller, user defined overcurrent limit, protection against feedback network disconnection, hysteretic thermal protection, soft start up and safe auto restart after any fault condition. Advance frequency jittering reduces EMI filter cost. Burst mode operation and the devices very low consumption both help to meet the standard set by energy saving regulations. Application ■ Auxiliary power supply for appliances ■ Power metering ■ LED drivers ■ SMPS for set-top boxes, DVD players and recorders Figure 1. Typical topology (VOUT ≤VDDCSon) DC Output Voltage DC Input Voltage - DRAIN COMP VIPER26 GND Table 1. VDD LIM FB Device summary Order codes Package Packaging DIP-7 Tube VIPER26LN VIPER26HN VIPER26HD Tube VIPER26HDTR Tape and reel SO16 narrow VIPER26LD Tube VIPER26LDTR Tape and reel September 2010 Doc ID 17736 Rev 2 1/25 www.st.com 25 Contents VIPER26 Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Typical power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Typical electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 Typical circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 7 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 8 High voltage current generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 9 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 10 Soft start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 11 Adjustable current limit set point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 12 FB pin and COMP pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 13 Burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 14 Automatic auto restart after overload or short-circuit . . . . . . . . . . . . . 17 15 Open loop failure protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 16 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 17 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 2/25 Doc ID 17736 Rev 2 VIPER26 1 Block diagram Block diagram Figure 2. 2 Block diagram Typical power Table 2. Typical power 230 VAC Part number VIPER26 85-265 VAC Adapter(1) Open frame(2) Adapter(1) Open frame(2) 18 W 20 W 10 W 12 W 1. Typical continuous power in non ventilated enclosed adapter measured at 50 ° C ambient. 2. Maximum practical continuous power in an open frame design at 50 ° C ambient, with adequate heat sinking. Doc ID 17736 Rev 2 3/25 Pin settings 3 VIPER26 Pin settings Figure 3. Connection diagram (top view) .# .! !-V Note: The copper area for heat dissipation has to be designed under the DRAIN pins. Table 3. Pin description Pin n. Name Function DIP-7 SO16 1 1-2 GND Connected to the source of the internal power MOSFET and controller ground reference. - 4 N.A. Not available for user. It can be connected to GND (pins 1-2) or left not connected. 2 5 VDD Supply voltage of the control section. This pin provides the charging current of the external capacitor. 3 6 LIM This pin allows setting the drain current limitation. The limit can be reduced by connecting an external resistor between this pin and GND. Pin left open if default drain current limitation is used. FB Inverting input of the internal trans conductance error amplifier. Connecting the converter output to this pin through a single resistor results in an output voltage equal to the error amplifier reference voltage (See VFB_REF on Table 7). An external resistors divider is required for higher output voltages. 4 5 7,8 4/25 7 8 Output of the internal trans conductance error amplifier. The compensation network have to be placed between this pin and GND to achieve stability and good dynamic performance of the voltage control loop. The pin is used also COMP to directly control the PWM with an optocoupler. The linear voltage range extends from VCOMPL to VCOMPH (Table 7). High voltage drain pin. The built-in high voltage switched start-up bias 13-16 DRAIN current is drawn from this pin too. Pins connected to the metal frame to facilitate heat dissipation. Doc ID 17736 Rev 2 VIPER26 Electrical data 4 Electrical data 4.1 Maximum ratings Table 4. Symbol Value Pin (DIP-7) Parameter Unit Min VDRAIN 7, 8 Drain-to-source (ground) voltage EAV 7, 8 IAR Max 800 V Repetitive avalanche energy (limited by TJ = 150 °C) 5 mJ 7, 8 Repetitive avalanche current (limited by TJ = 150 °C) 1.5 A IDRAIN 7, 8 Pulse drain current (limited by TJ = 150 °C) 3 A VCOMP 5 Input pin voltage -0.3 3.5 V VFB 4 Input pin voltage -0.3 4.8 V VLIM 3 Input pin voltage -0.3 2.4 V VDD 2 Supply voltage -0.3 Self limited V IDD 2 Input current 20 mA Power dissipation at TA < 40 °C (DIP-7) 1 W 1.5 W PTOT TJ TSTG 4.2 Absolute maximum ratings Power dissipation at TA < 60 °C (SO16N) Operating junction temperature range -40 150 °C Storage temperature -55 150 °C Thermal data Table 5. Thermal data Max value Symbol Parameter Unit SO16N DIP-7 RthJP Thermal resistance junction pin (Dissipated power = 1 W) 25 35 ° C/W RthJA Thermal resistance junction ambient (Dissipated power = 1 W) 60 100 ° C/W RthJA Thermal resistance junction ambient (1) (Dissipated power = 1 W) 50 80 ° C/W 1. When mounted on a standard single side FR4 board with 100 mm2 (0.155 sq in) of Cu (35 µm thick) Doc ID 17736 Rev 2 5/25 Electrical data 4.3 VIPER26 Electrical characteristics (TJ = -25 to 125 °C, VDD = 14 V (a); unless otherwise specified) Table 6. Symbol VBVDSS IOFF RDS(on) COSS Table 7. Symbol Power section Parameter Test condition Min Typ Max Unit Break-down voltage IDRAIN = 1 mA, VCOMP = GND, TJ = 25 °C OFF state drain current VDRAIN = max rating, VCOMP = GND 60 µA IDRAIN = 0.2 A, TJ = 25 °C 7 Ω IDRAIN = 0.2 A, TJ = 125 °C 14 Ω Drain-source on state resistance Effective (energy related) output capacitance 800 VDRAIN = 0 to 640 V V 40 pF Supply section Parameter Test condition Min Typ Max Unit 60 80 100 V Voltage VDRAIN_START Drain-source start voltage IDDch1 Charging current during the start up VDRAIN = 100 V to 640 V, VDD = 4 V -0.6 -1.8 mA IDDch2 Charging current during the autorestart VDRAIN = 100 V to 640 V, VDD = 9 V falling edge -7 -13 mA 11.5 23.5 V VDD VDDclamp VDDon Operating voltage range VDD clamp voltage IDD = 15 mA 23.5 V VDD start up threshold 12 13 14 V VDDCSon VDD on internal high voltage current generator threshold 9.5 10.5 11.5 V VDDoff VDD under voltage shutdown threshold 7 8 9 V 0.6 mA 2.5 mA 3.5 mA 0.35 mA Current IDD0 Operating supply current, not switching FOSC = 0 kHz, VCOMP = GND VDRAIN = 120 V, IDD1 Operating supply current, switching FSW = 60 kHz VDRAIN = 120 V, FSW = 115 kHz IDDoff Operating supply current with VDD < VDDoff VDD < VDDoff IDDol Open loop failure current threshold VDD = VDDclamp VCOMP = 3.3 V, a. Adjust VDD above VDDon startup threshold before setting to 14 V 6/25 Doc ID 17736 Rev 2 4 mA VIPER26 Table 8. Electrical data Controller section Symbol Parameter Test condition Min Typ Max Unit Error amplifier VREF_FB IFB_PULL UP GM FB reference voltage 3.2 3.3 3.4 V Current pull up -1 µA Trans conductance 2 mA/V ILIM = -100 µA 0.5 V 3 V Current setting (LIM) pin VLIM_LOW Low level clamp voltage Compensation (COMP) pin VCOMPH Upper saturation limit TJ = 25 °C VCOMPL Burst mode threshold TJ = 25 °C VCOMPL_HYS Burst mode hysteresis HCOMP TJ = 25 °C Source / sink current Max source current 1.1 1.2 V 40 mV 3 V/A VFB = GND 15 kΩ VFB > 100 mV 150 µA VCOMP = GND, VFB = GND 220 µA ∆VCOMP / ∆IDRAIN RCOMP(DYN) Dynamic resistance ICOMP 1 Current limitation IDlim Drain current limitation tSS Soft-start time TON_MIN Minimum turn ON time IDlim_bm Burst mode current limitation ILIM = -10 µA, VCOMP = 3.3 V, TJ = 25 °C 0.66 0.7 0.74 8.5 ms 480 VCOMP = VCOMPL A ns 145 mA Overload time 50 ms Restart time after fault 1 s Overload tOVL tRESTART Oscillator section FOSC VIPER26L 54 60 66 kHz VIPER26H 103 115 127 kHz FOSC = 60 kHz ±4 kHz FOSC = 115 kHz ±8 kHz 230 Hz Switching frequency FD Modulation depth FM Modulation frequency DMAX Maximum duty cycle 70 80 % Thermal shutdown TSD THYST Thermal shutdown temperature Thermal shutdown hysteresis Doc ID 17736 Rev 2 150 160 °C 30 °C 7/25 Typical electrical characteristics VIPER26 5 Typical electrical characteristics Figure 4. IDlim vs TJ Figure 5. ,'/,0,'/,0#& )26&)26&#& FOSC vs TJ Figure 6. VDRAIN_START vs TJ Figure 7. 9'5$,1B67$579'5$,1B67$57#& HCOMP vs TJ +&203+&203#& Figure 8. GM vs TJ Figure 9. *0*0#& VREF_FB vs TJ 95()B)%95(B)%#& !-V !-V !-V 8/25 !-V !-V Doc ID 17736 Rev 2 !-V VIPER26 Typical electrical characteristics Figure 10. ICOMP vs TJ Figure 11. Operating supply current (no switching) vs TJ ,&203,&203#& ,'',''#& !-V !-V Figure 12. Operating supply current (switching) vs TJ Figure 13. IDlim vs RLIM ,'',''#& ,'/,0,'/,0#.2KP !-V !-V Figure 14. Power MOSFET on-resistance vs TJ Figure 15. Power MOSFET break down voltage vs TJ 5'6215'621#& %9'66%9'66#& !-V Doc ID 17736 Rev 2 !-V 9/25 Typical circuits VIPER26 Figure 16. Thermal shutdown VDD VDDon VDDCSon VDDoff time IDRAIN time TJ TSD TSD - THYST time Normal operation 6 Normal operation Shut down after over temperature Typical circuits Figure 17. Buck converter (VOUT>VDDCSon) $ 2FB !# ). $ 2 , 6)0%2 $2 !). 6$$ $ &" # # # #FB #/-0 2FB #/. 42 /, ,)- # '.$ 2COMP 2,)OPTIONAL #COMP ,OUT $OUT '2/5.$ 6/54 #OUT '2/5.$ !-V 10/25 Doc ID 17736 Rev 2 VIPER26 Typical circuits Figure 18. Fly-back converter (isolated) !#). 2 4 , #C L 2C L $ $ 6OUT $ $ 2 !#). # 6)0%2 $ 2!). 6$ $ # 2 # # &" # /- 0 # 2REF # /. 4 2 /, ,)- '.$ /04/ 2 2 # 2 2,)- # )# # 2REF '2/5. $ '2/5. $ !-V Figure 19. Flyback converter (primary regulation) !-V Doc ID 17736 Rev 2 11/25 Typical circuits VIPER26 Figure 20. Flyback converter (non isolated, VOUTmVDDCSon) 2IN , !#). $IN # # 2CL #CL 6/54 $OUT !#). $ #OUT $AUX 6)0%2 2FB 6$$ &" 2FB #/-0 # $2!). #/.42/, ,)- '.$ 2COMP #COMP #COMP 2,)- OPTIONAL !-V Figure 21. Flyback converter (non isolated, VOUT[VDDCSon) 12/25 Doc ID 17736 Rev 2 VIPER26 7 Power section Power section The power section is implemented with an n-channel power MOSFET with a breakdown voltage of 800 V min. and a typical RDS(on) of 7 Ω. It includes a SenseFET structure to allow a virtually lossless current sensing and the thermal sensor. The gate driver of the power MOSFET is designed to supply a controlled gate current during both turn-ON and turn-OFF in order to minimize common mode EMI. During UVLO conditions, an internal pull-down circuit holds the gate low in order to ensure that the power MOSFET cannot be turned ON accidentally. 8 High voltage current generator The high voltage current generator is supplied by the DRAIN pin. At the first start up of the converter, it is enabled when the voltage across the input bulk capacitor reaches the VDRAIN_START threshold, sourcing the IDDch1 current (see Table 7 on page 6); as the VDD voltage reaches the VDDon start-up threshold, the power section starts switching and the high voltage current generator is turned OFF. The VIPer26 is powered by the external source. After the start-up, the auxiliary winding or the diode connected to the output voltage have to power the VDD capacitor with voltage higher than VDDCSon threshold (see Table 7 on page 6). During the switching, the internal current source is disabled and the consumptions are minimized. In case of fault the switching is stopped and the device is self biased by the internal high voltage current source; it is activated between the levels VDDCSon and VDDon delivering the current IDDch2 to the VDD capacitor during the MOSFET off time, see Figure 22 on page 13. At converter power-down, the VDD voltage drops and the converter activity stops as it falls below VDDoff threshold (see Table 7 on page 6). Figure 22. Power on and power off VIN VIN < VDRAIN_START HV startup is no more activated VDRAIN_START VDD regulation is lost here time VDDon VDDCSon VDDoff VDRAIN time IDD time IDDch2 IDDch1 Power-on Normal operation Doc ID 17736 Rev 2 Power-off time 13/25 Oscillator 9 VIPER26 Oscillator The switching frequency is internally fixed at 60 kHz (VIPER26LN or LD) or 115 kHz (VIPER26HN or HD). In both cases the switching frequency is modulated by approximately ±4 kHz (60 kHz version) or ±8 kHz (115 kHz version) at 230 Hz (typical) rate, so that the resulting spreadspectrum action distributes the energy of each harmonic of the switching frequency over a number of sideband harmonics having the same energy on the whole but smaller amplitudes. 10 Soft start-up During the converters' start-up phase, the soft-start function progressively increases the cycle-by-cycle drain current limit, up to the default value IDlim. By this way the drain current is further limited and the output voltage is progressively increased reducing the stress on the secondary diode. The soft-start time is internally fixed to tSS, see typical value on Table 8 on page 7, and the function is activated for any attempt of converter start-up and after a fault event. This function helps prevent transformers' saturation during start-up and short-circuit. 11 Adjustable current limit set point The VIPer26 includes a current mode PWM controller: cycle by cycle the drain current is sensed through the integrated resistor RSENSE and the voltage is applied to the non inverting input of the PWM comparator, see Figure 2 on page 3. As soon as the sensed voltage is equal to the voltage derived from the COMP pin, the power MOSFET is switched OFF. In parallel with the PWM operations, the comparator OCP, see Figure 2 on page 3, checks the level of the drain current and switch OFF the power MOSFET in case the current is higher than the threshold IDlim, see Table 8 on page 7. The level of the drain current limit, IDlim, can be reduced depending from the sunk current from the pin LIM. The resistor RLIM, between LIM and GND pins, fixes the current sunk and than the level of the current limit, IDlim, see Figure 13 on page 9. When the LIM pin is left open or if the RLIM has an high value (i.e. > 80 kΩ) the current limit is fixed to its default value, IDlim, as reported on Table 8 on page 7. 14/25 Doc ID 17736 Rev 2 VIPER26 FB pin and COMP pin The device can be used both in non-isolated and in isolated topology. In case of nonisolated topology, the feedback signal from the output voltage is applied directly to the FB pin as inverting input of the internal error amplifier having the reference voltage, VREF_FB, see the Table 8 on page 7. The output of the error amplifier sources and sinks the current, ICOMP, respectively to and from the compensation network connected on the COMP pin. This signal is then compared, in the PWM comparator, with the signal coming from the SenseFET; the power MOSFET is switched off when the two values are the same on cycle by cycle basis. See the Figure 2 on page 3 and the Figure 23 on page 15. When the power supply output voltage is equal to the error amplifier reference voltage, VREF_FB, a single resistor has to be connected from the output to the FB pin. For higher output voltages the external resistor divider is needed. If the voltage on FB pin is accidentally left floating, an internal pull-up protects the controller. The output of the error amplifier is externally accessible through the COMP pin and it’s used for the loop compensation: usually an RC network. As reported on Figure 23 on page 15, in case of isolated power supply, the internal error amplifier has to be disabled (FB pin shorted to GND). In this case an internal resistor is connected between an internal reference voltage and the COMP pin, see the Figure 23 on page 15. The current loop has to be closed on the COMP pin through the opto-transistor in parallel with the compensation network. The VCOMP dynamics ranges is between VCOMPL and VCOMPH as reported on Figure 24 on page 16. When the voltage VCOMP drops below the voltage threshold VCOMPL, the converter enters burst mode, see Section 13 on page 16. When the voltage VCOMP rises above the VCOMPH threshold, the peak drain current will reach its limit, as well as the deliverable output power Figure 23. Feedback circuit Without Isolation: switch open & E/A enabled VREF With Isolation: switch closed & E/A disabled VOUT RCOMP VCOMPL + PWM stop - SW BUS FB from RSENSE - RH VREF_FB E/A + 12 FB pin and COMP pin + Isolation RL nR No Isolation to PWM - R COMP Doc ID 17736 Rev 2 15/25 Burst mode VIPER26 Figure 24. COMP pin voltage versus IDLIM ,'5$,1 , 'OLP ,'OLPBEP 9&203/ 9&203+ 9&203 !-V 13 Burst mode When the voltage VCOMP drops below the threshold, VCOMPL, the power MOSFET is kept in OFF state and the consumption is reduced to IDD0 current, as reported on Table 7 on page 6. As reaction at the energy delivery stop, the VCOMP voltage increases and as soon as it exceeds the threshold VCOMPL + VCOMPL_HYS, the converter starts switching again with consumption level equal to IDD1 current. This ON-OFF operation mode, referred to as “burst mode” and reported on Figure 25 on page 16, reduces the average frequency, which can go down even to a few hundreds hertz, thus minimizing all frequency-related losses and making it easier to comply with energy saving regulations. During the burst mode, the drain current limit is reduced to the value IDlim_bm (reported on Table 8 on page 7) in order to avoid the audible noise issue. Figure 25. Load-dependent operating modes: timing diagrams VCOMP VCOMPL +VCOMPL_HYS VCOMPL time IDD IDD1 IDD0 time IDRAIN IDlim_bm time Burst Mode 16/25 Doc ID 17736 Rev 2 VIPER26 14 Automatic auto restart after overload or short-circuit Automatic auto restart after overload or short-circuit The overload protection is implemented in automatic way using the integrated up-down counter. Every cycle, it is incremented or decremented depending if the current logic detects the limit condition or not. The limit condition is the peak drain current, IDlim , reported on Table 8 on page 7 or the one set by the user through the RLIM resistor, as reported in Figure 13 on page 9. After the reset of the counter, if the peak drain current is continuously equal to the level IDlim, the counter will be incremented till the fixed time, tOVL, after that will be disabled the power MOSFET switch ON. It will be activated again, through the soft start, after the tRESTART time, see the Figure 26 on page 17 and the mentioned time values on Table 8 on page 7. In case of overload or short-circuit event, the power MOSFET switching will be stopped after a time that depends from the counter and that can be as maximum equal to tOVL. The protection will occur in the same way until the overload condition is removed, see Figure 26 on page 17. This protection ensures restart attempts of the converter with low repetition rate, so that it works safely with extremely low power throughput and avoiding the IC overheating in case of repeated overload events. If the overload is removed before the protection tripping, the counter will be decremented cycle by cycle down to zero and the IC will not be stopped. Figure 26. Timing diagram: OLP sequence VDD SHORT CIRCUIT REMOVED HERE SHORT CIRCUIT OCCURS HERE VDDon VDDCSon time IDRAIN IDlim_bm t1* tOVL tRESTART tOVL tRESTART tSS tSS time tRESTART tSS * The time t1 can be lower or equal to the time tOVL Doc ID 17736 Rev 2 17/25 Open loop failure protection 15 VIPER26 Open loop failure protection In case the power supply is built in fly-back topology and the VIPer26 is supplied by an auxiliary winding, as shown in Figure 27 on page 18 and Figure 28 on page 19, the converter is protected against feedback loop failure or accidental disconnections of the winding. The following description is applicable for the schematics of Figure 27 on page 18 and Figure 28 on page 19, respectively the non-isolated fly-back and the isolated fly-back. If RH is opened or RL is shorted, the VIPer26 works at its drain current limitation. The output voltage, VOUT, will increase and so the auxiliary voltage, VAUX, which is coupled with the output through the secondary-to-auxiliary turns ratio. As the auxiliary voltage increases up to the internal VDD active clamp, VDDclamp (the value is reported on Table 8 on page 7) and the clamp current injected on VDD pin exceeds the latch threshold, IDDol (the value is reported on Table 8 on page 7), a fault signal is internally generated. In order to distinguish an actual malfunction from a bad auxiliary winding design, both the above conditions (drain current equal to the drain current limitation and current higher than IDDol through VDD clamp) have to be verified to reveal the fault. If RL is opened or RH is shorted, the output voltage, VOUT, will be clamped to the reference voltage VREF_FB (in case of non isolated fly-back) or to the external TL voltage reference (in case of isolated fly-back). Figure 27. FB pin connection for non-isolated fly-back 2 # !58 $ !58 6!58 6$$ 6$$ 6/54 6 #/-0, 07-STOP 2( "53 &" FROM2 3%.3% %! 6 2, TO07- 2%&?&" N2 2 #/-0 2S #P #S 18/25 Doc ID 17736 Rev 2 VIPER26 Open loop failure protection Figure 28. FB pin connection for isolated fly-back 2 # !58 $ !58 6!58 6$$ 6 2%&?&" 2 COMP 07-ST OP 6 #/-0, 37 "53 $ISABLE D &" 6/54 FROM2 3%.3% %! TO07- 6 2%&?&" N2 2 2OPTO 2 ( #/-0 2 5 2C #C #C OMP 4, 2 , Doc ID 17736 Rev 2 19/25 Package mechanical data 16 VIPER26 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Table 9. DIP-7 mechanical data mm Dim. Typ Min A 5.33 A1 0.38 A2 3.30 2.92 4.95 b 0.46 0.36 0.56 b2 1.52 1.14 1.78 c 0.25 0.20 0.36 D 9.27 9.02 10.16 E 7.87 7.62 8.26 E1 6.35 6.10 7.11 e 2.54 eA 7.62 eB 10.92 L 3.30 M 2.508 N 0.50 N1 O 20/25 Max 2.92 3.81 0.40 0.60 0.60 0.548 Doc ID 17736 Rev 2 VIPER26 Package mechanical data Figure 29. DIP-7 package dimensions Doc ID 17736 Rev 2 21/25 Package mechanical data Table 10. VIPER26 SO16N mechanical data mm Dim. Min Typ A 1.75 A1 0.1 A2 1.25 b 0.31 0.51 c 0.17 0.25 D 9.8 9.9 10 E 5.8 6 6.2 E1 3.8 3.9 4 e 0.25 1.27 h 0.25 0.5 L 0.4 1.27 k 0 8 ccc 22/25 Max 0.1 Doc ID 17736 Rev 2 VIPER26 Package mechanical data Figure 30. SO16N package dimensions Doc ID 17736 Rev 2 23/25 Revision history 17 VIPER26 Revision history Table 11. 24/25 Document revision history Date Revision Changes 26-Aug-2010 1 Initial release. 01-Sep-2010 2 Updated Figure 30 on page 23. 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