VN920D-B5 / VN920DSO ® HIGH SIDE DRIVER TYPE VN920D-B5 VN920DSO RDS(on) IOUT VCC 18 mΩ 30 A 36 V CMOS COMPATIBLE INPUT ON STATE OPEN LOAD DETECTION ■ OFF STATE OPEN LOAD DETECTION ■ SHORTED LOAD PROTECTION ■ UNDERVOLTAGE AND OVERVOLTAGE SHUTDOWN ■ PROTECTION AGAINST LOSS OF GROUND ■ VERY LOW STAND-BY CURRENT ■ P2PAK ■ ■ SO-16L ORDER CODES PACKAGE SO-16L P2PAK TUBE T&R VN920DSO VN920DSO13TR VN920D-B5 VN920D-B513TR REVERSE BATTERY PROTECTION (*) DESCRIPTION The VN920D-B5, VN920DSO are monolithic devices made by using STMicroelectronics VIPower M0-3 Technology, intended for driving any kind of load with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 BLOCK DIAGRAM transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart protect the device against overload. The device detects open load condition both is on and off state. Output shorted to VCC is detected in the off state. Device automatically turns off in case of ground pin disconnection. VCC OVERVOLTAGE DETECTION VCC CLAMP UNDERVOLTAGE DETECTION GND Power CLAMP DRIVER INPUT OUTPUT LOGIC CURRENT LIMITER ON STATE OPENLOAD DETECTION STATUS OVERTEMPERATURE DETECTION OFF STATE OPENLOAD AND OUTPUT SHORTED TO VCC DETECTION (*) See application schematic at page 8 January 2003 1/22 VN920D-B5 / VN920DSO ABSOLUTE MAXIMUM RATING Value Symbol Parameter VCC - VCC - IGND IOUT - IOUT IIN ISTAT DC Supply Voltage Reverse DC Supply Voltage DC Reverse Ground Pin Current DC Output Current Reverse DC Output Current DC Input Current DC Status Current Electrostatic Discharge (Human Body Model: R=1.5KΩ; C=100pF) VESD EMAX Ptot Tj Tc Tstg P2PAK SO-16L 41 - 0.3 - 200 Internally Limited - 25 +/- 10 +/- 10 V V mA A A mA mA - INPUT 4000 V - CURRENT SENSE 4000 V - OUTPUT 5000 V - VCC Maximum Switching Energy 5000 V 364 (L=0.25mH; RL=0Ω; Vbat=13.5V; Tjstart =150ºC; IL=45A) Power Dissipation TC=25°C Junction Operating Temperature Case Operating Temperature Storage Temperature 352 mJ 96.1 8.3 Internally Limited - 40 to 150 - 55 to 150 W °C °C °C CONNECTION DIAGRAM (TOP VIEW) VCC 5 OUTPUT 4 STATUS 3 VCC 2 INPUT 1 GND 1 VCC 16 N.C. OUTPUT GND OUTPUT INPUT OUTPUT STATUS N.C. OUTPUT OUTPUT OUTPUT N.C. VCC P2PAK 8 VCC 9 SO-16L CURRENT AND VOLTAGE CONVENTIONS IS IIN VCC INPUT ISTAT IOUT STATUS VCC OUTPUT GND VIN VSTAT 2/22 Unit IGND VOUT VN920D-B5 / VN920DSO THERMAL DATA Symbol Rthj-case Rthj-lead Rthj-amb Value Parameter Thermal Resistance Junction-case Thermal Resistance Junction-lead Thermal Resistance Junction-ambient Max Max Max P2PAK 1.3 51.3 (*) SO-16L 15 65 (**) Unit °C/W °C/W °C/W (*) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick). (**) When mounted on FR4 printed circuit board with 0.5cm2 of Cu (at least 35µ thick) connected to all VCC pins. ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C<Tj<150°C unless otherwise specified) POWER Symbol VCC VUSD VUSDhyst VOV RON Parameter Operating Supply Voltage Undervoltage Shut-down Undervoltage Shut-down hysteresis Overvoltage Shut-down On State Resistance Test Conditions Min 5.5 3 Typ 13 4 0.5 Supply Current Off State Output Current Off State Output Current Off State Output Current Off State Output Current V 36 18 V mΩ IOUT=10A 36 mΩ mΩ µA Off State; VCC=13V; VIN=VOUT=0V 10 50 25 Off State; VCC=13V; VIN=VOUT=0V; Tj=25°C 10 20 µA 5 50 0 5 3 mA µA µA µA µA Typ 50 50 See relative diagram See relative diagram Max Unit µs µs Typ Max 1.25 On State; VCC=13V; VIN=5V; IOUT=0A IL(off1) IL(off2) IL(off3) IL(off4) Unit V V IOUT=10A; Tj=25°C IOUT=3A; VCC=6V IS Max 36 5.5 VIN=VOUT=0V VIN=0V; VOUT=3.5V VIN=VOUT=0V; VCC=13V; Tj =125°C VIN=VOUT=0V; VCC=13V; Tj =25°C 0 -75 SWITCHING (VCC=13V) Symbol td(on) td(off) Parameter Turn-on Delay Time Turn-off Delay Time RL=1.3Ω RL=1.3Ω Test Conditions dVOUT/ dt(on) Turn-on Voltage Slope RL=1.3Ω dVOUT/ dt(off) Turn-off Voltage Slope RL=1.3Ω Min V/µs V/µs INPUT PIN Symbol VIL IIL VIH IIH VI(hyst) VICL Parameter Input Low Level Low Level Input Current Input High Level High Level Input Current Input Hysteresis Voltage Input Clamp Voltage Test Conditions VIN=1.25V Min 1 3.25 VIN=3.25V IIN=1mA IIN=-1mA 10 0.5 6 6.8 -0.7 8 Unit V µA V µA V V V 3/22 1 VN920D-B5 / VN920DSO ELECTRICAL CHARACTERISTICS (continued) STATUS PIN Symbol VSTAT ILSTAT CSTAT VSCL Parameter Test Conditions Status Low Output Voltage ISTAT=1.6mA Status Leakage Current Normal Operation VSTAT=5V Status Pin Input Normal Operation VSTAT=5V Capacitance ISTAT=1mA Status Clamp Voltage ISTAT=-1mA Min 6 Typ 6.8 Max 0.5 10 Unit V µA 100 pF 8 V -0.7 V PROTECTIONS Symbol TTSD TR Thyst tSDL Parameter Shut-down Temperature Reset Temperature Thermal Hysteresis Status delay in overload condition Ilim Current limitation Vdemag Turn-off Output Clamp Voltage Test Conditions Min 150 135 7 Typ 175 45 5.5V<VCC<36V IOUT=2A; VIN=0V; L=6mH Unit °C °C °C 20 µs 75 A 75 A 15 Tj>TTSD 30 Max 200 VCC-41 VCC-48 VCC-55 V OPENLOAD DETECTION Symbol IOL tDOL(on) VOL tDOL(off) Parameter Openload ON State Detection Threshold Openload ON State Detection Delay Openload OFF State Voltage Detection Test Conditions VIN=5V VIN=0V Max Unit 300 500 700 mA 250 µs 3.5 V 1000 µs 1.5 2.5 Threshold Openload Detection Delay at Turn Off OVERTEMP STATUS TIMING Tj > TTSD VIN VIN VSTAT VSTAT tDOL(off) 2 Typ IOUT=0A OPEN LOAD STATUS TIMING (with external pull-up) IOUT< IOL VOUT > VOL 4/22 Min tDOL(on) tSDL tSDL VN920D-B5 / VN920DSO Switching time Waveforms VOUT 90% 80% dVOUT/dt(off) dVOUT/dt(on) 10% t VIN td(on) td(off) t TRUTH TABLE CONDITIONS Normal Operation Current Limitation Overtemperature Undervoltage Overvoltage Output Voltage > VOL Output Current < IOL INPUT L H L H H L H L H L H L H L H OUTPUT L H L X X L L L L L L H H L H STATUS H H H (Tj < TTSD) H (Tj > TTSD) L H L X X H H L H H L 5/22 VN920D-B5 / VN920DSO ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN ISO T/R 7637/1 Test Pulse I II TEST LEVELS III IV 1 2 3a 3b 4 5 -25 V +25 V -25 V +25 V -4 V +26.5 V -50 V +50 V -50 V +50 V -5 V +46.5 V -75 V +75 V -100 V +75 V -6 V +66.5 V -100 V +100 V -150 V +100 V -7 V +86.5 V ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E 6/22 I C C C C C C TEST LEVELS RESULTS II III C C C C C C C C C C E E Delays and Impedance 2 ms 10 Ω 0.2 ms 10 Ω 0.1 µs 50 Ω 0.1 µs 50 Ω 100 ms, 0.01 Ω 400 ms, 2 Ω IV C C C C C E CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. VN920D-B5 / VN920DSO Figure1: Waveforms NORMAL OPERATION INPUT LOAD VOLTAGE STATUS UNDERVOLTAGE VUSDhyst VCC VUSD INPUT LOAD VOLTAGE STATUS undefined OVERVOLTAGE VCC<VOV VCC>VOV VCC INPUT LOAD VOLTAGE STATUS OPEN LOAD with external pull-up INPUT VOUT>VOL LOAD VOLTAGE VOL STATUS OPEN LOAD without external pull-up INPUT LOAD VOLTAGE STATUS Tj TTSD TR OVERTEMPERATURE INPUT LOAD CURRENT STATUS 7/22 VN920D-B5 / VN920DSO APPLICATION SCHEMATIC +5V +5V VCC Rprot STATUS Dld µC Rprot INPUT OUTPUT GND VGND GND PROTECTION REVERSE BATTERY NETWORK AGAINST Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND ≤ 600mV / (IS(on)max). 2) RGND ≥ (−VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the of the device’s datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggest to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1kΩ) should be inserted in parallel to DGND if the device will be driving an inductive load. RGND DGND This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. LOAD DUMP PROTECTION Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds VCC max DC rating. The same applies if the device will be subject to transients on the VCC line that are greater than the ones shown in the ISO T/R 7637/1 table. µC I/Os PROTECTION: If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot ) in line to prevent the µC I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of µC and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC I/Os. -VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V 5kΩ ≤ Rprot ≤ 65kΩ. Recommended Rprot value is 10kΩ. 8/22 1 VN920D-B5 / VN920DSO High Level Input Current Off State Output Current IL(off1) (uA) Iih (uA) 9 5 8 4.5 7 4 Vin=3.25V 3.5 6 3 5 2.5 4 2 3 1.5 2 1 1 0.5 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (°C) 50 75 100 125 150 175 100 125 150 175 100 125 150 175 Tc (°C) Input Clamp Voltage Input High Level Vih (V) Vicl (V) 3.6 8 7.8 3.4 Iin=1mA 7.6 3.2 7.4 3 7.2 2.8 7 6.8 2.6 6.6 2.4 6.4 2.2 6.2 2 6 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 50 75 Tc (°C) Tc (°C) Input Low Level Input Hysteresis Voltage Vil (V) Vhyst (V) 2.6 1.5 1.4 2.4 1.3 2.2 1.2 2 1.1 1.8 1 0.9 1.6 0.8 1.4 0.7 1.2 0.6 1 0.5 -50 -25 0 25 50 75 Tc (°C) 100 125 150 175 -50 -25 0 25 50 75 Tc (°C) 9/22 1 VN920D-B5 / VN920DSO ILIM Vs. Tcase Overvoltage Shutdown Vov (V) Ilim (A) 50 100 48 90 46 80 44 70 42 60 40 50 38 40 36 30 34 20 32 10 Vcc=13V 30 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 Tc (°C) 75 100 125 150 175 100 125 150 175 Tc (ºC) Turn-on Voltage Slope Turn-off Voltage Slope dVout/dt(on) (V/ms) dVout/dt(off) (V/ms) 700 550 500 650 600 Vcc=13V Rl=1.3Ohm 450 Vcc=13V Rl=1.3Ohm 400 550 350 500 300 450 250 200 400 150 350 100 300 50 0 250 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 50 75 Tc (°C) Tc (ºC) On State Resistance Vs. Tcase On State Resistance Vs. VCC Ron (mOhm) Ron (mOhm) 50 50 45 45 Iout=10A Iout=10A Vcc=8V; 36V 40 40 35 35 30 30 25 25 20 20 15 15 10 10 5 5 Tc=150ºC Tc=25ºC 0 Tc= -40ºC 0 -50 -25 0 25 50 75 Tc (ºC) 10/22 100 125 150 175 5 10 15 20 25 Vcc (V) 30 35 40 VN920D-B5 / VN920DSO Status Clamp Voltage Status Leakage Current Vscl (V) Ilstat(µA) 8 0.05 7.8 0.045 Istat=1mA Vstat=5V 0.04 7.6 0.035 7.4 0.03 7.2 0.025 7 0.02 6.8 0.015 6.6 0.01 6.4 0.005 6.2 6 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (ºC) Tc (ºC) Status Low Output Voltage Vstat (V) 0.8 0.7 Istat=1.6mA 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 -25 0 25 50 75 100 125 150 175 Tc (ºC) 11/22 VN920D-B5 / VN920DSO P2PAK Maximum turn off current versus load inductance ILM AX (A) 100 A B C 10 1 0.01 0.1 1 10 100 L(mH) A = Single Pulse at TJstart=150ºC B= Repetitive pulse at TJstart=100ºC C= Repetitive Pulse at TJstart=125ºC Conditions: VCC=13.5V Values are generated with RL=0Ω In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization t 12/22 VN920D-B5 / VN920DSO SO-16L Maximum turn off current versus load inductance ILMAX (A) 100 A B C 10 1 0.01 0.1 1 L(mH) 10 100 A = Single Pulse at TJstart=150ºC B= Repetitive pulse at TJstart=100ºC C= Repetitive Pulse at TJstart=125ºC Conditions: VCC=13.5V Values are generated with RL=0Ω In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization t 13/22 VN920D-B5 / VN920DSO P2PAK THERMAL DATA P2PAK PC Board Layout condition of Rth and Zth measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm, Cu thickness=35µm, Copper areas: 0.97cm2, 8cm2). Rthj-amb Vs. PCB copper area in open box free air condition RTHj_amb (°C/W) 55 Tj-Tamb=50°C 50 45 40 35 30 0 2 4 6 PCB Cu heatsink area (cm^2) 14/22 8 10 VN920D-B5 / VN920DSO SO-16L THERMAL DATA SO-16L PC Board Layout condition of Rth and Zth measurements (PCB FR4 area= 41mm x 48mm, PCB thickness=2mm, Cu thickness=35µm, Copper areas: 0.5cm2, 6cm2). Rthj-amb Vs. PCB copper area in open box free air condition 70 RTH j-amb (°C/W) 65 60 55 50 45 40 0 1 2 3 4 5 6 7 PCB Cu heatsink area (cm^2) 15/22 VN920D-B5 / VN920DSO SO-16L Thermal Impedance Junction Ambient Single Pulse ZTH (°C/W) 100 Footprint 6 cm2 10 1 0.1 0.01 0.0001 0.001 0.01 0.1 1 10 100 1000 Time (s) Thermal fitting model of a single channel HSD in SO-16L Pulse calculation formula Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ ) where δ = tp ⁄ T Thermal Parameter Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd T_amb 16/22 Area/island (cm2) R1 (°C/W) R2 (°C/W) R3 ( °C/W) R4 (°C/W) R5 (°C/W) R6 (°C/W) C1 (W.s/°C) C2 (W.s/°C) C3 (W.s/°C) C4 (W.s/°C) C5 (W.s/°C) C6 (W.s/°C) Footprint 0.02 0.1 2.2 12 15 35 0.0015 7.00E-03 1.50E-02 0.14 1 5 6 20 8 VN920D-B5 / VN920DSO P2PAK Thermal Impedance Junction Ambient Single Pulse ZTH (°C/W) 1000 100 Footprint 6 cm2 10 1 0.1 0.01 0.0001 0.001 0.01 0.1 1 Time (s) Thermal fitting model of a single channel HSD in P2PAK 10 100 1000 Pulse calculation formula Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ ) where δ = tp ⁄ T Thermal Parameter Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd T_amb Area/island (cm2) R1 (°C/W) R2 (°C/W) R3 (°C/W) R4 (°C/W) R5 (°C/W) R6 (°C/W) C1 (W.s/°C) C2 (W.s/°C) C3 (W.s/°C) C4 (W.s/°C) C5 (W.s/°C) C6 (W.s/°C) Footprint 0.02 0.1 0.22 4 9 37 0.0015 0.007 0.015 0.4 2 3 6 22 5 17/22 VN920D-B5 / VN920DSO P2PAK MECHANICAL DATA DIM. mm. MIN. TYP MAX. A 4.30 4.80 A1 2.40 2.80 A2 0.03 0.23 b 0.80 1.05 c 0.45 0.60 c2 1.17 1.37 D 8.95 D2 E 10.00 E1 e 9.35 8.00 10.40 8.50 3.20 3.60 e1 6.60 7.00 L 13.70 14.50 L2 1.25 1.40 L3 0.90 1.70 L5 1.55 2.40 0.40 R V2 Package Weight 0º 8º 1.40 Gr (typ) P010R 18/22 VN920D-B5 / VN920DSO SO-16L MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 2.65 0.1 0.2 b 0.35 b1 0.23 a2 0.104 0.004 0.008 0.49 0.014 0.019 0.32 0.009 0.012 2.45 C MAX. 0.096 0.5 0.020 c1 45° (typ.) D 10.1 10.5 0.397 0.413 E 10.0 10.65 0.393 0.419 e 1.27 e3 8.89 F 7.4 L 0.5 M S 0.050 0.350 7.6 0.291 1.27 0.020 0.75 0.300 0.050 0.029 8° (max.) 19/22 1 1 VN920D-B5 / VN920DSO P2PAK TUBE SHIPMENT (no suffix) 7.9 0.6 10.8 9.4 1.1 P2PAK SUGGESTED PAD LAYOUT Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) B 4.6 C 16.15 50 1000 532 18 33.1 1 All dimensions are in mm. All dimensions are in mm. A TAPE AND REEL SHIPMENT (suffix “13TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 24.4 60 30.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) All dimensions are in mm. 24 4 16 1.5 1.5 11.5 6.5 2 End Start Top cover tape No components Components 500mm min Empty components pockets saled with cover tape. User direction of feed 20/22 1 No components 500mm min VN920D-B5 / VN920DSO SO-16L TUBE SHIPMENT (no suffix) Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) C B 50 1000 532 3.5 13.8 0.6 All dimensions are in mm. A TAPE AND REEL SHIPMENT (suffix “13TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 16.4 60 22.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) All dimensions are in mm. 16 4 12 1.5 1.5 7.5 6.5 2 End Start Top No components Components No components cover tape 500mm min Empty components pockets saled with cover tape. 500mm min User direction of feed 21/22 1 VN920D-B5 / VN920DSO Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 2003 STMicroelectronics - Printed in ITALY- All Rights Reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 22/22