VT98521 3.3V Clock Multiplier Applications •= Low cost general-purpose clock source General Description The VT98521 is a 3.3V CMOS, clock multiplier integrated circuit. The device provides an excellent quality high frequency output clock from a lower frequency crystal or clock input. Tri-level selection inputs S0 and S1 are used to select any one of eight multipliers, stored in the on-board ROM, and apply it to the input to produce the desired output, up to 220 MHz. Phase Locked Loop (PLL) technology allows the device to use an input signal from an inexpensive crystal. When Output Enable (OE) is low, the clock output is in high impedance state. The VT98521, when used with an inexpensive crystal, provides a cost-effective clock source for most electronic systems. Features •= Low phase noise •= Fully Compatible with all popular CPUs •= Zero ppm multiplication error •= •= Input clock frequency 5 - 50 MHz. Duty Cycle - 45/55 up to 160 MHz. - 40/60 160 MHz to 220 MHz •= Input crystal frequency 5 – 27 MHz •= 25mA drive capability at TTL levels •= Output clock frequencies up to 220 MHz. •= High-Z output for board level testing •= 5V-tolerant inputs and output Figure 2. Pin Assignment Figure 1. Functional Block Diagram VDD GND 8-pin SOIC/MSOP S0 S1 Clock or Xtal X1/ICLK input Xtal. Osc. PLL Clock Multiplier & ROM Output Buffer X2 Optional caps 2002-02-25 CLK X1/ICLK 1 8 X2 VDD 2 7 OE GND 3 6 S0 S1 4 5 CLK Output Enable Page 1 MDST-0017-02 www.vaishali.com Vaishali Semiconductor 747 Camden Avenue, Suite C Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063 VT98521 Table 1. Clock Output Table S1 0 0 0 M M M 1 1 1 S0 0 M 1 0 M 1 0 M 1 CLK 4 x input 5.3125 x input 5 x input 6.25 x input Test* 3.125 x input 6 x input 3 x input 8 x input Minimum Input See table 6 20 MHz See table 6 4 MHz 8 MHz See table 6 See table 6 See table 6 0 = Connect to ground. 1 = Connect directly to VDD M = Leave unconnected (floating) * = For Vaishali internal test purposes only Table 2. Pin Description No. 1 2 3 4 5 6 7 8 Name X1/ICLK VDD GND S1 CLK S0 OE X2 Type I P P TI O TI I O Description Xtal connection or clock input. Connect to +3.3V Connect to ground. Select 1 for output clock. Connect to ground or VDD or float Clock output per table 2. Select 0 for output clock. Connect to ground or VDD or float. Output Enable. Tri- states CLK output when low. Xtal connection. Leave unconnected for clock input. Legend: I = Input TI = Tri-level Input O = Output P = Power supply connection Table 3. Absolute Maximum Ratings Parameter Conditions Supply voltage, VDD Referenced to GND Inputs and Clock Outputs Referenced to GND Soldering Temperature Max of 10 seconds Storage temperature 2002-02-25 Min -0.5 -65 Typ Max Units 4.6 V 4.6 V 260 °C 150 °C Page 2 MDST-0017-02 www.vaishali.com Vaishali Semiconductor 747 Camden Avenue, Suite C Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063 VT98521 Table 4. Operating Conditions Parameter Min Typ Max Units Ambient Operating Temperature 0 70 °C Operating Voltage, VDD 3 3.6 V Input High Voltage, VIH, X1 pin only 2.5 1.65 Input Low Voltage, VIL, X1 pin only 1.65 Input High Voltage, VIH, OE pin 0.5 V 2 V Input Low Voltage, VIL, OE pin Input High Voltage, VIH, trinary inputs V 0.8 V VDD-0.5 V Input Low Voltage, VIL, trinary inputs 0.5 V DC Characteristics Table 5. DC Characteristics VDD = 3V to 3.6V Parameter Condition Output High Voltage, VOH IOH=-25mA Output Low Voltage, VOL IOL=25mA Operating Supply Current, IDD (20 MHz Xtal) No Load, 100MHz Short Circuit Current CLK output Input Capacitance S0, S1, OE, X1, X2 Frequency synthesis error 2002-02-25 Min Typ Max 2.4 Units V 0.4 V 25 mA ±100 mA 4 pF 0 ppm Page 3 MDST-0017-02 www.vaishali.com Vaishali Semiconductor 747 Camden Avenue, Suite C Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063 VT98521 AC Characteristics Table 6 AC Characteristics VDD = 3V to 3.6V over the operating temperature range Symbol Parameter Condition Min Typ Max Units fosc Input Crystal Frequency 5 27 MHz fin Input clock frequency 5 50 MHz fout Output Frequency, 24 220 MHz tr Output Clock Rise Time 0.8 to 2.0V 1 ns tf Output Clock Fall Time 2.0 to 0.8V 1 ns tod Output Clock Duty Cycle 1.5 V up to 160 MHz 160 MHz to 220 MHz PLL Bandwidth 45 49 to 51 40 55 % 60 % 10 kHz TPZH, TPZL Output Enable Time, OE high to output on 50 ns TPHZ, TPLZ Output Disable time, OE low to Tri-state 50 ns tjit (abs) Absolute Clock period Jitter Deviation from mean 70 ps 25 ps fout = 160 MHz tjit (sigma) One Sigma Clock Period Jitter fout = 160 MHz Note1: External Crystal Connection. The external crystal should be connected in as close physical proximity to the VT98521 as possible. The crystal should be a fundamental mode, parallel resonant. Do not use third overtone. External load capacitors should be fitted in accordance with the crystal manufacturer’s specifications. Note2: Decoupling and termination. Decoupling capacitors of 0.01 µF and 0.1 µF should be connected between VDD and Ground. Capacitors should be mounted as close to the chip as possible. A 33Ω termination resistor may be connected in series with the clock output in order to minimize ringing and reflections. Figure 3. External Crystal Connection Block Diagram X2 Crystal XTAL OSC X1 CX2 C 33pF X1 CX1 PLL PLL CLOCK GEN. External Crystal Load Capacitors CLK3 CLK 106.25MHz OE 2002-02-25 Page 4 MDST-0017-02 www.vaishali.com Vaishali Semiconductor 747 Camden Avenue, Suite C Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063 VT98521 Package Dimensions. SYMBOLS MSOP A A1 A2 b c D E E1 L e oc OC1 VARIATIONS (ALL ARE IN MM) AA MIN NOM MAX 0 0.75 0.22 0.08 0.85 3.00 BSC 4.90 BSC 3.00 BSC 0.6 0.65 - 1.1 0.15 0.95 0.38 0.23 0.4 0° 5° 0.8 8° 15° All dimensions are in millimeters SYMBOLS SOIC A A1 B C D E1 e E h oc L N VARIATIONS (ALL ARE IN MM) AA MIN NOM MAX 1.35 .011 0.33 0.19 4.80 3.80 1.55 0.42 0.22 4.90 3.90 1.27 BSC 6.00 0.38 5° 8 1.75 0.25 0.51 0.25 5.00 4.00 5.80 0.25 0° 0.40 6.20 0.50 8° 1.27 All dimensions are in millimeters Ordering Information Part Number VT98521S1 VT98521S1X VT98521M VT98521MX VT98521/D VT98521/DW 2002-02-25 Marking VT98521S1 VT98521S1 VT98521M VT98521M Shipping/Packaging Tubes Tape & Reel Tubes Tape & Reel Dice in waffle-packs Dice in wafer form No. of Pins 8 8 8 8 Package SOIC SOIC MSOP MSOP Temperature o o 0 C to +70 C o o 0 C to +70 C o o 0 C to +70 C o o 0 C to +70 C o o 0 C to +70 C o o 0 C to +70 C Page 5 MDST-0017-02 www.vaishali.com Vaishali Semiconductor 747 Camden Avenue, Suite C Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063