W24L257A 32K × 8 HIGH-SPEED CMOS STATIC RAM GENERAL DESCRIPTION The W24L257A is a high-speed, low-power CMOS static RAM organized as 32768 × 8 bits that operates on a single 3.3-volt power supply. This device is manufactured using Winbond's high performance CMOS technology. FEATURES • • • • High-speed access time: 12/15/20 nS (max.) Low-power consumption: − Active: 200 mW (typ.) Single +3.3V power supply Fully static operation PIN CONFIGURATION • • • All inputs and outputs directly TTL compatible Three-state outputs Available packages: 28-pin 300 mil SOJ, skinny DIP and standard type one TSOP (8 mm × 13.4 mm) BLOCK DIAGRAM VDD A14 1 28 VDD A12 2 27 WE A7 3 26 A13 A6 4 25 A8 V SS A0 . . DECODER A5 5 24 A4 6 23 A11 A3 7 22 OE A2 8 21 A10 A1 9 20 CS A0 10 19 I/O8 I/O7 28-DIP A9 CS OE I/O1 11 18 I/O2 12 17 I/O6 I/O3 13 16 I/O5 VSS 14 15 I/O4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28-pin TSOP 28 27 26 25 24 23 22 21 20 19 18 17 16 15 CONTROL DATA I/O WE I/O1 . . I/O8 PIN DESCRIPTION SYMBOL OE A11 A9 A8 A13 WE VDD A14 A12 A7 A6 A5 A4 A3 CORE ARRAY ARRAY A14 A0−A14 A10 CS I/O8 I/O7 I/O6 I/O5 I/O4 VSS I/O3 I/O2 I/O1 A0 A1 A2 I/O1−I/O8 -1- DESCRIPTION Address Inputs Data Inputs/Outputs CS Chip Select Input WE Write Enable Input OE Output Enable Input VDD Power Supply VSS Ground Publication Release Date: December 1996 Revision A5 W24L257A TRUTH TABLE CS OE WE MODE VDD CURRENT H X X Not Selected High Z ISB, ISB1 L H H Output Disable High Z IDD L L H Read Data Out IDD L X L Write Data In IDD I/O1−I/O8 DC CHARACTERISTICS Absolute Maximum Ratings PARAMETER RATING UNIT -0.5 to +4.6 V Input/Output to VSS Potential -0.5 to VDD +0.5 V Allowable Power Dissipation 1.0 W -65 to +150 °C 0 to +70 °C Supply Voltage to VSS Potential Storage Temperature Operating Temperature Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. Operating Characteristics (VDD = 3.3V ± 5%, VSS = 0V, Ta = 0 to 70° C) PARAMETER Input Low Voltage Input High Voltage Input Leakage Current SYM . VIL VIH ILI Output Leakage Current ILO Output Low Voltage Output High Voltage Operating Power VOL VOH IDD Supply Current Standby Power Supply Current TEST CONDITIONS MIN TYP MAX. . . -0.5 +0.8 +2.0 VDD +0.3 -10 +10 VIN = VSS to VDD VI/O = VSS to VDD, CS = VIH (min.) or OE = VIH (min.) or WE = VIL (max.) IOL = +8.0 mA IOH = -4.0 mA 12 CS = VIL (max.), I/O = 0 mA Cycle = min. Duty = 100% 15 20 ISB CS = VIH (min.), Cycle = min. Duty = 100% ISB1 CS ≥ VDD -0.2V Note: Typical characteristics are at VDD = 3.3V, Ta = 25° C. -2- UNIT V V µA -10 - + 10 µA 2.4 - - 0.4 150 V V mA - - 120 100 20 mA mA mA - - 200 µA W24L257A CAPACITANCE (VDD = 3.3V, Ta = 25° C, f = 1 MHz) PARAMETER SYM. CONDITIONS MAX. UNIT Input Capacitance CIN VIN = 0V 6 pF Input/Output Capacitance CI/O VOUT = 0V 8 pF Note: These parameters are sampled but not 100% tested. AC CHARACTERISTICS AC Test Conditions PARAMETER CONDITIONS Input Pulse Levels 0V to 3V Input Rise and Fall Times 3 nS Input and Output Timing Reference Level 1.5V Output Load CL = 30 pF, IOH/IOL = -4 mA/8 mA AC Test Loads and Waveform R1 320 ohm R1 320 ohm 3.3V 3.3V OUTPUT OUTPUT 30 pF Including Jig and Scope 5 pF R2 350 ohm Including Jig and Scope R2 350 ohm (For TCLZ, TOLZ, TCHZ, TOHZ , TWHZ , TOW) 3.0V 0V 90% 10% 90% 10% 3 nS 3 nS -3- Publication Release Date: December 1996 Revision A5 W24L257A AC Characteristics, continued (VDD = 3.3V ± 5%, VSS = 0V, Ta = 0 to 70° C) (1) Read Cycle PARAMETER SYM. W24L257A-12 W24L257A-15 W24L257A-20 MIN. MAX. MIN. MAX. MIN. MAX. UNIT Read Cycle Time TRC 12 - 15 - 20 - nS Address Access Time TAA - 12 - 15 - 20 nS Chip Select Access Time TACS - 12 - 15 - 20 nS Output Enable to Output Valid TAOE - 6 - 8 - 10 nS Chip Selection to Output in Low Z TCLZ* 4 - 4 - 4 - nS Output Enable to Output in Low Z TOLZ* 0 - 0 - 0 - nS Chip Deselection to Output in High Z TCHZ* - 6 - 7 - 10 nS Output Disable to Output in High Z TOHZ* - 6 - 7 - 10 nS Output Hold from Address Change TOH 3 - 3 - 3 - nS ∗These parameters are sampled but not 100% tested (2) Write Cycle PARAMETER SYM. W24L257A-12 W24L257A-15 W24L257A-20 MIN. MAX. MIN. MAX. MIN. MAX. UNIT Write Cycle Time TWC 12 - 15 - 20 - nS Chip Selection to End of Write TCW 10 - 13 - 17 - nS Address Valid to End of Write TAW 10 - 13 - 17 - nS Address Setup Time TAS 0 - 0 - 0 - nS Write Pulse Width TWP 10 - 10 - 12 - nS TWR 1 - 1 - 1 - nS Data Valid to End of Write TDW 7 - 9 - 10 - nS Data Hold from End of Write TDH 0 - 0 - 0 - nS Write to Output in High Z TWHZ* - 7 - 8 - 10 nS Output Disable to Output in High Z TOHZ* - 7 - 8 - 10 nS Output Active from End of Write TOW 0 - 0 - 0 - nS Write Recovery Time CS , WE ∗These parameters are sampled but not 100% tested -4- W24L257A TIMING WAVEFORMS Read Cycle 1 (Address Controlled) TRC Address TAA TOH TOH DOUT Read Cycle 2 (Chip Select Controlled) CS TACS DOUT TCHZ TCLZ Read Cycle 3 (Output Enable Controlled) T RC Address T AA OE T OH T AOE T OLZ CS T ACS D OUT T CHZ T OHZ TCLZ -5- Publication Release Date: December 1996 Revision A5 W24L257A Timing Waveforms, continued Write Cycle 1 (OE Clock) TWC Address T WR OE TCW CS T AW WE TWP TAS TOHZ (1,4) D OUT T DW TDH D IN Write Cycle 2 (OE = VIL Fixed) T WC Address TWR TCW CS TAW WE T WP TAS TOH TWHZ (1, 4) DOUT TDW (2) (3) TOW TDH DIN Notes: 1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied. 2. The data output from DOUT are the same as the data written to DIN during the write cycle. 3. DOUT provides the read data for the next address. 4. Transition is measured ±500 mV from steady state with CL = 5 pF. This parameter is guaranteed but not 100% tested. -6- W24L257A ORDERING INFORMATION PART NO. ACCESS TIME (nS) OPERATING CURRENT MAX. (mA) 150 120 100 150 120 100 150 STANDBY CURRENT MAX. (µA) 200 200 200 200 200 200 200 W24L257AK-12 W24L257AK-15 W24L257AK-20 W24L257AJ-12 W24L257AJ-15 W24L257AJ-20 W24L257AQ-12 12 15 20 12 15 20 12 W24L257AQ-15 W24L257AQ-20 PACKAGE 300 mil Skinny 300 mil Skinny 300 mil Skinny 300 mil SOJ 300 mil SOJ 300 mil SOJ Standard type one TSOP 15 120 200 Standard type one TSOP 20 100 200 Standard type one TSOP Notes: 1. Winbond reserves the right to make changes to its products without prior notice. 2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure. -7- Publication Release Date: December 1996 Revision A5 W24L257A PACKAGE DIMENSIONS 28-pin P-DIP Skinny Dimension in Inches Symbol A A1 A2 B B1 c D E E1 e1 L D 28 15 E1 1 eA S Notes: E S c Base Plane A A2 A1 L Mounting Plane e1 Max. 4.45 0.25 0.010 0.125 0.130 0.135 3.18 3.30 3.43 0.016 0.018 0.022 0.41 0.46 0.56 0.058 0.060 0.064 1.47 1.52 1.63 0.008 0.010 0.014 0.20 0.25 0.36 1.388 1.400 35.26 35.56 0.300 0.310 0.320 7.62 7.87 8.13 0.283 0.288 0.293 7.19 7.32 7.44 0.090 0.100 0.110 2.29 2.54 2.79 0.120 0.130 0.140 3.05 3.30 3.56 15° 0° 0.370 8.38 8.89 9.40 0° 0.330 0.350 15° 0.055 1.40 1. Dimensions D Max. & S include mold flash or tie bar burrs. 2. Dimension E1 does not include interlead flash. 3. Dimensions D & E1 include mold mismatch and are determined at the mold parting line. 4. Dimension B1 does not include dambar protrusion/intrusion. 5. Controlling dimension: Inches. 6. General appearance spec. should be based on final visual inspection spec. eA a B1 Dimension in mm Min. Nom. Max. 0.175 a 14 B Min. Nom. 28-pin Small Outline J Band Symbol A A1 A2 b1 b c D E e e1 HE L S y θ 15 28 E 1 HE 14 Dimension in Inches Dimension in mm Min. Nom. Max. Min. Nom. Max. 0.140 0.027 3.56 0.69 0.095 0.100 0.105 2.41 2.54 2.67 0.026 0.028 0.032 0.66 0.71 0.81 0.016 0.018 0.022 0.41 0.46 0.56 0.008 0.010 0.014 0.20 0.25 0.36 0.710 0.730 18.03 18.54 0.305 7.49 7.62 7.75 1.42 0.295 0.300 0.044 0.050 0.056 1.12 1.27 0.245 0.265 0.285 6.22 6.73 7.24 0.327 0.337 0.347 8.31 8.56 8.81 0.077 0.087 0.097 1.96 2.21 0.045 0.10 0.004 0 10 2.46 1.14 0 10 Notes: D c A2 s b b1 A L £c e e1 A1 Seating Plane y -8- 1. Dimensions D Max. & S include mold flash or tie bar burrs. 2. Dimension b does not include dambar protrusion/intrusion. 3. Dimensions D & E include mold mismatch and are determined at the mold parting line. 4. Controlling dimension: Inches. 5. General appearance spec. should be based on final visual inspection spec. W24L257A Package Dimensions, continued 28-pin Standard Type One TSOP HD Dimension In Inches Dimension In mm Symbol Min. D A A1 A2 b c D E HD e L L1 Y θ c 1 e E b θ Nom. Max. Min. Nom. 0.047 0.002 Max. 1.20 0.006 0.05 0.15 0.035 0.040 0.041 0.95 0.007 0.008 0.011 0.17 0.20 0.27 0.004 0.006 0.008 0.10 0.15 0.21 0.461 0.465 0.469 11.70 11.80 11.90 0.311 0.315 0.319 7.90 8.00 8.10 0.520 0.528 0.536 13.20 13.40 13.60 0.028 0.50 0.022 0.020 0.024 0 3 1.05 0.55 0.010 0.000 1.00 0.60 0.70 0.25 0.004 0.00 5 0 0.10 3 5 A A1 L A2 Controlling dimension: Millimeters Y L1 Headquarters Winbond Electronics (H.K.) Ltd. No. 4, Creation Rd. III, Science-Based Industrial Park, Hsinchu, Taiwan TEL: 886-3-5770066 FAX: 886-3-5792647 http://www.winbond.com.tw/ Voice & Fax-on-demand: 886-2-7197006 Rm. 803, World Trade Square, Tower II, 123 Hoi Bun Rd., Kwun Tong, Kowloon, Hong Kong TEL: 852-27513100 FAX: 852-27552064 Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab. 2730 Orchard Parkway, San Jose, CA 95134, U.S.A. TEL: 1-408-9436666 FAX: 1-408-9436668 Taipei Office 11F, No. 115, Sec. 3, Min-Sheng East Rd., Taipei, Taiwan TEL: 886-2-7190505 FAX: 886-2-7197502 Note: All data and specifications are subject to change without notice. -9- Publication Release Date: December 1996 Revision A5