PHILIPS Z00607MA

Z00607MA
Triac logic level
Rev. 01 — 26 February 2008
Product data sheet
1. Product profile
1.1 General description
Passivated sensitive gate triac in a SOT54 plastic package
1.2 Features
n Sensitive gate
n Direct interfacing to logic level ICs
n Gate triggering in four quadrants
n Direct interfacing to low power gate drive
circuits
1.3 Applications
n General purpose switching and phase
control
n Low power AC fan speed controllers
1.4 Quick reference data
n VDRM ≤ 600 V
n IGT ≤ 5 mA
n IGT ≤ 7 mA (T2− G+)
n IT(RMS) ≤ 0.8 A
n ITSM ≤ 9 A (t = 20 ms)
2. Pinning information
Table 1.
Pinning
Pin
Description
Simplified outline
Graphic symbol
1
main terminal 2 (T2)
2
gate (G)
T2
3
main terminal 1 (T1)
sym051
T1
G
321
SOT54 (TO-92)
Z00607MA
NXP Semiconductors
Triac logic level
3. Ordering information
Table 2.
Ordering information
Type number
Package
Z00607MA
Name
Description
Version
TO-92
plastic single-ended leaded (through hole) package; 3 leads
SOT54
4. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
VDRM
repetitive peak off-state voltage
IT(RMS)
RMS on-state current
full sine wave; Tlead ≤ 55 °C; see
Figure 4 and 5
ITSM
non-repetitive peak on-state current
full sine wave; Tj = 25 °C prior to
surge; see Figure 2 and 3
I2t
I2t
dIT/dt
rate of rise of on-state current
for fusing
Conditions
Min
Max
Unit
-
600
V
-
0.8
A
t = 20 ms
-
9
A
t = 16.7 ms
-
10
A
-
0.32
A2s
T2+ G+
-
50
A/µs
T2+ G−
-
50
A/µs
T2− G−
-
50
A/µs
T2− G+
-
10
A/µs
-
1
A
-
5
W
-
0.1
W
tp = 10 ms
ITM = 1 A; IG = 20 mA;
dIG/dt = 0.2 A/µs
IGM
peak gate current
PGM
peak gate power
PG(AV)
average gate power
Tstg
storage temperature
−40
+150
°C
Tj
junction temperature
-
125
°C
over any 20 ms period
Z00607MA_1
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 01 — 26 February 2008
2 of 12
Z00607MA
NXP Semiconductors
Triac logic level
003aac209
1.2
Ptot
(W)
0.8
conduction
angle
(degrees)
form
factor
a
30
60
90
120
180
4
2.8
2.2
1.9
1.57
α = 180°
120°
90°
α
60°
30°
0.4
0.0
0
0.2
0.4
0.6
0.8
1
IT(RMS) (A)
α = conduction angle
Fig 1.
Total power dissipation as a function of RMS on-state current; maximum values
003aac207
12
ITSM
(A)
8
ITSM
IT
4
t
1/f
Tj(init) = 25 °C max
0
1
102
10
103
number of cycles
f = 50 Hz
Fig 2.
Non-repetitive peak on-state current as a function of the number of sinusoidal current cycles; maximum
values
Z00607MA_1
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 01 — 26 February 2008
3 of 12
Z00607MA
NXP Semiconductors
Triac logic level
003aac208
103
ITSM
IT
ITSM
(A)
t
tp
Tj(init) = 25 °C max
102
(1)
(2)
10
10-5
10-4
10-3
10-2
tp (s)
10-1
tp ≤ 20 ms
(1) dIT/dt limit
(2) T2− G+ quadrant limit
Fig 3.
Non-repetitive peak on-state current as a function of pulse width; maximum values
003aaa617
12
IT(RMS)
(A)
10
003aaa616
1
IT(RMS)
(A)
0.8
8
0.6
6
0.4
4
0.2
2
0
10-2
10-1
0
-50
1
10
surge duration (s)
0
50
100
150
Tlead (°C)
f = 50 Hz
Tlead = 55 °C
Fig 4.
RMS on-state current as a function of surge
duration; maximum values
Fig 5.
RMS on-state current as a function of lead
temperature; maximum values
Z00607MA_1
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 01 — 26 February 2008
4 of 12
Z00607MA
NXP Semiconductors
Triac logic level
5. Thermal characteristics
Table 4.
Thermal characteristics
Symbol
Parameter
Rth(j-lead)
Rth(j-a)
Conditions
Min
Typ
Max
Unit
thermal resistance from junction to full cycle; see Figure 6
lead
-
-
60
K/W
thermal resistance from junction to full cycle; printed circuit
ambient
board mounted; lead
length = 4 mm
-
150
-
K/W
003aac206
102
Zth(j-lead)
(K/W)
10
1
P
10−1
tp
t
10−2
10−5
Fig 6.
10−4
10−3
10−2
10−1
1
tp (s)
10
Transient thermal impedance from junction to lead as a function of pulse width
Z00607MA_1
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 01 — 26 February 2008
5 of 12
Z00607MA
NXP Semiconductors
Triac logic level
6. Static characteristics
Table 5.
Static characteristics
Tj = 25 °C unless otherwise specified.
Symbol Parameter
IGT
IL
gate trigger current
latching current
Conditions
Min
Typ
Max
Unit
T2+ G+
-
1
5
mA
T2+ G−
-
2
5
mA
T2− G−
-
2
5
mA
T2− G+
-
4
7
mA
T2+ G+
-
1
10
mA
T2+ G−
-
5
10
mA
T2− G−
-
1
10
mA
T2− G+
VD = 12 V; IT = 0.1 A; see Figure 8
VD = 12 V; IG = 0.1 A; see Figure 10
-
2
10
mA
IH
holding current
VD = 12 V; IG = 0.1 A; see Figure 11
-
1
10
mA
VT
on-state voltage
IT = 0.85 A; see Figure 9
-
1.35
1.6
V
VGT
gate trigger voltage
VD = 12 V; IT = 0.1 A; see Figure 7
-
0.9
2
V
ID
off-state current
VD = VDRM; IT = 0.1 A; Tj = 110 °C
0.1
0.7
-
V
VD = VDRM(max); Tj = 125 °C
-
0.1
0.5
mA
Z00607MA_1
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 01 — 26 February 2008
6 of 12
Z00607MA
NXP Semiconductors
Triac logic level
7. Dynamic characteristics
Table 6.
Dynamic characteristics
Symbol Parameter
Conditions
Min
Typ
Max
Unit
30
45
-
V/µs
VDM = VDRM(max); Tj = 50 °C; ITM = 0.84 A;
dIcom/dt = 0.3 A/ms
-
5
-
V/µs
ITM = 1 A; VD = VDRM(max); IG = 25 mA;
dIG/dt = 5 A/µs
-
2
-
µs
rate of rise of off-state voltage VDM = 0.67 × VDRM(max); Tj = 110 °C; exponential
waveform; gate open circuit
dVD/dt
dVcom/dt rate of change of
commutating voltage
gate-controlled turn-on time
tgt
003aaa039
1.6
003aaa030
3
VGT
IGT
VGT(25°C)
IGT(25°C)
(1)
(2)
1.2
2
(3)
(4)
0.8
(1)
(2)
(3)
1
(4)
0.4
0
−60
−10
40
90
0
−60
140
Tj (°C)
−10
40
90
140
Tj (°C)
(1) T2− G−
(2) T2+ G−
(3) T2+ G+
(4) T2− G+
Fig 7.
Normalized gate trigger voltage as a function
of junction temperature
Fig 8.
Normalized gate trigger current as a function
of junction temperature
Z00607MA_1
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 01 — 26 February 2008
7 of 12
Z00607MA
NXP Semiconductors
Triac logic level
003aab486
1.6
003aaa031
3
IT
(A)
IL
IL(25°C)
1.2
2
0.8
1
(1)
(2)
(3)
0.4
0
0
0.4
0.8
1.2
1.6
VT (V)
0
−60
2
−10
40
90
140
Tj (°C)
Vo = 1.171 V
Rs = 0.5125 Ω
(1) Tj = 125 °C; typical values
(2) Tj = 125 °C; maximum values
(3) Tj = 25 °C; maximum values
Fig 9.
On-state current as a function of on-state
voltage
Fig 10. Normalized latching current as a function of
junction temperature
003aaa032
2.0
IH
IH(25°C)
1.5
1.0
0.5
0
−60
−10
40
90
140
Tj (°C)
Fig 11. Normalized holding current as a function of junction temperature
Z00607MA_1
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 01 — 26 February 2008
8 of 12
Z00607MA
NXP Semiconductors
Triac logic level
8. Package outline
Plastic single-ended leaded (through hole) package; 3 leads
SOT54
c
E
d
A
L
b
1
e1
2
D
e
3
b1
L1
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
b
b1
c
D
d
E
mm
5.2
5.0
0.48
0.40
0.66
0.55
0.45
0.38
4.8
4.4
1.7
1.4
4.2
3.6
e
2.54
e1
L
L1(1)
1.27
14.5
12.7
2.5
max.
Note
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.
OUTLINE
VERSION
REFERENCES
IEC
SOT54
JEDEC
JEITA
TO-92
SC-43A
EUROPEAN
PROJECTION
ISSUE DATE
04-06-28
04-11-16
Fig 12. Package outline SOT54 (TO-92)
Z00607MA_1
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 01 — 26 February 2008
9 of 12
Z00607MA
NXP Semiconductors
Triac logic level
9. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
Z00607MA_1
20080226
Product data sheet
-
-
Z00607MA_1
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 01 — 26 February 2008
10 of 12
Z00607MA
NXP Semiconductors
Triac logic level
10. Legal information
10.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
10.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
10.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
10.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
11. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
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Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 01 — 26 February 2008
11 of 12
Z00607MA
NXP Semiconductors
Triac logic level
12. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
10
10.1
10.2
10.3
10.4
11
12
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10
Legal information. . . . . . . . . . . . . . . . . . . . . . . 11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Contact information. . . . . . . . . . . . . . . . . . . . . 11
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2008.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 26 February 2008
Document identifier: Z00607MA_1