NSC 74F821SC

54F/74F821
10-Bit D-Type Flip-Flop
General Description
Features
The ’F821 is a 10-bit D-type flip-flop with TRI-STATEÉ true
outputs arranged in a broadside pinout. The ’F821 is functionally and pin compatible with the AMD’s Am29821.
Y
Commercial
Y
TRI-STATE Outputs
Direct replacement for AMD’s Am29821
Package
Number
Military
74F821SPC
54F821SDM (Note 2)
Package Description
N24C
24-Lead (0.300× Wide) Molded Dual-In-Line
J24F
24-Lead (0.300× Wide) Ceramic Dual-In-Line
M24B
24-Lead (0.300× Wide) Molded Small Outline, JEDEC
54F821FM (Note 2)
W24C
24-Lead Cerpack
54F821LM (Note 2)
E28A
24-Lead Ceramic Leadless Chip Carrier, Type C
74F821SC (Note 1)
Note 1: Devices also available in 13× reel. Use suffix e SCX.
Note 2: Military grade device with environmental and burn-in processing. Use suffix e SDMQB, FMQB and LMQB.
Logic Symbols
Connection Diagrams
Pin Assignment
for DIP, SOIC and Flatpak
Pin Assignment
for LCC
TL/F/9595–1
IEEE/IEC
TL/F/9595 – 3
TL/F/9595 – 2
TL/F/9595–5
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C1995 National Semiconductor Corporation
TL/F/9595
RRD-B30M75/Printed in U. S. A.
54F/74F821 10-Bit D-Type Flip-Flop
December 1994
Unit Loading/Fan Out
54F/74F
Pin Names
D0 – D9
OE
CP
O0 – O9
Description
U.L.
HIGH/LOW
Input IIH/IIL
Output IOH/IOL
Data Inputs
Output Enable
TRI-STATE Input
Clock Input
TRI-STATE Outputs
1.0/1.0
20 mA/b0.6 mA
1.0/1.0
20 mA/b0.6 mA
1.0/1.0
150/40 (33.3)
20 mA/b0.6 mA
b 3.0 mA/24 mA (20 mA)
Functional Description
Function Table
The ’F821 consists of ten D-type edge-triggered flip-flops.
This device has TRI-STATE true outputs for bus systems
organized in a broadside pinning. The buffered Clock (CP)
and buffered Output Enable (OE) are common to all flipflops. The flip-flops will store the state of their individual D
inputs that meet the setup and hold times requirements on
the LOW-to-HIGH CP transition. With the OE LOW the content of the flip-flops are available at the outputs. When the
OE is HIGH, the outputs go to the high impedance state.
Operation of the OE input does not affect the state of the
flip-flops.
Internal
Output
OE
Inputs
CP
D
Q
O
H
H
H
L
X
X
NC
NC
Z
Z
Hold
Hold
H
L
L
H
Z
Load
H
L
H
L
Z
Load
L
L
L
H
L
Data Available
L
L
H
L
H
Data Available
L
H
X
NC
NC
No Change in Data
L
L
X
NC
NC
No Change in Data
Function
L e LOW Voltage Level
H e HIGH Voltage Level
X e Immaterial
Z e High Impedance
L e LOW-to-HIGH Transition
NC e No Change
Logic Diagram
TL/F/9595 – 4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
2
Absolute Maximum Ratings (Note 1)
Recommended Operating
Conditions
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature
b 65§ C to a 150§ C
Ambient Temperature under Bias
Junction Temperature under Bias
Plastic
b 55§ C to a 125§ C
Free Air Ambient Temperature
Military
Commercial
b 55§ C to a 125§ C
0§ C to a 70§ C
Supply Voltage
Military
Commercial
b 55§ C to a 175§ C
b 55§ C to a 150§ C
a 4.5V to a 5.5V
a 4.5V to a 5.5V
VCC Pin Potential to
Ground Pin
b 0.5V to a 7.0V
b 0.5V to a 7.0V
Input Voltage (Note 2)
b 30 mA to a 5.0 mA
Input Current (Note 2)
Voltage Applied to Output
in HIGH State (with VCC e 0V)
b 0.5V to VCC
Standard Output
b 0.5V to a 5.5V
TRI-STATE Output
Current Applied to Output
in LOW State (Max)
twice the rated IOL (mA)
Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under
these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
54F/74F
Parameter
Min
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
Typ
Units
2.0
VCD
Input Clamp Diode Voltage
VOH
Output HIGH
Voltage
54F 10% VCC
54F 10% VCC
74F 10% VCC
74F 10% VCC
74F 5% VCC
74F 5% VCC
VCC
Conditions
Max
V
Recognized as a HIGH Signal
0.8
V
Recognized as a LOW Signal
b 1.2
V
2.5
2.4
2.5
2.4
2.7
2.7
Min
IIN e b18 mA
V
Min
IOH
IOH
IOH
IOH
IOH
IOH
IOL e 20 mA
IOL e 24 mA
e
e
e
e
e
e
b 1 mA
b 3 mA
b 1 mA
b 3 mA
b 1 mA
b 3 mA
VOL
Output LOW
Voltage
54F 10% VCC
74F 10% VCC
0.5
0.5
V
Min
IIH
Input HIGH Current
54F
74F
20.0
5.0
mA
Max
VIN e 2.7V
IBVI
Input HIGH Current
Breakdown Test
54F
74F
100
7.0
mA
Max
VIN e 7.0V
ICEX
Output HIGH
Leakage Current
54F
74F
250
50
mA
Max
VOUT e VCC
VID
Input Leakage Test
V
0.0
IID e 1.9 mA,
All Other Pins Grounded
IOD
Output Leakage
Circuit Current
3.75
mA
0.0
VIOD e 150 mV
All Other Pins Grounded
IIL
Input LOW Current
b 0.6
mA
Max
VIN e 0.5V
IOZH
Output Leakage Current
50
mA
Max
VOUT e 2.7V
IOZL
Output Leakage Current
IOS
Output Short-Circuit Current
ICCZ
Power Supply Current
74F
4.75
74F
b 60
78
3
b 50
mA
Max
VOUT e 0.5V
b 150
mA
Max
VOUT e 0V
100
mA
Max
VO e HIGH Z
AC Electrical Characteristics
Symbol
Parameter
74F
54F
74F
TA e a 25§ C
VCC e a 5.0V
CL e 50 pF
TA, VCC e Mil
CL e 50 pF
TA, VCC e Com
CL e 50 pF
Min
Typ
fmax
Maximum Clock Frequency
100
150
Max
Min
Max
tPLH
tPHL
Propagation Delay
CP to On
2.0
2.0
6.4
6.2
9.5
9.5
2.0
2.0
10.5
10.5
2.0
2.0
10.5
10.5
tPZH
tPZL
Output Enable Time
OE to On
2.0
2.0
5.8
6.3
10.5
10.5
2.0
2.0
13.0
13.0
2.0
2.0
11.5
11.5
tPHZ
tPLZ
Output Disable Time
OE to On
1.5
1.5
3.4
3.5
7.0
7.0
1.0
1.0
7.5
7.5
1.5
1.5
7.5
7.5
60
Min
Units
Max
70
MHz
ns
ns
AC Operating Requirements
Symbol
Parameter
74F
54F
74F
TA e a 25§ C
VCC e a 5.0V
TA, VCC e Mil
TA, VCC e Com
Min
Min
Min
Max
Max
ts(H)
ts(L)
Setup Time, HIGH or LOW
Dn to CP
2.5
2.5
4.0
4.0
3.0
3.0
th(H)
th(L)
Hold Time, HIGH or LOW
Dn to CP
2.5
2.5
2.5
2.5
2.5
2.5
tw(H)
tw(L)
CP Pulse Width
HIGH or LOW
5.0
5.0
6.0
6.0
6.0
6.0
4
Units
Max
ns
ns
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows:
74F
821
S
Temperature Range Family
74F e Commercial FAST
54F e Military FAST
C
X
Special Variations
QB e Military grade device with
environmental and burn-in
processing
X e Devices ship in 13× reel
Device Type
Package Code
SP e Slim Plastic DIP
SD e Slim Ceramic DIP
Flatpak
Fe
Le
Leadless Chip Carrier (LCC)
Se
Small Outline (SOIC)
Temperature Range
C e Commercial (0§ C to a 70§ C)
M e Military (b55§ C to a 125§ C)
5
Physical Dimensions inches (millimeters)
28-Lead Ceramic Leadless Chip Carrier (L)
NS Package Number E28A
24-Lead (0.300× Wide) Ceramic Dual-In-Line Package (SD)
NS Package Number J24F
6
Physical Dimensions inches (millimeters) (Continued)
24-Lead (0.300× Wide) Molded Small Outline Package, JEDEC (S)
NS Package Number M24B
24-Lead (0.300× Wide) Molded Dual-In-Line Package (SP)
NS Package Number N24C
7
54F/74F821 10-Bit D-Type Flip-Flop
Physical Dimensions inches (millimeters) (Continued)
24-Lead Ceramic Flatpak (F)
NS Package Number W24C
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